System Control module used for miscellaneous system configurations.
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System Control module used for miscellaneous system configurations.
Module Operation
The SysCtl module is a conglomeration of miscellaneous system control modules that do not fit into any specific hardware peripheral.
Some of the functionalities of the SysCtl module include:
- Configure and enable/disable NMI sources
- Retrieve the SRAM/Flash size through software calls
- Disable/enable SRAM banks completely as well as disable retention during sleep
- Enable/disable GPIO glitch filters
- Change the type of reset that occurs on a WDT violation
Programming Example
The DriverLib package contains a variety of different code examples that demonstrate the usage of the SysCtl module. These code examples are accessible under the examples/ folder of the MSPWare release as well as through TI Resource Explorer if using Code Composer Studio. These code examples provide a comprehensive list of use cases as well as practical applications involving each module.
Below is a very brief code example showing how to retrieve the Flash and SRAM sizes using a software API. This is useful if the programmer is making a program that is meant to be run on multiple devices in the MSP432 family with different memory footprints.
int main(void)
{
volatile uint32_t sramSize, flashSize;
__no_operation();
}
| #define SYSCTL_SRAM_BANK7 SYSCTL_SRAM_BANKEN_BNK7_EN |
| #define SYSCTL_SRAM_BANK6 SYSCTL_SRAM_BANKEN_BNK6_EN |
| #define SYSCTL_SRAM_BANK5 SYSCTL_SRAM_BANKEN_BNK5_EN |
| #define SYSCTL_SRAM_BANK4 SYSCTL_SRAM_BANKEN_BNK4_EN |
| #define SYSCTL_SRAM_BANK3 SYSCTL_SRAM_BANKEN_BNK3_EN |
| #define SYSCTL_SRAM_BANK2 SYSCTL_SRAM_BANKEN_BNK2_EN |
| #define SYSCTL_SRAM_BANK1 SYSCTL_SRAM_BANKEN_BNK1_EN |
| #define SYSCTL_HARD_RESET 1 |
| #define SYSCTL_SOFT_RESET 0 |
| #define SYSCTL_PERIPH_DMA SYSCTL_PERIHALT_CTL_HALT_DMA |
| #define SYSCTL_PERIPH_WDT SYSCTL_PERIHALT_CTL_HALT_WDT |
| #define SYSCTL_PERIPH_ADC SYSCTL_PERIHALT_CTL_HALT_ADC |
| #define SYSCTL_PERIPH_EUSCIB3 SYSCTL_PERIHALT_CTL_HALT_EUB3 |
| #define SYSCTL_PERIPH_EUSCIB2 SYSCTL_PERIHALT_CTL_HALT_EUB2 |
| #define SYSCTL_PERIPH_EUSCIB1 SYSCTL_PERIHALT_CTL_HALT_EUB1 |
| #define SYSCTL_PERIPH_EUSCIB0 SYSCTL_PERIHALT_CTL_HALT_EUB0 |
| #define SYSCTL_PERIPH_EUSCIA3 SYSCTL_PERIHALT_CTL_HALT_EUA3 |
| #define SYSCTL_PERIPH_EUSCIA2 SYSCTL_PERIHALT_CTL_HALT_EUA2 |
| #define SYSCTL_PERIPH_EUSCIA1 SYSCTL_PERIHALT_CTL_HALT_EUA1 |
| #define SYSCTL_PERIPH_EUSCIA0 SYSCTL_PERIHALT_CTL_HALT_EUA0 |
| #define SYSCTL_PERIPH_TIMER32_0_MODULE SYSCTL_PERIHALT_CTL_HALT_T32_0 |
| #define SYSCTL_PERIPH_TIMER16_3 SYSCTL_PERIHALT_CTL_HALT_T16_3 |
| #define SYSCTL_PERIPH_TIMER16_2 SYSCTL_PERIHALT_CTL_HALT_T16_2 |
| #define SYSCTL_PERIPH_TIMER16_1 SYSCTL_PERIHALT_CTL_HALT_T16_1 |
| #define SYSCTL_PERIPH_TIMER16_0 SYSCTL_PERIHALT_CTL_HALT_T16_0 |
| #define SYSCTL_NMIPIN_SRC SYSCTL_NMI_CTLSTAT_PIN_SRC |
| #define SYSCTL_PCM_SRC SYSCTL_NMI_CTLSTAT_PCM_SRC |
| #define SYSCTL_PSS_SRC SYSCTL_NMI_CTLSTAT_PSS_SRC |
| #define SYSCTL_CS_SRC SYSCTL_NMI_CTLSTAT_CS_SRC |
| #define SYSCTL_REBOOT_KEY 0x6900 |
| #define SYSCTL_1_2V_REF (uint32_t)&TLV->ADC14_REF1P2V_TS30C - (uint32_t)TLV_BASE |
| #define SYSCTL_1_45V_REF (uint32_t)&TLV->ADC14_REF1P45V_TS30C - (uint32_t)TLV_BASE |
| #define SYSCTL_2_5V_REF (uint32_t)&TLV->ADC14_REF2P5V_TS30C - (uint32_t)TLV_BASE |
| #define SYSCTL_85_DEGREES_C 4 |
| #define SYSCTL_30_DEGREES_C 0 |
| #define TLV_START 0x00201004 |
| #define TLV_TAG_RESERVED1 1 |
| #define TLV_TAG_RESERVED2 2 |
| #define TLV_TAG_FLASHCTL 4 |
| #define TLV_TAG_RESERVED6 6 |
| #define TLV_TAG_RESERVED7 7 |
| #define TLV_TAG_RESERVED9 9 |
| #define TLV_TAG_RESERVED10 10 |
| #define TLV_TAG_DEVINFO 11 |
| #define TLV_TAG_DIEREC 12 |
| #define TLV_TAG_RANDNUM 13 |
| #define TLV_TAG_RESERVED14 14 |
| #define TLV_TAGEND 0x0BD0E11D |
| uint_least32_t SysCtl_getSRAMSize |
( |
void |
| ) |
|
Gets the size of the SRAM.
- Returns
- The total number of bytes of SRAM.
| uint_least32_t SysCtl_getFlashSize |
( |
void |
| ) |
|
| void SysCtl_rebootDevice |
( |
void |
| ) |
|
Reboots the device and causes the device to re-initialize itself.
- Returns
- This function does not return.
References SYSCTL_REBOOT_KEY.
| void SysCtl_getTLVInfo |
( |
uint_fast8_t |
tag, |
|
|
uint_fast8_t |
instance, |
|
|
uint_fast8_t * |
length, |
|
|
uint32_t ** |
data_address |
|
) |
| |
The TLV structure uses a tag or base address to identify segments of the table where information is stored. Some examples of TLV tags are Peripheral Descriptor, Interrupts, Info Block and Die Record. This function retrieves the value of a tag and the length of the tag.
- Parameters
-
| tag | represents the tag for which the information needs to be retrieved. Valid values are:
- TLV_TAG_RESERVED1
- TLV_TAG_RESERVED2
- TLV_TAG_CS
- TLV_TAG_FLASHCTL
- TLV_TAG_ADC14
- TLV_TAG_RESERVED6
- TLV_TAG_RESERVED7
- TLV_TAG_REF
- TLV_TAG_RESERVED9
- TLV_TAG_RESERVED10
- TLV_TAG_DEVINFO
- TLV_TAG_DIEREC
- TLV_TAG_RANDNUM
- TLV_TAG_RESERVED14
|
| instance | In some cases a specific tag may have more than one instance. For example there may be multiple instances of timer calibration data present under a single Timer Cal tag. This variable specifies the instance for which information is to be retrieved (0, 1, etc.). When only one instance exists; 0 is passed. |
| length | Acts as a return through indirect reference. The function retrieves the value of the TLV tag length. This value is pointed to by *length and can be used by the application level once the function is called. If the specified tag is not found then the pointer is null 0. |
| data_address | acts as a return through indirect reference. Once the function is called data_address points to the pointer that holds the value retrieved from the specified TLV tag. If the specified tag is not found then the pointer is null 0. |
- Returns
- None
References TLV_START, and TLV_TAGEND.
Referenced by CS_getDCOFrequency(), CS_setDCOFrequency(), FlashCtl_eraseSector(), and FlashCtl_programMemory().
| void SysCtl_enableSRAMBank |
( |
uint_fast8_t |
sramBank | ) |
|
Enables a set of banks in the SRAM. This can be used to optimize power consumption when every SRAM bank isn't needed. It is important to note that when a higher bank is enabled, all of the SRAM banks below that bank are also enabled. For example, if the user enables SYSCTL_SRAM_BANK7, the banks SYSCTL_SRAM_BANK1 through SYSCTL_SRAM_BANK7 will be enabled (SRAM_BANK0 is reserved and always enabled).
- Parameters
-
| sramBank | The SRAM bank tier to enable. Must be only one of the following values:
- SYSCTL_SRAM_BANK1,
- SYSCTL_SRAM_BANK2,
- SYSCTL_SRAM_BANK3,
- SYSCTL_SRAM_BANK4,
- SYSCTL_SRAM_BANK5,
- SYSCTL_SRAM_BANK6,
- SYSCTL_SRAM_BANK7
|
- Note
- SYSCTL_SRAM_BANK0 is reserved and always enabled.
- Returns
- None.
References ASSERT.
| void SysCtl_disableSRAMBank |
( |
uint_fast8_t |
sramBank | ) |
|
Disables a set of banks in the SRAM. This can be used to optimize power consumption when every SRAM bank isn't needed. It is important to note that when a higher bank is disabled, all of the SRAM banks above that bank are also disabled. For example, if the user disables SYSCTL_SRAM_BANK5, the banks SYSCTL_SRAM_BANK6 through SYSCTL_SRAM_BANK7 will be disabled.
- Parameters
-
| sramBank | The SRAM bank tier to disable. Must be only one of the following values:
- SYSCTL_SRAM_BANK1,
- SYSCTL_SRAM_BANK2,
- SYSCTL_SRAM_BANK3,
- SYSCTL_SRAM_BANK4,
- SYSCTL_SRAM_BANK5,
- SYSCTL_SRAM_BANK6,
- SYSCTL_SRAM_BANK7
|
- Note
- SYSCTL_SRAM_BANK0 is reserved and always enabled.
- Returns
- None.
References ASSERT, SYSCTL_SRAM_BANK1, SYSCTL_SRAM_BANK2, SYSCTL_SRAM_BANK3, SYSCTL_SRAM_BANK4, SYSCTL_SRAM_BANK5, SYSCTL_SRAM_BANK6, and SYSCTL_SRAM_BANK7.
| void SysCtl_enableSRAMBankRetention |
( |
uint_fast8_t |
sramBank | ) |
|
Enables retention of the specified SRAM bank register when the device goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM banks specified with this function will be placed into retention mode. By default, retention of every SRAM bank except SYSCTL_SRAM_BANK0 (reserved) is disabled. Retention of individual banks can be set without the restrictions of the enable/disable functions.
- Parameters
-
| sramBank | The SRAM banks to enable retention Can be a bitwise OR of the following values:
- SYSCTL_SRAM_BANK1,
- SYSCTL_SRAM_BANK2,
- SYSCTL_SRAM_BANK3,
- SYSCTL_SRAM_BANK4,
- SYSCTL_SRAM_BANK5,
- SYSCTL_SRAM_BANK6,
- SYSCTL_SRAM_BANK7
|
- Note
- SYSCTL_SRAM_BANK0 is reserved and retention is always enabled.
- Returns
- None.
References ASSERT.
| void SysCtl_disableSRAMBankRetention |
( |
uint_fast8_t |
sramBank | ) |
|
Disables retention of the specified SRAM bank register when the device goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM banks specified with this function will not be placed into retention mode. By default, retention of every SRAM bank except SYSCTL_SRAM_BANK0 (reserved) is disabled. Retention of individual banks can be set without the restrictions of the enable/disable SRAM bank functions.
- Parameters
-
| sramBank | The SRAM banks to disable retention Can be a bitwise OR of the following values:
- SYSCTL_SRAM_BANK1,
- SYSCTL_SRAM_BANK2,
- SYSCTL_SRAM_BANK3,
- SYSCTL_SRAM_BANK4,
- SYSCTL_SRAM_BANK5,
- SYSCTL_SRAM_BANK6,
- SYSCTL_SRAM_BANK7
|
- Note
- SYSCTL_SRAM_BANK0 is reserved and retention is always enabled.
- Returns
- None.
References ASSERT.
| void SysCtl_enablePeripheralAtCPUHalt |
( |
uint_fast16_t |
devices | ) |
|
Makes it so that the provided peripherals will either halt execution after a CPU HALT. Parameters in this function can be combined to account for multiple peripherals. By default, all peripherals keep running after a CPU HALT.
- Parameters
-
| devices | The peripherals to continue running after a CPU HALT This can be a bitwise OR of the following values:
- SYSCTL_PERIPH_DMA,
- SYSCTL_PERIPH_WDT,
- SYSCTL_PERIPH_ADC,
- SYSCTL_PERIPH_EUSCIB3,
- SYSCTL_PERIPH_EUSCIB2,
- SYSCTL_PERIPH_EUSCIB1
- SYSCTL_PERIPH_EUSCIB0,
- SYSCTL_PERIPH_EUSCIA3,
- SYSCTL_PERIPH_EUSCIA2
- SYSCTL_PERIPH_EUSCIA1,
- SYSCTL_PERIPH_EUSCIA0,
- SYSCTL_PERIPH_TIMER32_0_MODULE,
- SYSCTL_PERIPH_TIMER16_3,
- SYSCTL_PERIPH_TIMER16_2,
- SYSCTL_PERIPH_TIMER16_1,
- SYSCTL_PERIPH_TIMER16_0
|
- Returns
- None.
References ASSERT.
| void SysCtl_disablePeripheralAtCPUHalt |
( |
uint_fast16_t |
devices | ) |
|
Makes it so that the provided peripherals will either halt execution after a CPU HALT. Parameters in this function can be combined to account for multiple peripherals. By default, all peripherals keep running after a CPU HALT.
- Parameters
-
| devices | The peripherals to disable after a CPU HALT |
The devices parameter can be a bitwise OR of the following values: This can be a bitwise OR of the following values:
- SYSCTL_PERIPH_DMA,
- SYSCTL_PERIPH_WDT,
- SYSCTL_PERIPH_ADC,
- SYSCTL_PERIPH_EUSCIB3,
- SYSCTL_PERIPH_EUSCIB2,
- SYSCTL_PERIPH_EUSCIB1
- SYSCTL_PERIPH_EUSCIB0,
- SYSCTL_PERIPH_EUSCIA3,
- SYSCTL_PERIPH_EUSCIA2
- SYSCTL_PERIPH_EUSCIA1,
- SYSCTL_PERIPH_EUSCIA0,
- SYSCTL_PERIPH_TIMER32_0_MODULE,
- SYSCTL_PERIPH_TIMER16_3,
- SYSCTL_PERIPH_TIMER16_2,
- SYSCTL_PERIPH_TIMER16_1,
- SYSCTL_PERIPH_TIMER16_0
- Returns
- None.
References ASSERT.
| void SysCtl_setWDTTimeoutResetType |
( |
uint_fast8_t |
resetType | ) |
|
Sets the type of RESET that happens when a watchdog timeout occurs.
- Parameters
-
| resetType | The type of reset to set |
The resetType parameter must be only one of the following values:
- SYSCTL_HARD_RESET,
- SYSCTL_SOFT_RESET
- Returns
- None.
Referenced by WDT_A_setTimeoutReset().
| void SysCtl_setWDTPasswordViolationResetType |
( |
uint_fast8_t |
resetType | ) |
|
Sets the type of RESET that happens when a watchdog password violation occurs.
- Parameters
-
| resetType | The type of reset to set |
The resetType parameter must be only one of the following values:
- SYSCTL_HARD_RESET,
- SYSCTL_SOFT_RESET
- Returns
- None.
References ASSERT, and SYSCTL_HARD_RESET.
Referenced by WDT_A_setPasswordViolationReset().
| void SysCtl_disableNMISource |
( |
uint_fast8_t |
flags | ) |
|
Disables NMIs for the provided modules. When disabled, a NMI flag will not occur when a fault condition comes from the corresponding modules.
- Parameters
-
| flags | The NMI sources to disable Can be a bitwise OR of the following parameters:
- SYSCTL_NMIPIN_SRC,
- SYSCTL_PCM_SRC,
- SYSCTL_PSS_SRC,
- SYSCTL_CS_SRC
|
Referenced by CS_startHFXTWithTimeout(), and CS_startLFXTWithTimeout().
| void SysCtl_enableNMISource |
( |
uint_fast8_t |
flags | ) |
|
Enables NMIs for the provided modules. When enabled, a NMI flag will occur when a fault condition comes from the corresponding modules.
- Parameters
-
| flags | The NMI sources to enable Can be a bitwise OR of the following parameters:
- SYSCTL_NMIPIN_SRC,
- SYSCTL_PCM_SRC,
- SYSCTL_PSS_SRC,
- SYSCTL_CS_SRC
|
Referenced by CS_startHFXTWithTimeout(), and CS_startLFXTWithTimeout().
| uint_fast8_t SysCtl_getNMISourceStatus |
( |
void |
| ) |
|
| void SysCtl_enableGlitchFilter |
( |
void |
| ) |
|
Enables glitch suppression on the reset pin of the device. Refer to the device data sheet for specific information about glitch suppression
- Returns
- None.
| void SysCtl_disableGlitchFilter |
( |
void |
| ) |
|
Disables glitch suppression on the reset pin of the device. Refer to the device data sheet for specific information about glitch suppression
- Returns
- None.
| uint_fast16_t SysCtl_getTempCalibrationConstant |
( |
uint32_t |
refVoltage, |
|
|
uint32_t |
temperature |
|
) |
| |
Retrieves the calibration constant of the temperature sensor to be used in temperature calculation.
- Parameters
-
| refVoltage | Reference voltage being used. |
The refVoltage parameter must be only one of the following values:
- SYSCTL_1_2V_REF
- SYSCTL_1_45V_REF
- SYSCTL_2_5V_REF
- Parameters
-
| temperature | is the calibration temperature that the user wants to be returned. |
The temperature parameter must be only one of the following values:
- SYSCTL_30_DEGREES_C
- SYSCTL_85_DEGREES_C
- Returns
- None.
References HWREG16.
