Build date: 05122015
Release Information
Click on the links in the table below to download.
The MSP debug stack (MSPDS) for all MSP430 devices consists of a dynamic link library as well as
embedded firmware that runs on flash emulation tools (FETs) such as the
MSP-FET,
MSP-FET430UIF or
eZ emulators.
It is the bridging element between all PC software and all MSP430 microcontroller derivatives and handles tasks such as
code download, stepping through code, break point handling and so forth. The MSP Debug Stack is used in IDEs such as Code Composer Studio (CCS),
IAR's Embedded Workbench for MSP430 or other tools like Smart RF Studio or Elprotronic's FlashPro430.
Included in
New Device Support
- RF430F5175, RF430F5155, RF430F5144
- MSP430FR5922(1)
Changes
- Native 64 BIT OS X 10.9 (Mavericks) support
- OS X support for all FET debuggers (MSP-FET430UIF, MSP-FET, eZ-FET/eZ-FET Lite)
- OS X support for MSP-FET BSL programming in I2C and UART mode
- OS X support for MSP-FET and eZ-FET back channel UART
- OS X EnergyTrace support
- Change to C++ 11 & Visual Studio 2013
- Remove LPT support including HIL.DLL
- Remove LPMx.5 debug support for all F5xx/F6xx and FR57xx devices due to hardware limitation
- please refer to device errata for more details
Bug Fixes
- Fixed that ISR was executed in the background when single stepping
- Fixed that ADC12 was running with a too high clock speed on MSP-FET and eZ-FET
- Fixed that MSP430FR4133 does not automatically resume running after fuse blow
- Fixed that buffer access on system event was not checked against null pointer
- Fixed indistinguishable FG4619 spins in database
- Fixed race condition between EnergyTrace event and EnergyTrace reset
- Fixed that the VMAIFG bit inside the SFR register was set to "1" because of debugger connect
- Fixed firmware to compile without any warnings for all FET debuggers
- Fixed Link dependency to GLIBC_PRIVATE - remove dependency for Linux
Known Issues
- On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL
- V1.3 of UIF does not work in SBW2 mode with 2.2nf cap on reset line
- eZ-FET UART might lose bytes with 115k baud (no handshake enabled) and DMA as data loopback on target device
- MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow
Older Releases
2_04_007_001
2_04_008_002
2_04_009_001
3_02_001_009
3_02_003_015
3_02_004_005
3_02_005_004
3_03_000_006
3_03_001_003
3_03_001_004
3_04_000_020
3_04_001_000
3_04_002_007
3_04_003_004
MSP430_DLL Product downloads
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