MSP430_DLL 3_04_000_020 Product Download Page
Build date: 02122014
The MSP debug stack (MSPDS) for all MSP430 devices consists of a dynamic link library as well as
embedded firmware that runs on flash emulation tools (FETs) such as the MSP-FET,
MSP-FET430UIF or eZ emulators.
It is the bridging element between all PC software and all MSP430 microcontroller derivatives and handles tasks such as
code download, stepping through code, break point handling and so forth. The MSP Debug Stack is used in IDEs such as Code Composer Studio (CCS),
IAR's Embedded Workbench for MSP430 or other tools like Smart RF Studio or Elprotronic's FlashPro430.
Included in
- CCSv5.5.0.00077 + MSP430 emulation p2 update package (5.5.0.21)
- IAR EW430 v5.60.7
New Device Support
- F67621, F67641
- MSP430F6779A Family
- MSP430FR5969 revF Family (full EnergyTrace and ULP feature support)
New Features
- Added support for new MSP-FET debugger
- Added EnergyTrace
Changes
- Removed MSP430_GetJTAGID() from MSP Debug Stack API completely
- Enhanced debug flow for FR5969 family
- Enhanced power up mechanism to handle all MSP430 device requirements
- MSP430FR5969 revD and previous revisions are not supported any longer
Bug Fixes
- Fixed: Debugger-started in "FreeRun" mode has higher current than real free run without debugger
- Fixed: RAM corruption when using emulated breakpoints option in IAR
- Fixes JTAG password unlock in SBW mode
- Fixed: eZ-FET DCDC PWM width is too long for first PWM after no load phase
- Fixed: DLL crashes if memory function is called with read/write length equals zero
- Fixed: Code placed on the first location of the Info Memory cannot be executed (FRAM devices only)
- Fixed F14x/F14x1 identification
- Fixed: MSP430_Error_String returns INT instead of string w/o MSP430_Initialize up front
- Fixed: SFR register mask off by one on odd address
- Fixed memory verification issue on devices without BSL
- Fixed connect to running target
- Fixed: Download/verify error if code size > 250 bytes on FR5969 devices
- Fixed L092 startup bug
Known Issues
- On devices with FLL, clock control does not allow to keep clocks running, while the device is halted and the clock is sourced by the FLL. Workaround: None
- This MSP430.dll version might not be compatible with revision 1.3 of the MSP-FET430UIF if a capacitor is connected to the RST pin.
- eZ-FET UART might lose bytes with 115kbaut (no handshake enabled) and DMA as data loopback on target device
- MSP-FET EEM access to F149 and L092 devices is only possible with JTAG speed slow
- Fuseblow on 1/2/4xx devices using the MSP-FET is provided as "experimental"!
- MSP-FET UART not implemented
- EnergyTrace is not supported on MSP430FR5969 revE and previous revisions
Older Releases
2_04_007_001
2_04_008_002
2_04_009_001
3_02_001_009
3_02_003_015
3_02_004_005
3_02_005_004
3_03_000_006
3_03_001_003
3_03_001_004
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