Data Structures | Macros | Typedefs | Variables
UARTCC32XXDMA.h File Reference

Detailed Description

UART driver implementation for a CC32XX UART controller, using the micro DMA controller.

============================================================================

The UART header file should be included in an application as follows:

Refer to UART.h for a complete description of APIs & example of use.

Device Specific Pin Mode Macros

This header file contains pin mode definitions used to specify the UART TX and RX pin assignment in the UARTCC32XXDMA_HWAttrsV1 structure. Please refer to the CC32XX Techincal Reference Manual for details on pin multiplexing. The bits in the pin mode macros are as follows: The lower 8 bits of the macro refer to the pin, offset by 1, to match driverlib pin defines. For example, UARTCC32XXDMA_PIN_01_UART1_TX & 0xff = 0, which equals PIN_01 in driverlib pin.h. By matching the PIN_xx defines in driverlib pin.h, we can pass the pin directly to the driverlib functions. The upper 8 bits of the macro correspond to the pin mux confg mode value for the pin to operate in the UART mode. For example, pin 1 is configured with mode 7 to operate as UART1 TX.

Flow Control

To enable Flow Control, the RTS and CTS pins must be assigned in the UARTCC32XX_HWAttrsV1.


#include <stdint.h>
#include <stdbool.h>
#include <ti/drivers/dpl/ClockP.h>
#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/power/PowerCC32XX.h>
#include <ti/drivers/UART.h>
#include <ti/drivers/dma/UDMACC32XX.h>

Go to the source code of this file.

Data Structures

struct  UARTCC32XXDMA_HWAttrsV1
 UARTCC32XXDMA Hardware attributes. More...
 
struct  UARTCC32XXDMA_Object
 UARTCC32XXDMA Object. More...
 

Macros

#define UARTCC32XXDMA_PIN_UNASSIGNED   0xFFF
 Indicates a pin is not being used. More...
 
#define UARTCC32XXDMA_PIN_01_UART1_TX   0x700
 
#define UARTCC32XXDMA_PIN_02_UART1_RX   0x701
 
#define UARTCC32XXDMA_PIN_03_UART0_TX   0x702
 
#define UARTCC32XXDMA_PIN_04_UART0_RX   0x703
 
#define UARTCC32XXDMA_PIN_07_UART1_TX   0x506
 
#define UARTCC32XXDMA_PIN_08_UART1_RX   0x507
 
#define UARTCC32XXDMA_PIN_16_UART1_TX   0x20F
 
#define UARTCC32XXDMA_PIN_17_UART1_RX   0x210
 
#define UARTCC32XXDMA_PIN_45_UART0_RX   0x92C
 
#define UARTCC32XXDMA_PIN_45_UART1_RX   0x22C
 
#define UARTCC32XXDMA_PIN_53_UART0_TX   0x934
 
#define UARTCC32XXDMA_PIN_55_UART0_TX   0x336
 
#define UARTCC32XXDMA_PIN_55_UART1_TX   0x636
 
#define UARTCC32XXDMA_PIN_57_UART0_RX   0x338
 
#define UARTCC32XXDMA_PIN_57_UART1_RX   0x638
 
#define UARTCC32XXDMA_PIN_58_UART1_TX   0x639
 
#define UARTCC32XXDMA_PIN_59_UART1_RX   0x63A
 
#define UARTCC32XXDMA_PIN_62_UART0_TX   0xB3D
 
#define UARTCC32XXDMA_PIN_50_UART1_RTS   0xA31
 
#define UARTCC32XXDMA_PIN_61_UART1_CTS   0x33C
 
#define UARTCC32XXDMA_PIN_62_UART1_RTS   0x33D
 
#define UARTCC32XXDMA_FLOWCTRL_NONE   0
 No hardware flow control. More...
 
#define UARTCC32XXDMA_FLOWCTRL_HARDWARE   1
 Hardware flow control. More...
 
#define UARTCC32XXDMA_CMD_IS_BUSY   (UART_CMD_RESERVED + 0)
 Command used by UART_control to determines whether the UART transmitter is busy or not. More...
 
#define UARTCC32XXDMA_CMD_IS_RX_DATA_AVAILABLE   (UART_CMD_RESERVED + 1)
 Command used by UART_control to determines if there are any characters in the receive FIFO. More...
 
#define UARTCC32XXDMA_CMD_IS_TX_SPACE_AVAILABLE   (UART_CMD_RESERVED + 2)
 Command used by UART_control to determines if there is any space in the transmit FIFO. More...
 

Typedefs

typedef struct UARTCC32XXDMA_HWAttrsV1 UARTCC32XXDMA_HWAttrsV1
 UARTCC32XXDMA Hardware attributes. More...
 
typedef struct UARTCC32XXDMA_Object UARTCC32XXDMA_Object
 UARTCC32XXDMA Object. More...
 
typedef struct UARTCC32XXDMA_ObjectUARTCC32XXDMA_Handle
 

Variables

const UART_FxnTable UARTCC32XXDMA_fxnTable
 

Macro Definition Documentation

§ UARTCC32XXDMA_PIN_UNASSIGNED

#define UARTCC32XXDMA_PIN_UNASSIGNED   0xFFF

Indicates a pin is not being used.

If hardware flow control is not being used, the UART CTS and RTS pins should be set to UARTCC32XX_PIN_UNASSIGNED.

§ UARTCC32XXDMA_PIN_01_UART1_TX

#define UARTCC32XXDMA_PIN_01_UART1_TX   0x700

§ UARTCC32XXDMA_PIN_02_UART1_RX

#define UARTCC32XXDMA_PIN_02_UART1_RX   0x701

§ UARTCC32XXDMA_PIN_03_UART0_TX

#define UARTCC32XXDMA_PIN_03_UART0_TX   0x702

§ UARTCC32XXDMA_PIN_04_UART0_RX

#define UARTCC32XXDMA_PIN_04_UART0_RX   0x703

§ UARTCC32XXDMA_PIN_07_UART1_TX

#define UARTCC32XXDMA_PIN_07_UART1_TX   0x506

§ UARTCC32XXDMA_PIN_08_UART1_RX

#define UARTCC32XXDMA_PIN_08_UART1_RX   0x507

§ UARTCC32XXDMA_PIN_16_UART1_TX

#define UARTCC32XXDMA_PIN_16_UART1_TX   0x20F

§ UARTCC32XXDMA_PIN_17_UART1_RX

#define UARTCC32XXDMA_PIN_17_UART1_RX   0x210

§ UARTCC32XXDMA_PIN_45_UART0_RX

#define UARTCC32XXDMA_PIN_45_UART0_RX   0x92C

§ UARTCC32XXDMA_PIN_45_UART1_RX

#define UARTCC32XXDMA_PIN_45_UART1_RX   0x22C

§ UARTCC32XXDMA_PIN_53_UART0_TX

#define UARTCC32XXDMA_PIN_53_UART0_TX   0x934

§ UARTCC32XXDMA_PIN_55_UART0_TX

#define UARTCC32XXDMA_PIN_55_UART0_TX   0x336

§ UARTCC32XXDMA_PIN_55_UART1_TX

#define UARTCC32XXDMA_PIN_55_UART1_TX   0x636

§ UARTCC32XXDMA_PIN_57_UART0_RX

#define UARTCC32XXDMA_PIN_57_UART0_RX   0x338

§ UARTCC32XXDMA_PIN_57_UART1_RX

#define UARTCC32XXDMA_PIN_57_UART1_RX   0x638

§ UARTCC32XXDMA_PIN_58_UART1_TX

#define UARTCC32XXDMA_PIN_58_UART1_TX   0x639

§ UARTCC32XXDMA_PIN_59_UART1_RX

#define UARTCC32XXDMA_PIN_59_UART1_RX   0x63A

§ UARTCC32XXDMA_PIN_62_UART0_TX

#define UARTCC32XXDMA_PIN_62_UART0_TX   0xB3D

§ UARTCC32XXDMA_PIN_50_UART1_RTS

#define UARTCC32XXDMA_PIN_50_UART1_RTS   0xA31

§ UARTCC32XXDMA_PIN_61_UART1_CTS

#define UARTCC32XXDMA_PIN_61_UART1_CTS   0x33C

§ UARTCC32XXDMA_PIN_62_UART1_RTS

#define UARTCC32XXDMA_PIN_62_UART1_RTS   0x33D

§ UARTCC32XXDMA_FLOWCTRL_NONE

#define UARTCC32XXDMA_FLOWCTRL_NONE   0

No hardware flow control.

§ UARTCC32XXDMA_FLOWCTRL_HARDWARE

#define UARTCC32XXDMA_FLOWCTRL_HARDWARE   1

Hardware flow control.

Typedef Documentation

§ UARTCC32XXDMA_HWAttrsV1

UARTCC32XXDMA Hardware attributes.

These fields, with the exception of intPriority, are used by driverlib APIs and therefore must be populated by driverlib macro definitions. For CC32XXWare these definitions are found in:

  • inc/hw_memmap.h
  • inc/hw_ints.h

intPriority is the UART peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. For example, for SYS/BIOS applications, refer to the ti.sysbios.family.arm.m3.Hwi documentation for SYS/BIOS usage of interrupt priorities. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().

A sample structure is shown below:

const UARTCC32XXDMA_HWAttrsV1 uartCC32XXHWAttrs[] = {
{
.baseAddr = UARTA0_BASE,
.intNum = INT_UARTA0,
.intPriority = (~0),
.rxChannelIndex = DMA_CH8_UARTA0_RX,
.txChannelIndex = UDMA_CH9_UARTA0_TX,
.ctsPin = UARTCC32XX_DMA_PIN_UNASSIGNED
},
{
.baseAddr = UARTA1_BASE,
.intNum = INT_UARTA1,
.intPriority = (~0),
.rxChannelIndex = UDMA_CH10_UARTA1_RX,
.txChannelIndex = UDMA_CH11_UARTA1_TX,
},
};

§ UARTCC32XXDMA_Object

UARTCC32XXDMA Object.

The application must not access any member variables of this structure!

§ UARTCC32XXDMA_Handle

Variable Documentation

§ UARTCC32XXDMA_fxnTable

const UART_FxnTable UARTCC32XXDMA_fxnTable
Copyright 2017, Texas Instruments Incorporated