UARTCC32XXDMA.h
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1 /*
2  * Copyright (c) 2014-2017, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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31  */
68 #ifndef ti_drivers_uart_UARTCC32XXDMA__include
69 #define ti_drivers_uart_UARTCC32XXDMA__include
70 
71 #ifdef __cplusplus
72 extern "C" {
73 #endif
74 
75 #include <stdint.h>
76 #include <stdbool.h>
77 
78 #include <ti/drivers/dpl/ClockP.h>
79 #include <ti/drivers/dpl/HwiP.h>
80 
81 #include <ti/drivers/dpl/SemaphoreP.h>
82 #include <ti/drivers/Power.h>
84 #include <ti/drivers/UART.h>
86 
87 
94 #define UARTCC32XXDMA_PIN_UNASSIGNED 0xFFF
95 #define UARTCC32XXDMA_PIN_01_UART1_TX 0x700
96 #define UARTCC32XXDMA_PIN_02_UART1_RX 0x701
97 #define UARTCC32XXDMA_PIN_03_UART0_TX 0x702
98 #define UARTCC32XXDMA_PIN_04_UART0_RX 0x703
99 #define UARTCC32XXDMA_PIN_07_UART1_TX 0x506
100 #define UARTCC32XXDMA_PIN_08_UART1_RX 0x507
101 #define UARTCC32XXDMA_PIN_16_UART1_TX 0x20F
102 #define UARTCC32XXDMA_PIN_17_UART1_RX 0x210
103 #define UARTCC32XXDMA_PIN_45_UART0_RX 0x92C
104 #define UARTCC32XXDMA_PIN_45_UART1_RX 0x22C
105 #define UARTCC32XXDMA_PIN_53_UART0_TX 0x934
106 #define UARTCC32XXDMA_PIN_55_UART0_TX 0x336
107 #define UARTCC32XXDMA_PIN_55_UART1_TX 0x636
108 #define UARTCC32XXDMA_PIN_57_UART0_RX 0x338
109 #define UARTCC32XXDMA_PIN_57_UART1_RX 0x638
110 #define UARTCC32XXDMA_PIN_58_UART1_TX 0x639
111 #define UARTCC32XXDMA_PIN_59_UART1_RX 0x63A
112 #define UARTCC32XXDMA_PIN_62_UART0_TX 0xB3D
113 
114 /*
115  * Flow control pins. Only available for UART1. The CTS and RTS
116  * pins for UART0 and UART2 are shown in the Pin Multiplexing table,
117  * but CTSEN and RTSEN are only implemented on UART1.
118  */
119 //#define UARTCC32XXDMA_PIN_50_UART0_CTS 0xC31
120 //#define UARTCC32XXDMA_PIN_50_UART0_RTS 0x331
121 #define UARTCC32XXDMA_PIN_50_UART1_RTS 0xA31
122 //#define UARTCC32XXDMA_PIN_52_UART0_RTS 0x633
123 //#define UARTCC32XXDMA_PIN_61_UART0_RTS 0x53C
124 //#define UARTCC32XXDMA_PIN_61_UART0_CTS 0x63C
125 #define UARTCC32XXDMA_PIN_61_UART1_CTS 0x33C
126 //#define UARTCC32XXDMA_PIN_62_UART0_RTS 0xA3D
127 #define UARTCC32XXDMA_PIN_62_UART1_RTS 0x33D
128 
132 #define UARTCC32XXDMA_FLOWCTRL_NONE 0
133 
137 #define UARTCC32XXDMA_FLOWCTRL_HARDWARE 1
138 
149 /* Add UARTCC32XXDMA_STATUS_* macros here */
150 
171 #define UARTCC32XXDMA_CMD_IS_BUSY (UART_CMD_RESERVED + 0)
172 
173 
182 #define UARTCC32XXDMA_CMD_IS_RX_DATA_AVAILABLE (UART_CMD_RESERVED + 1)
183 
184 
193 #define UARTCC32XXDMA_CMD_IS_TX_SPACE_AVAILABLE (UART_CMD_RESERVED + 2)
194 
195 
198 /* UART function table pointer */
200 
250 typedef struct UARTCC32XXDMA_HWAttrsV1 {
252  unsigned int baseAddr;
254  unsigned int intNum;
256  unsigned int intPriority;
258  uint32_t flowControl;
260  unsigned long rxChannelIndex;
262  unsigned long txChannelIndex;
264  uint16_t rxPin;
266  uint16_t txPin;
268  uint16_t ctsPin;
270  uint16_t rtsPin;
272 
278 typedef struct UARTCC32XXDMA_Object {
279  /* UART control variables */
280  bool opened; /* Has the obj been opened */
281  UART_Mode readMode; /* Mode for all read calls */
282  UART_Mode writeMode; /* Mode for all write calls */
283  unsigned int readTimeout; /* Timeout for read semaphore */
284  unsigned int writeTimeout; /* Timeout for write semaphore */
285  UART_Callback readCallback; /* Pointer to read callback */
286  UART_Callback writeCallback; /* Pointer to write callback */
287  UART_ReturnMode readReturnMode; /* Receive return mode */
288  UART_DataMode readDataMode; /* Type of data being read */
289  UART_DataMode writeDataMode; /* Type of data being written */
290  uint32_t baudRate; /* Baud rate for UART */
291  UART_LEN dataLength; /* Data length for UART */
292  UART_STOP stopBits; /* Stop bits for UART */
293  UART_PAR parityType; /* Parity bit type for UART */
294  UART_Echo readEcho; /* Echo received data back */
295 
296  /* UART write variables */
297  const void *writeBuf; /* Buffer data pointer */
298  size_t writeCount; /* Number of Chars sent */
299  size_t writeSize; /* Chars remaining in buffer */
300 
301  /* UART receive variables */
302  void *readBuf; /* Buffer data pointer */
303  size_t readCount; /* Number of Chars read */
304  size_t readSize; /* Chars remaining in buffer */
305 
306  /* Semaphores for blocking mode */
307  SemaphoreP_Handle writeSem; /* UART write semaphore */
308  SemaphoreP_Handle readSem; /* UART read semaphore */
309 
310  HwiP_Handle hwiHandle;
311 
312  /* For Power management */
313  ClockP_Handle txFifoEmptyClk; /* UART TX FIFO empty clock */
314  Power_NotifyObj postNotify; /* LPDS wake-up notify object */
315  unsigned int powerMgrId; /* Determined from base address */
316  PowerCC32XX_ParkState prevParkTX; /* Previous park state TX pin */
317  uint16_t txPin; /* TX pin ID */
318  PowerCC32XX_ParkState prevParkRTS; /* Previous park state of RTS pin */
319  uint16_t rtsPin; /* RTS pin ID */
320 
321  /* UDMA */
324 
325 #ifdef __cplusplus
326 }
327 #endif
328 
329 #endif /* ti_drivers_uart_UARTCC32XXDMA__include */
UARTCC32XXDMA Hardware attributes.
Definition: UARTCC32XXDMA.h:250
Power_NotifyObj postNotify
Definition: UARTCC32XXDMA.h:314
enum UART_Echo_ UART_Echo
UART echo settings.
uint32_t flowControl
Definition: UARTCC32XXDMA.h:258
uint16_t rxPin
Definition: UARTCC32XXDMA.h:264
PowerCC32XX_ParkState prevParkTX
Definition: UARTCC32XXDMA.h:316
size_t readSize
Definition: UARTCC32XXDMA.h:304
UARTCC32XXDMA Object.
Definition: UARTCC32XXDMA.h:278
UART_Callback writeCallback
Definition: UARTCC32XXDMA.h:286
enum UART_PAR_ UART_PAR
UART parity type settings.
unsigned int writeTimeout
Definition: UARTCC32XXDMA.h:284
Power manager interface.
enum UART_LEN_ UART_LEN
UART data length settings.
UDMACC32XX_Handle dmaHandle
Definition: UARTCC32XXDMA.h:322
unsigned int baseAddr
Definition: UARTCC32XXDMA.h:252
const void * writeBuf
Definition: UARTCC32XXDMA.h:297
enum UART_Mode_ UART_Mode
UART mode settings.
Power notify object structure.
Definition: Power.h:113
UART_Echo readEcho
Definition: UARTCC32XXDMA.h:294
size_t readCount
Definition: UARTCC32XXDMA.h:303
struct UARTCC32XXDMA_HWAttrsV1 UARTCC32XXDMA_HWAttrsV1
UARTCC32XXDMA Hardware attributes.
SemaphoreP_Handle readSem
Definition: UARTCC32XXDMA.h:308
unsigned int powerMgrId
Definition: UARTCC32XXDMA.h:315
uDMA driver implementation for CC32XX.
unsigned int intNum
Definition: UARTCC32XXDMA.h:254
SemaphoreP_Handle writeSem
Definition: UARTCC32XXDMA.h:307
uint16_t txPin
Definition: UARTCC32XXDMA.h:266
void * readBuf
Definition: UARTCC32XXDMA.h:302
UDMACC32XX Global configuration.
Definition: UDMACC32XX.h:135
uint16_t ctsPin
Definition: UARTCC32XXDMA.h:268
Power manager interface for the CC32XX.
ClockP_Handle txFifoEmptyClk
Definition: UARTCC32XXDMA.h:313
uint32_t baudRate
Definition: UARTCC32XXDMA.h:290
The definition of a UART function table that contains the required set of functions to control a spec...
Definition: UART.h:652
UART_PAR parityType
Definition: UARTCC32XXDMA.h:293
UART driver interface.
bool opened
Definition: UARTCC32XXDMA.h:280
UART_STOP stopBits
Definition: UARTCC32XXDMA.h:292
UART_LEN dataLength
Definition: UARTCC32XXDMA.h:291
UART_DataMode readDataMode
Definition: UARTCC32XXDMA.h:288
uint16_t rtsPin
Definition: UARTCC32XXDMA.h:319
uint16_t rtsPin
Definition: UARTCC32XXDMA.h:270
unsigned int readTimeout
Definition: UARTCC32XXDMA.h:283
size_t writeCount
Definition: UARTCC32XXDMA.h:298
enum UART_STOP_ UART_STOP
UART stop bit settings.
enum UART_ReturnMode_ UART_ReturnMode
UART return mode settings.
size_t writeSize
Definition: UARTCC32XXDMA.h:299
HwiP_Handle hwiHandle
Definition: UARTCC32XXDMA.h:310
unsigned long rxChannelIndex
Definition: UARTCC32XXDMA.h:260
PowerCC32XX_ParkState prevParkRTS
Definition: UARTCC32XXDMA.h:318
uint16_t txPin
Definition: UARTCC32XXDMA.h:317
UART_Mode writeMode
Definition: UARTCC32XXDMA.h:282
UART_DataMode writeDataMode
Definition: UARTCC32XXDMA.h:289
struct UARTCC32XXDMA_Object UARTCC32XXDMA_Object
UARTCC32XXDMA Object.
UART_Mode readMode
Definition: UARTCC32XXDMA.h:281
unsigned long txChannelIndex
Definition: UARTCC32XXDMA.h:262
unsigned int intPriority
Definition: UARTCC32XXDMA.h:256
UART_Callback readCallback
Definition: UARTCC32XXDMA.h:285
const UART_FxnTable UARTCC32XXDMA_fxnTable
struct UARTCC32XXDMA_Object * UARTCC32XXDMA_Handle
UART_ReturnMode readReturnMode
Definition: UARTCC32XXDMA.h:287
void(* UART_Callback)(UART_Handle handle, void *buf, size_t count)
The definition of a callback function used by the UART driver when used in UART_MODE_CALLBACK The cal...
Definition: UART.h:438
enum UART_DataMode_ UART_DataMode
UART data mode settings.
PowerCC32XX_ParkState
Enumeration of states a pin can be parked in.
Definition: PowerCC32XX.h:385
Copyright 2017, Texas Instruments Incorporated