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#include <stdint.h>#include <stdbool.h>#include <ti/devices/msp432p4xx/inc/msp.h>Go to the source code of this file.
| Macros | |
| #define | FAULT_NMI ( 2) /* NMI fault */ | 
| #define | FAULT_HARD ( 3) /* Hard fault */ | 
| #define | FAULT_MPU ( 4) /* MPU fault */ | 
| #define | FAULT_BUS ( 5) /* Bus fault */ | 
| #define | FAULT_USAGE ( 6) /* Usage fault */ | 
| #define | FAULT_SVCALL (11) /* SVCall */ | 
| #define | FAULT_DEBUG (12) /* Debug monitor */ | 
| #define | FAULT_PENDSV (14) /* PendSV */ | 
| #define | FAULT_SYSTICK (15) /* System Tick */ | 
| #define | INT_PSS (16) /* PSS IRQ */ | 
| #define | INT_CS (17) /* CS IRQ */ | 
| #define | INT_PCM (18) /* PCM IRQ */ | 
| #define | INT_WDT_A (19) /* WDT_A IRQ */ | 
| #define | INT_FPU (20) /* FPU IRQ */ | 
| #define | INT_FLCTL (21) /* FLCTL IRQ */ | 
| #define | INT_COMP_E0 (22) /* COMP_E0 IRQ */ | 
| #define | INT_COMP_E1 (23) /* COMP_E1 IRQ */ | 
| #define | INT_TA0_0 (24) /* TA0_0 IRQ */ | 
| #define | INT_TA0_N (25) /* TA0_N IRQ */ | 
| #define | INT_TA1_0 (26) /* TA1_0 IRQ */ | 
| #define | INT_TA1_N (27) /* TA1_N IRQ */ | 
| #define | INT_TA2_0 (28) /* TA2_0 IRQ */ | 
| #define | INT_TA2_N (29) /* TA2_N IRQ */ | 
| #define | INT_TA3_0 (30) /* TA3_0 IRQ */ | 
| #define | INT_TA3_N (31) /* TA3_N IRQ */ | 
| #define | INT_EUSCIA0 (32) /* EUSCIA0 IRQ */ | 
| #define | INT_EUSCIA1 (33) /* EUSCIA1 IRQ */ | 
| #define | INT_EUSCIA2 (34) /* EUSCIA2 IRQ */ | 
| #define | INT_EUSCIA3 (35) /* EUSCIA3 IRQ */ | 
| #define | INT_EUSCIB0 (36) /* EUSCIB0 IRQ */ | 
| #define | INT_EUSCIB1 (37) /* EUSCIB1 IRQ */ | 
| #define | INT_EUSCIB2 (38) /* EUSCIB2 IRQ */ | 
| #define | INT_EUSCIB3 (39) /* EUSCIB3 IRQ */ | 
| #define | INT_ADC14 (40) /* ADC14 IRQ */ | 
| #define | INT_T32_INT1 (41) /* T32_INT1 IRQ */ | 
| #define | INT_T32_INT2 (42) /* T32_INT2 IRQ */ | 
| #define | INT_T32_INTC (43) /* T32_INTC IRQ */ | 
| #define | INT_AES256 (44) /* AES256 IRQ */ | 
| #define | INT_RTC_C (45) /* RTC_C IRQ */ | 
| #define | INT_DMA_ERR (46) /* DMA_ERR IRQ */ | 
| #define | INT_DMA_INT3 (47) /* DMA_INT3 IRQ */ | 
| #define | INT_DMA_INT2 (48) /* DMA_INT2 IRQ */ | 
| #define | INT_DMA_INT1 (49) /* DMA_INT1 IRQ */ | 
| #define | INT_DMA_INT0 (50) /* DMA_INT0 IRQ */ | 
| #define | INT_PORT1 (51) /* PORT1 IRQ */ | 
| #define | INT_PORT2 (52) /* PORT2 IRQ */ | 
| #define | INT_PORT3 (53) /* PORT3 IRQ */ | 
| #define | INT_PORT4 (54) /* PORT4 IRQ */ | 
| #define | INT_PORT5 (55) /* PORT5 IRQ */ | 
| #define | INT_PORT6 (56) /* PORT6 IRQ */ | 
| #define | INT_LCD_F (57) /* PORT6 IRQ */ | 
| #define | NUM_INTERRUPTS (57) | 
| #define | INT_PRIORITY_MASK ((0xFF << (8 - NUM_PRIORITY_BITS)) & 0xFF) | 
| #define | NUM_PRIORITY 8 | 
| #define | NVIC_APINT_PRIGROUP_M 0x00000700 | 
| #define | NVIC_APINT_PRIGROUP_7_1 0x00000000 | 
| #define | NVIC_APINT_PRIGROUP_6_2 0x00000100 | 
| #define | NVIC_APINT_PRIGROUP_5_3 0x00000200 | 
| #define | NVIC_APINT_PRIGROUP_4_4 0x00000300 | 
| #define | NVIC_APINT_PRIGROUP_3_5 0x00000400 | 
| #define | NVIC_APINT_PRIGROUP_2_6 0x00000500 | 
| #define | NVIC_APINT_PRIGROUP_1_7 0x00000600 | 
| #define | NVIC_APINT_PRIGROUP_0_8 0x00000700 | 
| #define | NVIC_SYS_PRI1_R 0xE000ED18 | 
| #define | NVIC_SYS_PRI2_R 0xE000ED1C | 
| #define | NVIC_SYS_PRI3_R 0xE000ED20 | 
| #define | NVIC_PRI0_R 0xE000E400 | 
| #define | NVIC_PRI1_R 0xE000E404 | 
| #define | NVIC_PRI2_R 0xE000E408 | 
| #define | NVIC_PRI3_R 0xE000E40C | 
| #define | NVIC_PRI4_R 0xE000E410 | 
| #define | NVIC_PRI5_R 0xE000E414 | 
| #define | NVIC_PRI6_R 0xE000E418 | 
| #define | NVIC_PRI7_R 0xE000E41C | 
| #define | NVIC_PRI8_R 0xE000E420 | 
| #define | NVIC_PRI9_R 0xE000E424 | 
| #define | NVIC_PRI10_R 0xE000E428 | 
| #define | NVIC_PRI11_R 0xE000E42C | 
| #define | NVIC_PRI12_R 0xE000E430 | 
| #define | NVIC_PRI13_R 0xE000E434 | 
| #define | NVIC_PRI14_R 0xE000E438 | 
| #define | NVIC_PRI15_R 0xE000E43C | 
| #define | NVIC_EN0_R 0xE000E100 | 
| #define | NVIC_EN1_R 0xE000E104 | 
| #define | NVIC_DIS0_R 0xE000E180 | 
| #define | NVIC_DIS1_R 0xE000E184 | 
| #define | NVIC_PEND0_R 0xE000E200 | 
| #define | NVIC_PEND1_R 0xE000E204 | 
| #define | NVIC_UNPEND0_R 0xE000E280 | 
| #define | NVIC_UNPEND1_R 0xE000E284 | 
| Functions | |
| bool | Interrupt_enableMaster (void) | 
| bool | Interrupt_disableMaster (void) | 
| void | Interrupt_registerInterrupt (uint32_t interruptNumber, void(*intHandler)(void)) | 
| void | Interrupt_unregisterInterrupt (uint32_t interruptNumber) | 
| void | Interrupt_setPriorityGrouping (uint32_t bits) | 
| uint32_t | Interrupt_getPriorityGrouping (void) | 
| void | Interrupt_setPriority (uint32_t interruptNumber, uint8_t priority) | 
| uint8_t | Interrupt_getPriority (uint32_t interruptNumber) | 
| void | Interrupt_enableInterrupt (uint32_t interruptNumber) | 
| void | Interrupt_disableInterrupt (uint32_t interruptNumber) | 
| bool | Interrupt_isEnabled (uint32_t interruptNumber) | 
| void | Interrupt_pendInterrupt (uint32_t interruptNumber) | 
| void | Interrupt_unpendInterrupt (uint32_t interruptNumber) | 
| void | Interrupt_setPriorityMask (uint8_t priorityMask) | 
| uint8_t | Interrupt_getPriorityMask (void) | 
| void | Interrupt_setVectorTableAddress (uint32_t addr) | 
| uint32_t | Interrupt_getVectorTableAddress (void) | 
| void | Interrupt_enableSleepOnIsrExit (void) | 
| void | Interrupt_disableSleepOnIsrExit (void) |