Data Structures | Macros | Functions
SysCtl_A

System Control A module used for miscellaneous system configurations on MSP432P4111. More...

Data Structures

struct  SysCtl_A_FlashTLV_Info
 
struct  SysCtl_A_CSCalTLV_Info
 

Macros

#define SYSCTL_A_HARD_RESET   1
 
#define SYSCTL_A_SOFT_RESET   0
 
#define SYSCTL_A_PERIPH_LCD   SYSCTL_A_PERIHALT_CTL_HALT_LCD
 
#define SYSCTL_A_PERIPH_DMA   SYSCTL_A_PERIHALT_CTL_HALT_DMA
 
#define SYSCTL_A_PERIPH_WDT   SYSCTL_A_PERIHALT_CTL_HALT_WDT
 
#define SYSCTL_A_PERIPH_ADC   SYSCTL_A_PERIHALT_CTL_HALT_ADC
 
#define SYSCTL_A_PERIPH_EUSCIB3   SYSCTL_A_PERIHALT_CTL_HALT_EUB3
 
#define SYSCTL_A_PERIPH_EUSCIB2   SYSCTL_A_PERIHALT_CTL_HALT_EUB2
 
#define SYSCTL_A_PERIPH_EUSCIB1   SYSCTL_A_PERIHALT_CTL_HALT_EUB1
 
#define SYSCTL_A_PERIPH_EUSCIB0   SYSCTL_A_PERIHALT_CTL_HALT_EUB0
 
#define SYSCTL_A_PERIPH_EUSCIA3   SYSCTL_A_PERIHALT_CTL_HALT_EUA3
 
#define SYSCTL_A_PERIPH_EUSCIA2   SYSCTL_A_PERIHALT_CTL_HALT_EUA2
 
#define SYSCTL_A_PERIPH_EUSCIA1   SYSCTL_A_PERIHALT_CTL_HALT_EUA1
 
#define SYSCTL_A_PERIPH_EUSCIA0   SYSCTL_A_PERIHALT_CTL_HALT_EUA0
 
#define SYSCTL_A_PERIPH_TIMER32_0_MODULE   SYSCTL_A_PERIHALT_CTL_HALT_T32_0
 
#define SYSCTL_A_PERIPH_TIMER16_3   SYSCTL_A_PERIHALT_CTL_HALT_T16_3
 
#define SYSCTL_A_PERIPH_TIMER16_2   SYSCTL_A_PERIHALT_CTL_HALT_T16_2
 
#define SYSCTL_A_PERIPH_TIMER16_1   SYSCTL_A_PERIHALT_CTL_HALT_T16_1
 
#define SYSCTL_A_PERIPH_TIMER16_0   SYSCTL_A_PERIHALT_CTL_HALT_T16_0
 
#define SYSCTL_A_NMIPIN_SRC   SYSCTL_A_NMI_CTLSTAT_PIN_SRC
 
#define SYSCTL_A_PCM_SRC   SYSCTL_A_NMI_CTLSTAT_PCM_SRC
 
#define SYSCTL_A_PSS_SRC   SYSCTL_A_NMI_CTLSTAT_PSS_SRC
 
#define SYSCTL_A_CS_SRC   SYSCTL_A_NMI_CTLSTAT_CS_SRC
 
#define SYSCTL_A_REBOOT_KEY   0x6900
 
#define SYSCTL_A_1_2V_REF   (uint32_t)&TLV->ADC14_REF1P2V_TS30C - (uint32_t)TLV_BASE
 
#define SYSCTL_A_1_45V_REF   (uint32_t)&TLV->ADC14_REF1P45V_TS30C - (uint32_t)TLV_BASE
 
#define SYSCTL_A_2_5V_REF   (uint32_t)&TLV->ADC14_REF2P5V_TS30C - (uint32_t)TLV_BASE
 
#define SYSCTL_A_85_DEGREES_C   4
 
#define SYSCTL_A_30_DEGREES_C   0
 
#define SYSCTL_A_BANKMASK   0x80000000
 
#define SRAMCTL_CTL0_BANK   0x10000000
 
#define SRAMCTL_CTL1_BANK   0x20000000
 
#define SRAMCTL_CTL2_BANK   0x30000000
 
#define SRAMCTL_CTL3_BANK   0x40000000
 
#define TLV_START   0x00201004
 
#define TLV_TAG_RESERVED1   1
 
#define TLV_TAG_RESERVED2   2
 
#define TLV_TAG_CS   3
 
#define TLV_TAG_FLASHCTL   4
 
#define TLV_TAG_ADC14   5
 
#define TLV_TAG_RESERVED6   6
 
#define TLV_TAG_RESERVED7   7
 
#define TLV_TAG_REF   8
 
#define TLV_TAG_RESERVED9   9
 
#define TLV_TAG_RESERVED10   10
 
#define TLV_TAG_DEVINFO   11
 
#define TLV_TAG_DIEREC   12
 
#define TLV_TAG_RANDNUM   13
 
#define TLV_TAG_RESERVED14   14
 
#define TLV_TAG_BSL   15
 
#define TLV_TAGEND   0x0BD0E11D
 

Functions

uint_least32_t SysCtl_A_getSRAMSize (void)
 
uint_least32_t SysCtl_A_getFlashSize (void)
 
uint_least32_t SysCtl_A_getInfoFlashSize (void)
 
void SysCtl_A_rebootDevice (void)
 
void SysCtl_A_getTLVInfo (uint_fast8_t tag, uint_fast8_t instance, uint_fast8_t *length, uint32_t **data_address)
 
bool SysCtl_A_enableSRAM (uint32_t addr)
 
bool SysCtl_A_disableSRAM (uint32_t addr)
 
bool SysCtl_A_enableSRAMRetention (uint32_t startAddr, uint32_t endAddr)
 
bool SysCtl_A_disableSRAMRetention (uint32_t startAddr, uint32_t endAddr)
 
void SysCtl_A_enablePeripheralAtCPUHalt (uint_fast16_t devices)
 
void SysCtl_A_disablePeripheralAtCPUHalt (uint_fast16_t devices)
 
void SysCtl_A_setWDTTimeoutResetType (uint_fast8_t resetType)
 
void SysCtl_A_setWDTPasswordViolationResetType (uint_fast8_t resetType)
 
void SysCtl_A_disableNMISource (uint_fast8_t flags)
 
void SysCtl_A_enableNMISource (uint_fast8_t flags)
 
uint_fast8_t SysCtl_A_getNMISourceStatus (void)
 
void SysCtl_A_enableGlitchFilter (void)
 
void SysCtl_A_disableGlitchFilter (void)
 
uint_fast16_t SysCtl_A_getTempCalibrationConstant (uint32_t refVoltage, uint32_t temperature)
 

Detailed Description

System Control A module used for miscellaneous system configurations on MSP432P4111.


Module Operation


Note that this module is for use exclusively on the MSP432P4111. If using the MSP432P401, please refer to the non-a variant.

The SysCtl_A module is a conglomeration of miscellaneous system control modules that do not fit into any specific hardware peripheral.

Some of the functionalities of the SysCtl_A module include:


Programming Example


Macro Definition Documentation

#define SYSCTL_A_HARD_RESET   1
#define SYSCTL_A_SOFT_RESET   0
#define SYSCTL_A_PERIPH_LCD   SYSCTL_A_PERIHALT_CTL_HALT_LCD
#define SYSCTL_A_PERIPH_DMA   SYSCTL_A_PERIHALT_CTL_HALT_DMA
#define SYSCTL_A_PERIPH_WDT   SYSCTL_A_PERIHALT_CTL_HALT_WDT
#define SYSCTL_A_PERIPH_ADC   SYSCTL_A_PERIHALT_CTL_HALT_ADC
#define SYSCTL_A_PERIPH_EUSCIB3   SYSCTL_A_PERIHALT_CTL_HALT_EUB3
#define SYSCTL_A_PERIPH_EUSCIB2   SYSCTL_A_PERIHALT_CTL_HALT_EUB2
#define SYSCTL_A_PERIPH_EUSCIB1   SYSCTL_A_PERIHALT_CTL_HALT_EUB1
#define SYSCTL_A_PERIPH_EUSCIB0   SYSCTL_A_PERIHALT_CTL_HALT_EUB0
#define SYSCTL_A_PERIPH_EUSCIA3   SYSCTL_A_PERIHALT_CTL_HALT_EUA3
#define SYSCTL_A_PERIPH_EUSCIA2   SYSCTL_A_PERIHALT_CTL_HALT_EUA2
#define SYSCTL_A_PERIPH_EUSCIA1   SYSCTL_A_PERIHALT_CTL_HALT_EUA1
#define SYSCTL_A_PERIPH_EUSCIA0   SYSCTL_A_PERIHALT_CTL_HALT_EUA0
#define SYSCTL_A_PERIPH_TIMER32_0_MODULE   SYSCTL_A_PERIHALT_CTL_HALT_T32_0
#define SYSCTL_A_PERIPH_TIMER16_3   SYSCTL_A_PERIHALT_CTL_HALT_T16_3
#define SYSCTL_A_PERIPH_TIMER16_2   SYSCTL_A_PERIHALT_CTL_HALT_T16_2
#define SYSCTL_A_PERIPH_TIMER16_1   SYSCTL_A_PERIHALT_CTL_HALT_T16_1
#define SYSCTL_A_PERIPH_TIMER16_0   SYSCTL_A_PERIHALT_CTL_HALT_T16_0
#define SYSCTL_A_NMIPIN_SRC   SYSCTL_A_NMI_CTLSTAT_PIN_SRC
#define SYSCTL_A_PCM_SRC   SYSCTL_A_NMI_CTLSTAT_PCM_SRC
#define SYSCTL_A_PSS_SRC   SYSCTL_A_NMI_CTLSTAT_PSS_SRC
#define SYSCTL_A_CS_SRC   SYSCTL_A_NMI_CTLSTAT_CS_SRC
#define SYSCTL_A_REBOOT_KEY   0x6900

Referenced by SysCtl_A_rebootDevice().

#define SYSCTL_A_1_2V_REF   (uint32_t)&TLV->ADC14_REF1P2V_TS30C - (uint32_t)TLV_BASE
#define SYSCTL_A_1_45V_REF   (uint32_t)&TLV->ADC14_REF1P45V_TS30C - (uint32_t)TLV_BASE
#define SYSCTL_A_2_5V_REF   (uint32_t)&TLV->ADC14_REF2P5V_TS30C - (uint32_t)TLV_BASE
#define SYSCTL_A_85_DEGREES_C   4
#define SYSCTL_A_30_DEGREES_C   0
#define SYSCTL_A_BANKMASK   0x80000000
#define SRAMCTL_CTL0_BANK   0x10000000
#define SRAMCTL_CTL1_BANK   0x20000000
#define SRAMCTL_CTL2_BANK   0x30000000
#define SRAMCTL_CTL3_BANK   0x40000000
#define TLV_START   0x00201004
#define TLV_TAG_RESERVED1   1
#define TLV_TAG_RESERVED2   2
#define TLV_TAG_CS   3
#define TLV_TAG_FLASHCTL   4
#define TLV_TAG_ADC14   5
#define TLV_TAG_RESERVED6   6
#define TLV_TAG_RESERVED7   7
#define TLV_TAG_REF   8
#define TLV_TAG_RESERVED9   9
#define TLV_TAG_RESERVED10   10
#define TLV_TAG_DEVINFO   11
#define TLV_TAG_DIEREC   12
#define TLV_TAG_RANDNUM   13
#define TLV_TAG_RESERVED14   14
#define TLV_TAG_BSL   15
#define TLV_TAGEND   0x0BD0E11D

Function Documentation

uint_least32_t SysCtl_A_getSRAMSize ( void  )

Gets the size of the SRAM.

Returns
The total number of bytes of SRAM.

Referenced by SysCtl_A_disableSRAM(), SysCtl_A_disableSRAMRetention(), SysCtl_A_enableSRAM(), and SysCtl_A_enableSRAMRetention().

uint_least32_t SysCtl_A_getFlashSize ( void  )
uint_least32_t SysCtl_A_getInfoFlashSize ( void  )

Gets the size of the flash.

Returns
The total number of bytes of flash of INFO flash memory.
Note
This returns the total amount of INFO memory flash. To find how much main memory is available, use the SysCtl_A_getFlashSize function.

Referenced by FlashCtl_A_isMemoryProtected(), FlashCtl_A_performMassErase(), FlashCtl_A_protectMemory(), and FlashCtl_A_unprotectMemory().

void SysCtl_A_rebootDevice ( void  )

Reboots the device and causes the device to re-initialize itself.

Returns
This function does not return.

References SYSCTL_A_REBOOT_KEY.

void SysCtl_A_getTLVInfo ( uint_fast8_t  tag,
uint_fast8_t  instance,
uint_fast8_t *  length,
uint32_t **  data_address 
)

The TLV structure uses a tag or base address to identify segments of the table where information is stored. Some examples of TLV tags are Peripheral Descriptor, Interrupts, Info Block and Die Record. This function retrieves the value of a tag and the length of the tag.

Parameters
tagrepresents the tag for which the information needs to be retrieved. Valid values are:
  • TLV_TAG_RESERVED1
  • TLV_TAG_RESERVED2
  • TLV_TAG_CS
  • TLV_TAG_FLASHCTL
  • TLV_TAG_ADC14
  • TLV_TAG_RESERVED6
  • TLV_TAG_RESERVED7
  • TLV_TAG_REF
  • TLV_TAG_RESERVED9
  • TLV_TAG_RESERVED10
  • TLV_TAG_DEVINFO
  • TLV_TAG_DIEREC
  • TLV_TAG_RANDNUM
  • TLV_TAG_RESERVED14
instanceIn some cases a specific tag may have more than one instance. For example there may be multiple instances of timer calibration data present under a single Timer Cal tag. This variable specifies the instance for which information is to be retrieved (0, 1, etc.). When only one instance exists; 0 is passed.
lengthActs as a return through indirect reference. The function retrieves the value of the TLV tag length. This value is pointed to by *length and can be used by the application level once the function is called. If the specified tag is not found then the pointer is null 0.
data_addressacts as a return through indirect reference. Once the function is called data_address points to the pointer that holds the value retrieved from the specified TLV tag. If the specified tag is not found then the pointer is null 0.
Returns
None

References TLV_START, and TLV_TAGEND.

Referenced by CS_getDCOFrequency(), CS_setDCOFrequency(), FlashCtl_A_eraseSector(), FlashCtl_A_performMassErase(), and FlashCtl_A_programMemory().

bool SysCtl_A_enableSRAM ( uint32_t  addr)

Enables areas of SRAM memory. This can be used to optimize power consumption when every SRAM bank isn't needed. This function takes in a 32-bit address to the area in SRAM to to enable. It will convert this address into the corresponding register settings and set them in the register accordingly. Note that passing an address to an area other than SRAM will result in unreliable behavior. Addresses should be given with reference to the SRAM_DATA area of SRAM (usually starting at 0x20000000).

Parameters
addrBreak address of SRAM to enable. All SRAM below this address will also be enabled. If an unaligned address is given the appropriate aligned address will be calculated.
Note
The first bank of SRAM is reserved and always enabled.
Returns
true if banks were set, false otherwise. If the BNKEN_RDY bit is not set in the STAT register, this function will return false.

References SysCtl_A_getSRAMSize().

bool SysCtl_A_disableSRAM ( uint32_t  addr)

Disables areas of SRAM memory. This can be used to optimize power consumption when every SRAM bank isn't needed. It is important to note that when a higher bank is disabled, all of the SRAM banks above that bank are also disabled. For example, if the address of 0x2001FA0 is given, all SRAM banks from 0x2001FA0 to the top of SRAM will be disabled. This function takes in a 32-bit address to the area in SRAM to to disable. It will convert this address into the corresponding register settings and set them in the register accordingly. Note that passing an address to an area other than SRAM will result in unreliable behavior. Addresses should be given with reference to the SRAM_DATA area of SRAM (usually starting at 0x20000000).

Parameters
addrBreak address of SRAM to disable. All SRAM above this address will also be disabled. If an unaligned address is given the appropriate aligned address will be calculated.
Note
The first bank of SRAM is reserved and always enabled.
Returns
true if banks were set, false otherwise. If the BNKEN_RDY bit is not set in the STAT register, this function will return false.

References SysCtl_A_getSRAMSize().

bool SysCtl_A_enableSRAMRetention ( uint32_t  startAddr,
uint32_t  endAddr 
)

Enables retention of the specified SRAM block address range when the device goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM banks specified with this function will be placed into retention mode. Retention of individual blocks can be set without the restrictions of the enable/disable functions. Note that any memory range given outside of SRAM will result in unreliable behavior. Also note that any unaligned addresses will be truncated to the closest aligned address before the address given. Addresses should be given with reference to the SRAM_DATA area of SRAM (usually starting at 0x20000000).

Parameters
startAddrStart address to enable retention
endtAddrEnd address to enable retention
Note
Block 0 is reserved and retention is always enabled.
Returns
true if banks were set, false otherwise. If the BLKEN_RDY bit is not set in the STAT register, this function will return false.

References SysCtl_A_getSRAMSize().

bool SysCtl_A_disableSRAMRetention ( uint32_t  startAddr,
uint32_t  endAddr 
)

Disables retention of the specified SRAM block address range when the device goes into LPM3 mode. When the system is placed in LPM3 mode, the SRAM banks specified with this function will be placed into retention mode. Retention of individual blocks can be set without the restrictions of the enable/disable functions. Note that any memory range given outside of SRAM will result in unreliable behavior. Also note that any unaligned addresses will be truncated to the closest aligned address before the address given. Addresses should be given with reference to the SRAM_DATA area of SRAM (usually starting at 0x20000000).

Parameters
startAddrStart address to disable retention
endtAddrEnd address to disable retention
Note
Block 0 is reserved and retention is always enabled.
Returns
true if banks were set, false otherwise. If the BLKEN_RDY bit is not set in the STAT register, this function will return false.

References SysCtl_A_getSRAMSize().

void SysCtl_A_enablePeripheralAtCPUHalt ( uint_fast16_t  devices)

Makes it so that the provided peripherals will either halt execution after a CPU HALT. Parameters in this function can be combined to account for multiple peripherals. By default, all peripherals keep running after a CPU HALT.

Parameters
devicesThe peripherals to continue running after a CPU HALT This can be a bitwise OR of the following values:
  • SYSCTL_A_PERIPH_LCD,
  • SYSCTL_A_PERIPH_DMA,
  • SYSCTL_A_PERIPH_WDT,
  • SYSCTL_A_PERIPH_ADC,
  • SYSCTL_A_PERIPH_EUSCIB3,
  • SYSCTL_A_PERIPH_EUSCIB2,
  • SYSCTL_A_PERIPH_EUSCIB1
  • SYSCTL_A_PERIPH_EUSCIB0,
  • SYSCTL_A_PERIPH_EUSCIA3,
  • SYSCTL_A_PERIPH_EUSCIA2
  • SYSCTL_A_PERIPH_EUSCIA1,
  • SYSCTL_A_PERIPH_EUSCIA0,
  • SYSCTL_A_PERIPH_TIMER32_0_MODULE,
  • SYSCTL_A_PERIPH_TIMER16_3,
  • SYSCTL_A_PERIPH_TIMER16_2,
  • SYSCTL_A_PERIPH_TIMER16_1,
  • SYSCTL_A_PERIPH_TIMER16_0
Returns
None.
void SysCtl_A_disablePeripheralAtCPUHalt ( uint_fast16_t  devices)

Makes it so that the provided peripherals will either halt execution after a CPU HALT. Parameters in this function can be combined to account for multiple peripherals. By default, all peripherals keep running after a CPU HALT.

Parameters
devicesThe peripherals to disable after a CPU HALT

The devices parameter can be a bitwise OR of the following values: This can be a bitwise OR of the following values:

  • SYSCTL_A_PERIPH_LCD,
  • SYSCTL_A_PERIPH_DMA,
  • SYSCTL_A_PERIPH_WDT,
  • SYSCTL_A_PERIPH_ADC,
  • SYSCTL_A_PERIPH_EUSCIB3,
  • SYSCTL_A_PERIPH_EUSCIB2,
  • SYSCTL_A_PERIPH_EUSCIB1
  • SYSCTL_A_PERIPH_EUSCIB0,
  • SYSCTL_A_PERIPH_EUSCIA3,
  • SYSCTL_A_PERIPH_EUSCIA2
  • SYSCTL_A_PERIPH_EUSCIA1,
  • SYSCTL_A_PERIPH_EUSCIA0,
  • SYSCTL_A_PERIPH_TIMER32_0_MODULE,
  • SYSCTL_A_PERIPH_TIMER16_3,
  • SYSCTL_A_PERIPH_TIMER16_2,
  • SYSCTL_A_PERIPH_TIMER16_1,
  • SYSCTL_A_PERIPH_TIMER16_0
Returns
None.
void SysCtl_A_setWDTTimeoutResetType ( uint_fast8_t  resetType)

Sets the type of RESET that happens when a watchdog timeout occurs.

Parameters
resetTypeThe type of reset to set

The resetType parameter must be only one of the following values:

  • SYSCTL_A_HARD_RESET,
  • SYSCTL_A_SOFT_RESET
Returns
None.

Referenced by WDT_A_setTimeoutReset().

void SysCtl_A_setWDTPasswordViolationResetType ( uint_fast8_t  resetType)

Sets the type of RESET that happens when a watchdog password violation occurs.

Parameters
resetTypeThe type of reset to set

The resetType parameter must be only one of the following values:

  • SYSCTL_A_HARD_RESET,
  • SYSCTL_A_SOFT_RESET
Returns
None.

Referenced by WDT_A_setPasswordViolationReset().

void SysCtl_A_disableNMISource ( uint_fast8_t  flags)

Disables NMIs for the provided modules. When disabled, a NMI flag will not occur when a fault condition comes from the corresponding modules.

Parameters
flagsThe NMI sources to disable Can be a bitwise OR of the following parameters:
  • SYSCTL_A_NMIPIN_SRC,
  • SYSCTL_A_PCM_SRC,
  • SYSCTL_A_PSS_SRC,
  • SYSCTL_A_CS_SRC

Referenced by CS_startHFXTWithTimeout(), and CS_startLFXTWithTimeout().

void SysCtl_A_enableNMISource ( uint_fast8_t  flags)

Enables NMIs for the provided modules. When enabled, a NMI flag will occur when a fault condition comes from the corresponding modules.

Parameters
flagsThe NMI sources to enable Can be a bitwise OR of the following parameters:
  • SYSCTL_A_NMIPIN_SRC,
  • SYSCTL_A_PCM_SRC,
  • SYSCTL_A_PSS_SRC,
  • SYSCTL_A_CS_SRC

Referenced by CS_startHFXTWithTimeout(), and CS_startLFXTWithTimeout().

uint_fast8_t SysCtl_A_getNMISourceStatus ( void  )

Returns the current sources of NMIs that are enabled

Returns
NMI source status

Referenced by CS_startHFXTWithTimeout(), and CS_startLFXTWithTimeout().

void SysCtl_A_enableGlitchFilter ( void  )

Enables glitch suppression on the reset pin of the device. Refer to the device data sheet for specific information about glitch suppression

Returns
None.
void SysCtl_A_disableGlitchFilter ( void  )

Disables glitch suppression on the reset pin of the device. Refer to the device data sheet for specific information about glitch suppression

Returns
None.
uint_fast16_t SysCtl_A_getTempCalibrationConstant ( uint32_t  refVoltage,
uint32_t  temperature 
)

Retrieves the calibration constant of the temperature sensor to be used in temperature calculation.

Parameters
refVoltageReference voltage being used.

The refVoltage parameter must be only one of the following values:

  • SYSCTL_A_1_2V_REF
  • SYSCTL_A_1_45V_REF
  • SYSCTL_A_2_5V_REF
Parameters
temperatureis the calibration temperature that the user wants to be returned.

The temperature parameter must be only one of the following values:

  • SYSCTL_A_30_DEGREES_C
  • SYSCTL_A_85_DEGREES_C
Returns
None.

References HWREG16.


Copyright 2019, Texas Instruments Incorporated