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SPILPF3DMA.h File Reference

Detailed Description

SPI driver implementation for a Low Power F3 device SPI controller using the UDMA controller.


Driver include

The SPI header file should be included in an application as follows:

#include <ti/drivers/SPI.h> #include <ti/drivers/spi/SPILPF3DMA.h> #include
<ti/drivers/dma/UDMALPF3.h>

Refer to SPI.h for a complete description of APIs.

Note that the user also needs to include the UDMALPF3.h driver since the SPI uses uDMA in order to improve throughput.

Overview

The general SPI API should be used in application code, i.e. SPI_open() should be used instead of SPILPF3DMA_open(). The board file will define the device specific config, and casting in the general API will ensure that the correct device specific functions are called. This is also reflected in the example code in Use Cases.

General Behavior

Before using SPI on Low Power F3 devices:

The following is true for peripheral operation:

The following apply for controller operation:

After SPI operation has ended:

The callback function is always called in a SWI context.

Error handling

If an RX overrun occurs during peripheral operation:

Timeout

Timeout can occur in SPI_MODE_BLOCKING, there's no timeout in SPI_MODE_CALLBACK. When in SPI_MODE_CALLBACK, the transfer must be cancelled by calling SPI_transferCancel().
If a timeout happens in either SPI_PERIPHERAL or SPI_CONTROLLER mode, the receive buffer will contain the bytes received up until the timeout occurred. The SPI transaction status will be set to SPI_TRANSFER_FAILED. The SPI transaction count will be set to the number of bytes sent/received before timeout. The remaining bytes will be flushed from the TX FIFO so that the subsequent transfer can be executed correctly. Note that specifying a timeout prevents the driver from performing a polling transfer when in peripheral mode.

Power Management

The TI-RTOS power management framework will try to put the device into the most power efficient mode whenever possible. Please see the technical reference manual for further details on each power mode.

The SPILPF3DMA.h driver is setting a power constraint during transfers to keep the device out of standby. When the transfer has finished, the power constraint is released. The following statements are valid:

Note
The external hardware connected to the SPI might have some pull configured on the SPI lines. When the SPI is inactive, this might cause leakage on the IO and the current consumption to increase. The application must configure a pull configuration that aligns with the external hardware. See Ensure low power during inactive periods for code example.

SPI details

Chip Select

This SPI controller supports a hardware chip select pin. Refer to the user manual on how this hardware chip select pin behaves in regards to the SPI frame format.

Chip select type SPI_CONTROLLER mode SPI_PERIPHERAL mode
Hardware chip select No action is needed by the application to select the peripheral. See the device documentation on it's chip select requirements.
Software chip select The application is responsible to ensure that correct SPI peripheral is selected before performing a SPI_transfer(). See the device documentation on it's chip select requirements.

Multiple peripherals when operating in controller mode

In a scenario where the SPI module is operating in controller mode with multiple SPI peripherals, the chip select pin can be reallocated at runtime to select the appropriate peripheral device. See Controller Mode With Multiple Peripherals" use case below. This is only relevant when chip select is a hardware chip select. Otherwise the application can control the chip select pins directly using the GPIO driver.

Data Frames

SPI data frames can be any size from 4-bits to 16-bits. If the dataSize in SPI_Params is greater that 8-bits, then the SPILPF3DMA driver implementation will assume that the SPI_Transaction txBuf and rxBuf point to an array of 16-bit uint16_t elements.

dataSize buffer element size
4-8 bits uint8_t
9-16 bits uint16_t

Bit Rate

When the SPI is configured as SPI peripheral, the maximum bit rate is 8MHz.

When the SPI is configured as SPI controller, the maximum bit rate is 12MHz.

UDMA

Interrupts

The UDMA module generates IRQs on the SPI interrupt vector. This driver automatically installs a UDMA aware Hwi (interrupt) to service the assigned UDMA channels.

Transfer Size Limit

The UDMA controller only supports data transfers of up to 1024 data frames. A transfer with more than 1024 frames will be transmitted/received in multiple 1024 sized portions until all data has been transmitted/received. A data frame can be 4 to 16 bits in length.

Scratch Buffers

A uint16_t scratch buffer is used to allow SPI_transfers where txBuf or rxBuf are NULL. Rather than requiring txBuf or rxBuf to have a dummy buffer of size of the transfer count, a single-word UDMA accessible uint16_t scratch buffer is used. When rxBuf is NULL, the UDMA will transfer all the received SPI data into the scratch buffer as a "bit-bucket". When txBuf is NULL, the scratch buffer is initialized to defaultTxBufValue so the uDMA will send some known value. Each SPI driver instance uses its own scratch buffer.

TX and RX buffers

Before SPI_transfer, txBuf should be filled with the outgoing SPI data. These data are sent out during the transfer, while the incoming data are received into rxBuf. To save memory space, txBuf and rxBuf can be assigned to the same buffer location. At the beginning of the transfer, this buffer holds outgoing data. At the end of the transfer, the outgoing data are overwritten and the buffer holds the received SPI data.

Polling SPI transfers

When used in blocking mode small SPI transfers are can be done by polling the peripheral & sending data frame-by-frame. A controller device can perform the transfer immediately and return, but a peripheral will block until it receives the number of frames specified in the SPI_Transfer() call. The minDmaTransferSize field in the hardware attributes is the threshold; if the transaction count is below the threshold a polling transfer is performed; otherwise a DMA transfer is done. This is intended to reduce the overhead of setting up a DMA transfer to only send a few data frames.

Notes:

Supported Functions

Generic API function API function Description
SPI_init() SPICC26X4DMA_init() Initialize SPI driver
SPI_open() SPICC26X4DMA_open() Initialize SPI HW and set system dependencies
SPI_close() SPICC26X4DMA_close() Disable SPI and UDMA HW and release system dependencies
SPI_control() SPICC26X4DMA_control() Configure an already opened SPI handle
SPI_transfer() SPICC26X4DMA_transfer() Start transfer from SPI
SPI_transferCancel() SPICC26X4DMA_transferCancel() Cancel ongoing transfer from SPI
Note
All calls should go through the generic API

Use Cases

Basic Peripheral Mode

Receive 100 bytes over SPI in SPI_MODE_BLOCKING.

SPI_Handle handle; SPI_Params params; SPI_Transaction transaction; uint8_t
rxBuf[100]; // Receive buffer
// Init SPI and specify non-default parameters SPI_Params_init(&params);
params.bitRate = 1000000; params.frameFormat = SPI_POL1_PHA1;
// Configure the transaction transaction.count = 100; transaction.txBuf =
NULL; transaction.rxBuf = rxBuf;
// Open the SPI and perform the transfer handle = SPI_open(CONFIG_SPI,
&params); SPI_transfer(handle, &transaction);

Peripheral Mode With Return Partial

This use case will perform a transfer in SPI_MODE_BLOCKING until the wanted amount of bytes is transferred or until chip select is deasserted by the SPI controller. This SPI_transfer() call can be used when unknown amount of bytes shall be transferred. Note: The partial return is also possible in SPI_MODE_CALLBACK mode. Note: Polling transfers are not available when using return partial mode.

SPI_Handle handle; SPI_Params params; SPI_Transaction transaction; uint8_t
rxBuf[100]; // Receive buffer
// Init SPI and specify non-default parameters SPI_Params_init(&params);
params.bitRate = 1000000; params.frameFormat = SPI_POL1_PHA1;
// Configure the transaction transaction.count = 100; transaction.txBuf =
NULL; transaction.rxBuf = rxBuf;
// Open the SPI and initiate the partial read handle = SPI_open(CONFIG_SPI,
// Enable RETURN_PARTIAL SPI_control(handle,
// Begin transfer SPI_transfer(handle, &transaction);

Continuous Peripheral Transfer In SPI_MODE_CALLBACK

This use case will configure the SPI driver to transfer continuously in SPI_MODE_CALLBACK, 16 bytes at the time and echoing received data after every 16 bytes.

// Callback function static void transferCallback(SPI_Handle handle,
SPI_Transaction *transaction)
{
// Start another transfer
SPI_transfer(handle, transaction);
}
static void taskFxn(uintptr_t a0, uintptr_t a1)
{
SPI_Handle handle;
SPI_Transaction transaction;
uint8_t buf[16]; // Receive and transmit buffer
// Init SPI and specify non-default parameters
SPI_Params_init(&params);
params.bitRate = 1000000;
params.mode = SPI_PERIPHERAL;
params.transferCallbackFxn = transferCallback;
// Configure the transaction
transaction.count = 16;
transaction.txBuf = buf;
transaction.rxBuf = buf;
// Open the SPI and initiate the first transfer
handle = SPI_open(CONFIG_SPI, &params);
SPI_transfer(handle, &transaction);
// Wait forever
while(true);
}

Basic Controller Mode

This use case will configure a SPI controller to send the data in txBuf while receiving data to rxBuf in BLOCKING_MODE.

SPI_Handle handle; SPI_Params params; SPI_Transaction transaction; uint8_t
txBuf[] = "Hello World"; // Transmit buffer uint8_t rxBuf[11];
// Receive buffer
// Init SPI and specify non-default parameters SPI_Params_init(&params);
params.bitRate = 1000000; params.frameFormat = SPI_POL1_PHA1;
// Configure the transaction transaction.count = sizeof(txBuf);
transaction.txBuf = txBuf; transaction.rxBuf = rxBuf;
// Open the SPI and perform the transfer handle = SPI_open(CONFIG_SPI,
&params); SPI_transfer(handle, &transaction);

Controller Mode With Multiple Peripherals

This use case will configure a SPI controller to send data to one peripheral and then to another in BLOCKING_MODE. It is assumed that SysConfig is configured so that the two chip select pins have a default setting of a high output and that the SPILPF3DMA_HWAttrs used points to one of them since the SPI driver will revert to this default setting when switching the chip select pin.

// From ti_drivers_config.c // Use the sysconfig settings to make sure both
pins are set to HIGH when not in use GPIO_PinConfig gpioPinConfigs[31] = {
...
...
}
const SPILPF3DMA_HWAttrs SPILPF3DMAHWAttrs[CONFIG_SPI_COUNT] = { { // Use
SPI0 module with default chip select on CONFIG_CSN_0 .baseAddr = SPI0_BASE,
.intNum = INT_SPI0_COMB, .intPriority = (~0), .swiPriority = 0, .powerID =
PowerLPF3_PERIPH_SPI0, .defaultTxBufValue = 0xFF, .rxChannelBitMask =
UDMA_CHANNEL_1_M, .txChannelBitMask = UDMA_CHANNEL_0_M, .rxChannelEvtMux =
EVTSVT_DMACH1SEL_IPID_SPI0RXTRG, .txChannelEvtMux =
EVTSVT_DMACH0SEL_IPID_SPI0TXTRG, .dmaTxTableEntryPri =
&dmaChannel0ControlTableEntry, .dmaRxTableEntryPri =
&dmaChannel1ControlTableEntry, .dmaTxTableEntryAlt =
&dmaChannel0AltControlTableEntry, .dmaRxTableEntryAlt =
&dmaChannel1AltControlTableEntry, .minDmaTransferSize = 10, .picoPinMux =
.sclkPinMux = GPIO_MUX_PORTCFG_PFUNC4, .csnPinMux =
GPIO_MUX_PORTCFG_PFUNC1, .picoPin = CONFIG_GPIO_SPI_CONTROLLER_PICO,
.pociPin = CONFIG_GPIO_SPI_CONTROLLER_POCI, .sclkPin =
CONFIG_GPIO_SPI_CONTROLLER_SCLK, .csnPin = CONFIG_SPI_CSN_0,
}
// From your_application.c static void taskFxn(uintptr_t a0, uintptr_t a1)
{
SPI_Handle handle;
SPI_Transaction transaction;
uint_least8_t csnPin1 = CONFIG_CSN_1;
uint8_t txBuf[] = "Hello World"; // Transmit buffer
// Init SPI and specify non-default parameters
SPI_Params_init(&params);
params.bitRate = 1000000;
params.mode = SPI_CONTROLLER;
// Configure the transaction
transaction.count = sizeof(txBuf);
transaction.txBuf = txBuf;
transaction.rxBuf = NULL;
// Open the SPI and perform transfer to the first peripheral
handle = SPI_open(CONFIG_SPI, &params);
SPI_transfer(handle, &transaction);
// Then switch chip select pin and perform transfer to the second
peripheral
SPI_control(handle, SPILPF3DMA_SET_CSN_PIN, &csnPin1);
SPI_transfer(handle, &transaction);
}

Queueing Transactions in Callback Mode

Below is an example of queueing three transactions

// SPI already opened in callback mode SPI_Transaction t0, t1, t2;
t0.txBuf = txBuff0; t0.rxBuf = rxBuff0; t0.count = 2000;
t1.txBuf = txBuff1; t1.rxBuf = rxBuff1; t1.count = 1000;
t2.txBuf = txBuff2; t2.rxBuf = NULL; t2.count = 1000;
bool transferOk = false;
if (SPI_transfer(spiHandle, &t0)) { if (SPI_transfer(spiHandle, &t1)) {
transferOk = SPI_transfer(spiHandle, &t2);
}
}
}

Queueing in Manual Start Mode

This example shows a peripheral device queueing two transactions that will complete one after the other. From the controller's perspective there will be one long transfer.

Note
Manual mode also works while the device is in SPI_CONTROLLER mode. The control call to MANUAL_START will start the transfers.
Warning
Manual start mode should not be enabled or disabled while a transaction is in progress.

SPI_Handle spi; SPI_Params params; SPI_Transaction t0, t1; uint8_t status =
SPI_Params_init(&params); params.mode = SPI_PERIPHERAL; spi =
SPI_open(CONFIG_SPI, &params);
if (spi == NULL) { exit(0);
}
// Enable manual start mode SPI_control(spi, SPILPF3DMA_CMD_SET_MANUAL,
NULL);
// Queue transactions t0.txBuf = txBuff0; t0.rxBuf = rxBuff0; t0.count =
2000; if (!SPI_transfer(spi, &t0)) { status = SPI_STATUS_FAIL;
}
t1.txBuf = txBuff1; t1.rxBuf = rxBuff1; t1.count = 1000; if
(!SPI_transfer(spi, &t1)) { status = SPI_STATUS_FAIL;
}
// Enable the transfers if (status == SPI_STATUS_SUCCESS) { SPI_control(spi,
}
else { status = SPI_STATUS_FAILURE;
}
// At this point the peripheral is ready for the controller to start the
transfer // Assume the callback implementation (not shown) posts a semaphore
when // the last transaction completes sem_wait(&spiSemaphore);
// Disable manual start mode SPI_control(spi, SPILPF3DMA_CMD_CLR_MANUAL,
NULL);

Ensure low power during inactive periods

External hardware connected on the SPI, i.e. SPI controller/peripheral, might have configured a pull on one or more of the SPI lines. Dependent on the hardware, it might conflict with the pull used for the Low Power F3 device SPI. To avoid increased leakage and ensure the lowest possible power consumption when the SPI is inactive, the application must configure a matching pull on the SPI IOs. An example of how this can be done is shown below.

SPI_Params params; SPI_Transaction transaction; uint8_t txBuf[] =
"Heartbeat"; // Transmit buffer uint8_t rxBuf[9]; //
Receive buffer uint32_t standbyDurationMs = 100;
// Init SPI and specify non-default parameters SPI_Params_init(&params);
params.bitRate = 1000000; params.frameFormat = SPI_POL1_PHA1;
// Configure the transaction transaction.count = sizeof(txBuf);
transaction.txBuf = txBuf; transaction.rxBuf = rxBuf;
// Open the SPI and perform the transfer handle = SPI_open(CONFIG_SPI_0,
// Apply low power sleep pull config for POCI
GPIO_setConfig(CONFIG_GPIO_SPI_0_POCI, GPIO_CFG_IN_PU);
// Do forever while(1) { // Transfer data SPI_transfer(handle,
&transaction); // Sleep Task_sleep(standbyDurationMs*100);
}

Wake Up On Chip Select Deassertion In Peripheral Mode Using SPI_MODE_CALLBACK

This example demonstrates using a GPIO callback on Chip Select to wake up the device to allow low power modes while waiting for a chip select edge.

In sysconfig or the board file, the CSN GPIO should be configured as input/pull up with an interrupt on falling edge. Otherwise, SPI_close() will reset the pin to the wrong settings and you may see line glitches.

*Note: The SPI controller must allow enough time between deasserting the chip select and the start of the transaction for the SPI peripheral to wake up and open up the SPI driver.

// Global variables SPI_Handle spiHandle SPI_Params spiParams;
SPI_Transaction spiTransaction; const uint8_t transferSize = 8; uint8_t
txBuf[8];
// Chip select callback static void chipSelectCallback(uint_least8_t)
{
// Open SPI driver, which will override any previous GPIO configuration
spiHandle = SPI_open(CONFIG_SPI, &spiParams);
// Issue the transfer
SPI_transfer(spiHandle, &spiTransaction);
}
// SPI transfer callback static void transferCallback(SPI_Handle handle,
SPI_Transaction *transaction)
{
// Close the SPI driver
SPI_close(handle);
// Note: SPI_close() will reset the pin configuration, so it is
important to
// set the default values correctly in sysconfig. We just need to set
the
// callback and enable the falling edge interrupt
GPIO_setCallback(CS_PIN_INDEX, chipSelectCallback);
GPIO_enableInt(CS_PIN_INDEX);
}
// From your_application.c static void taskFxn(uintptr_t a0, uintptr_t a1)
{
uint8_t i;
// Setup SPI params
SPI_Params_init(&spiParams);
spiParams.bitRate = 1000000;
spiParams.mode = SPI_PERIPHERAL;
spiParams.dataSize = transferSize;
spiParams.transferCallbackFxn = transferCallback;
// Setup SPI transaction
spiTransaction.arg = NULL;
spiTransaction.count = transferSize;
spiTransaction.txBuf = txBuf;
spiTransaction.rxBuf = txBuf;
// First echo message
for (i = 0; i < transferSize; i++) {
txBuf[i] = i;
}
// Configure chip select callback
GPIO_setCallback(CS_PIN_INDEX, chipSelectCallback);
GPIO_enableInt(CS_PIN_INDEX);
// Wait forever
while(true);
}

#include <stdint.h>
#include <ti/drivers/SPI.h>
#include <ti/drivers/gpio/GPIOLPF3.h>
#include <ti/drivers/dma/UDMALPF3.h>
#include <ti/drivers/Power.h>
#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/SemaphoreP.h>
#include <ti/drivers/dpl/SwiP.h>
Include dependency graph for SPILPF3DMA.h:

Go to the source code of this file.

Data Structures

struct  SPILPF3DMA_HWAttrs
 SPILPF3DMA Hardware attributes. More...
 
struct  SPILPF3DMA_Object
 SPILPF3DMA Object. More...
 

Macros

#define SPILPF3DMA_CMD_RETURN_PARTIAL_ENABLE   (SPI_CMD_RESERVED + 0)
 Command used by SPI_control() to enable partial return. More...
 
#define SPILPF3DMA_CMD_RETURN_PARTIAL_DISABLE   (SPI_CMD_RESERVED + 1)
 Command used by SPI_control() to disable partial return. More...
 
#define SPILPF3DMA_CMD_SET_CSN_PIN   (SPI_CMD_RESERVED + 2)
 Command used by SPI_control() to re-configure chip select pin. More...
 
#define SPILPF3DMA_CMD_CLEAR_CSN_PIN   (SPI_CMD_RESERVED + 3)
 Command used by SPI_control() to clear the chip select pin. More...
 
#define SPILPF3DMA_CMD_SET_MANUAL   (SPI_CMD_RESERVED + 4)
 Command used by SPI_control() to enable manual start mode. More...
 
#define SPILPF3DMA_CMD_CLR_MANUAL   (SPI_CMD_RESERVED + 5)
 Command used by SPI_control() to disable manual start mode. More...
 
#define SPILPF3DMA_CMD_MANUAL_START   (SPI_CMD_RESERVED + 6)
 Command used by SPI_control() to enable manual start mode. More...
 
#define SPILPF3DMA_CMD_SET_SAMPLE_DELAY   (SPI_CMD_RESERVED + 7)
 Command used by SPI_control() to set the sample delay in controller mode. More...
 
#define SPILPF3DMA_RETURN_PARTIAL_ENABLE   SPILPF3DMA_CMD_RETURN_PARTIAL_ENABLE
 
#define SPILPF3DMA_RETURN_PARTIAL_DISABLE   SPILPF3DMA_CMD_RETURN_PARTIAL_DISABLE
 
#define SPILPF3DMA_SET_CSN_PIN   SPILPF3DMA_CMD_SET_CSN_PIN
 

Enumerations

enum  SPILPF3DMA_FrameSize { SPILPF3DMA_8bit = 0, SPILPF3DMA_16bit = 1 }
 
enum  SPILPF3DMA_ReturnPartial { SPILPF3DMA_retPartDisabled = 0, SPILPF3DMA_retPartEnabledIntNotSet = 1, SPILPF3DMA_retPartEnabledIntSet = 2 }
 

Variables

const SPI_FxnTable SPILPF3DMA_fxnTable
 

Macro Definition Documentation

§ SPILPF3DMA_RETURN_PARTIAL_ENABLE

#define SPILPF3DMA_RETURN_PARTIAL_ENABLE   SPILPF3DMA_CMD_RETURN_PARTIAL_ENABLE

§ SPILPF3DMA_RETURN_PARTIAL_DISABLE

#define SPILPF3DMA_RETURN_PARTIAL_DISABLE   SPILPF3DMA_CMD_RETURN_PARTIAL_DISABLE

§ SPILPF3DMA_SET_CSN_PIN

#define SPILPF3DMA_SET_CSN_PIN   SPILPF3DMA_CMD_SET_CSN_PIN

Enumeration Type Documentation

§ SPILPF3DMA_FrameSize

Enumerator
SPILPF3DMA_8bit 
SPILPF3DMA_16bit 

§ SPILPF3DMA_ReturnPartial

Enumerator
SPILPF3DMA_retPartDisabled 
SPILPF3DMA_retPartEnabledIntNotSet 
SPILPF3DMA_retPartEnabledIntSet 

Variable Documentation

§ SPILPF3DMA_fxnTable

const SPI_FxnTable SPILPF3DMA_fxnTable
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