Data Structures | Macros | Enumerations | Functions
PowerCC27XX.h File Reference

Detailed Description

Power manager interface for CC27XX.

============================================================================

The Power header file should be included in an application by including the top level header file as follows:

#include <ti/drivers/Power.h>

Refer to Power.h for a complete description of APIs.

Implementation

This header file defines the power resources, constraints, events, sleep states and transition latencies for CC27XX.

#include <ti/drivers/dpl/HwiP.h>
#include <ti/drivers/dpl/ClockP.h>
#include <ti/drivers/Power.h>
#include <ti/devices/DeviceFamily.h>
#include <DeviceFamily_constructPath(inc/hw_pmctl.h)>
#include <DeviceFamily_constructPath(inc/hw_clkctl.h)>
#include <DeviceFamily_constructPath(inc/hw_lrfddbell.h)>
#include <DeviceFamily_constructPath(inc/hw_memmap.h)>
#include <DeviceFamily_constructPath(inc/hw_types.h)>
#include <DeviceFamily_constructPath(driverlib/pmctl.h)>
Include dependency graph for PowerCC27XX.h:

Go to the source code of this file.

Data Structures

struct  PowerCC27XX_Config
 Global configuration structure. More...
 

Macros

#define PowerCC27XX_RESUMETIMESTANDBY   400
 
#define PowerCC27XX_TOTALTIMESTANDBY   500
 
#define PowerCC27XX_WAKEDELAYSTANDBY   100
 
#define PowerLPF3_PERIPH_GPIO   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_GPIO_S)
 
#define PowerLPF3_PERIPH_UART0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_UART0_S)
 
#define PowerLPF3_PERIPH_UART1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_UART1_S)
 
#define PowerLPF3_PERIPH_I2C0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_I2C0_S)
 
#define PowerLPF3_PERIPH_SPI0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_SPI0_S)
 
#define PowerLPF3_PERIPH_SPI1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_SPI1_S)
 
#define PowerLPF3_PERIPH_ADC0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_ADC0_S)
 
#define PowerLPF3_PERIPH_AES   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LAES_S)
 
#define PowerLPF3_PERIPH_DMA   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_DMA_S)
 
#define PowerLPF3_PERIPH_I2S   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_I2S_S)
 
#define PowerLPF3_PERIPH_LGPT0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT0_S)
 
#define PowerLPF3_PERIPH_LGPT1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT1_S)
 
#define PowerLPF3_PERIPH_LGPT2   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT2_S)
 
#define PowerLPF3_PERIPH_LGPT3   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT3_S)
 
#define PowerLPF3_PERIPH_HSM   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_HSM_S)
 
#define PowerLPF3_PERIPH_VCE   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_VCE_S)
 
#define PowerLPF3_PERIPH_MCAN   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_MCAN_S)
 
#define PowerLPF3_PERIPH_LFRD_TRC   (PowerCC27XX_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_TRC_S)
 
#define PowerLPF3_PERIPH_LFRD_S2RRAM   (PowerCC27XX_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_S2RRAM_S)
 
#define PowerLPF3_STANDBY   0x1
 
#define PowerLPF3_DISALLOW_SHUTDOWN   0
 
#define PowerLPF3_DISALLOW_STANDBY   1
 
#define PowerLPF3_DISALLOW_IDLE   2
 
#define PowerLPF3_NEED_FLASH_IN_IDLE   3
 
#define PowerLPF3_ENTERING_STANDBY   (1 << 0)
 
#define PowerLPF3_ENTERING_SHUTDOWN   (1 << 1)
 
#define PowerLPF3_AWAKE_STANDBY   (1 << 2)
 
#define PowerLPF3_HFXT_AVAILABLE   (1 << 3)
 
#define PowerLPF3_LFCLK_SWITCHED   (1 << 4)
 

Enumerations

enum  PowerLPF3_ResetReason {
  PowerLPF3_RESET_SHUTDOWN_IO = PMCTL_RESET_SHUTDOWN_IO, PowerLPF3_RESET_SHUTDOWN_SWD = PMCTL_RESET_SHUTDOWN_SWD, PowerLPF3_RESET_WATCHDOG = PMCTL_RESET_WATCHDOG, PowerLPF3_RESET_SYSTEM = PMCTL_RESET_SYSTEM,
  PowerLPF3_RESET_CPU = PMCTL_RESET_CPU, PowerLPF3_RESET_LOCKUP = PMCTL_RESET_LOCKUP, PowerLPF3_RESET_TSD = PMCTL_RESET_TSD, PowerLPF3_RESET_SWD = PMCTL_RESET_SWD,
  PowerLPF3_RESET_LFXT = PMCTL_RESET_LFXT, PowerLPF3_RESET_VDDR = PMCTL_RESET_VDDR, PowerLPF3_RESET_VDDS = PMCTL_RESET_VDDS, PowerLPF3_RESET_PIN = PMCTL_RESET_PIN,
  PowerLPF3_RESET_POR = PMCTL_RESET_POR, PowerLPF3_RESET_SHUTDOWN_IO = PMCTL_RESET_SHUTDOWN_IO, PowerLPF3_RESET_SHUTDOWN_SWD = PMCTL_RESET_SHUTDOWN_SWD, PowerLPF3_RESET_WATCHDOG = PMCTL_RESET_WATCHDOG,
  PowerLPF3_RESET_SYSTEM = PMCTL_RESET_SYSTEM, PowerLPF3_RESET_CPU = PMCTL_RESET_CPU, PowerLPF3_RESET_LOCKUP = PMCTL_RESET_LOCKUP, PowerLPF3_RESET_TSD = PMCTL_RESET_TSD,
  PowerLPF3_RESET_SWD = PMCTL_RESET_SWD, PowerLPF3_RESET_LFXT = PMCTL_RESET_LFXT, PowerLPF3_RESET_VDDR = PMCTL_RESET_VDDR, PowerLPF3_RESET_VDDS = PMCTL_RESET_VDDS,
  PowerLPF3_RESET_PIN = PMCTL_RESET_PIN, PowerLPF3_RESET_POR = PMCTL_RESET_POR
}
 Reasons the device has booted or rebooted. More...
 
enum  PowerLPF3_AfoscFreq { PowerLPF3_AFOSC_FREQ_80MHZ = 80000000, PowerLPF3_AFOSC_FREQ_90P3168MHZ = 90316800, PowerLPF3_AFOSC_FREQ_98P304MHZ = 98304000 }
 The possible frequencies to configure the AFOSC to. More...
 

Functions

void PowerCC27XX_doWFI (void)
 The wait for interrupt (WFI) policy. More...
 
static PowerLPF3_ResetReason PowerLPF3_getResetReason (void)
 Returns the reason for the most recent reset or wakeup. More...
 
static void PowerLPF3_releaseLatches (void)
 Unlatch all IOs. More...
 
void PowerCC27XX_standbyPolicy (void)
 The STANDBY Power Policy. More...
 
void PowerLPF3_selectLFOSC (void)
 Select LFOSC as LFCLK source. More...
 
void PowerLPF3_selectLFXT (void)
 Select LFXT as LFCLK source. More...
 
int_fast16_t PowerLPF3_startAFOSC (PowerLPF3_AfoscFreq frequency)
 Start the AFOSC. More...
 
void PowerLPF3_stopAFOSC (void)
 Stop the AFOSC. More...
 
void PowerCC27XX_schedulerDisable (void)
 
void PowerCC27XX_schedulerRestore (void)
 

Macro Definition Documentation

§ PowerCC27XX_RESUMETIMESTANDBY

#define PowerCC27XX_RESUMETIMESTANDBY   400

The latency to reserve for resume from STANDBY (usec).

§ PowerCC27XX_TOTALTIMESTANDBY

#define PowerCC27XX_TOTALTIMESTANDBY   500

The total latency to reserve for entry to and exit from STANDBY (usec).

§ PowerCC27XX_WAKEDELAYSTANDBY

#define PowerCC27XX_WAKEDELAYSTANDBY   100

The initial delay when waking from STANDBY (usec).

§ PowerLPF3_PERIPH_GPIO

#define PowerLPF3_PERIPH_GPIO   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_GPIO_S)

Resource ID: General Purpose I/O

§ PowerLPF3_PERIPH_UART0

#define PowerLPF3_PERIPH_UART0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_UART0_S)

Resource ID: UART 0

§ PowerLPF3_PERIPH_UART1

#define PowerLPF3_PERIPH_UART1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_UART1_S)

Resource ID: UART 1

§ PowerLPF3_PERIPH_I2C0

#define PowerLPF3_PERIPH_I2C0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_I2C0_S)

Resource ID: I2C 0

§ PowerLPF3_PERIPH_SPI0

#define PowerLPF3_PERIPH_SPI0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_SPI0_S)

Resource ID: SPI 0

§ PowerLPF3_PERIPH_SPI1

#define PowerLPF3_PERIPH_SPI1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_SPI1_S)

Resource ID: SPI 1

§ PowerLPF3_PERIPH_ADC0

#define PowerLPF3_PERIPH_ADC0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_ADC0_S)

Resource ID: ADC

§ PowerLPF3_PERIPH_AES

#define PowerLPF3_PERIPH_AES   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LAES_S)

Resource ID: AES Security Module

§ PowerLPF3_PERIPH_DMA

#define PowerLPF3_PERIPH_DMA   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_DMA_S)

Resource ID: uDMA Controller

§ PowerLPF3_PERIPH_I2S

#define PowerLPF3_PERIPH_I2S   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_I2S_S)

Resource ID: I2S

§ PowerLPF3_PERIPH_LGPT0

#define PowerLPF3_PERIPH_LGPT0   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT0_S)

Resource ID: General Purpose Timer 0

§ PowerLPF3_PERIPH_LGPT1

#define PowerLPF3_PERIPH_LGPT1   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT1_S)

Resource ID: General Purpose Timer 1

§ PowerLPF3_PERIPH_LGPT2

#define PowerLPF3_PERIPH_LGPT2   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT2_S)

Resource ID: General Purpose Timer 2

§ PowerLPF3_PERIPH_LGPT3

#define PowerLPF3_PERIPH_LGPT3   (PowerCC27XX_PERIPH_GROUP_CLKCTL0 | CLKCTL_DESCEX0_LGPT3_S)

Resource ID: General Purpose Timer 3

§ PowerLPF3_PERIPH_HSM

#define PowerLPF3_PERIPH_HSM   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_HSM_S)

Resource ID: Hardware Security Module

§ PowerLPF3_PERIPH_VCE

#define PowerLPF3_PERIPH_VCE   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_VCE_S)

Resource ID: Vector Computational Engine

§ PowerLPF3_PERIPH_MCAN

#define PowerLPF3_PERIPH_MCAN   (PowerCC27XX_PERIPH_GROUP_CLKCTL1 | CLKCTL_DESCEX1_MCAN_S)

Resource ID: MCAN

§ PowerLPF3_PERIPH_LFRD_TRC

#define PowerLPF3_PERIPH_LFRD_TRC   (PowerCC27XX_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_TRC_S)

Resource ID: LRFD Tracer

§ PowerLPF3_PERIPH_LFRD_S2RRAM

#define PowerLPF3_PERIPH_LFRD_S2RRAM   (PowerCC27XX_PERIPH_GROUP_LRFD | LRFDDBELL_CLKCTL_S2RRAM_S)

Resource ID: LRFD S2R RAM

§ PowerLPF3_STANDBY

#define PowerLPF3_STANDBY   0x1

The STANDBY sleep state

§ PowerLPF3_DISALLOW_SHUTDOWN

#define PowerLPF3_DISALLOW_SHUTDOWN   0

Constraint: Disallow a transition to the SHUTDOWN state

§ PowerLPF3_DISALLOW_STANDBY

#define PowerLPF3_DISALLOW_STANDBY   1

Constraint: Disallow a transition to the STANDBY sleep state

§ PowerLPF3_DISALLOW_IDLE

#define PowerLPF3_DISALLOW_IDLE   2

Constraint: Disallow a transition to the IDLE sleep state

§ PowerLPF3_NEED_FLASH_IN_IDLE

#define PowerLPF3_NEED_FLASH_IN_IDLE   3

Constraint: Flash memory needs to enabled during IDLE

§ PowerLPF3_ENTERING_STANDBY

#define PowerLPF3_ENTERING_STANDBY   (1 << 0)

Power event: The device is entering the STANDBY sleep state

§ PowerLPF3_ENTERING_SHUTDOWN

#define PowerLPF3_ENTERING_SHUTDOWN   (1 << 1)

Power event: The device is entering the SHUTDOWN state

§ PowerLPF3_AWAKE_STANDBY

#define PowerLPF3_AWAKE_STANDBY   (1 << 2)

Power event: The device is waking up from the STANDBY sleep state

§ PowerLPF3_HFXT_AVAILABLE

#define PowerLPF3_HFXT_AVAILABLE   (1 << 3)

Power event: The high frequency (HF) crystal oscillator is now available for use (HFXT) by the digital domain

§ PowerLPF3_LFCLK_SWITCHED

#define PowerLPF3_LFCLK_SWITCHED   (1 << 4)

Power event: The system has switched to the low frequency clock source configured in CCFG

Enumeration Type Documentation

§ PowerLPF3_ResetReason

enum PowerLPF3_ResetReason

Reasons the device has booted or rebooted.

Enumerator
PowerLPF3_RESET_SHUTDOWN_IO 

Device woke up from shutdown due to an IO event

PowerLPF3_RESET_SHUTDOWN_SWD 

Device woke up from shutdown due to an SWD event

PowerLPF3_RESET_WATCHDOG 

Device reset because of a watchdog timeout.

PowerLPF3_RESET_SYSTEM 

Device reset trggered by software writing to RSTCTL.SYSRST

PowerLPF3_RESET_CPU 

Device reset triggered by CPU reset event

PowerLPF3_RESET_LOCKUP 

Device reset triggered by CPU lockup event

PowerLPF3_RESET_TSD 

Device woke up from thermal shutdown after temperature drop

PowerLPF3_RESET_SWD 

Device woke up due to Serial Wire Debug event

PowerLPF3_RESET_LFXT 

Device reset due to LFXT clock loss

PowerLPF3_RESET_VDDR 

Device reset due to VDDR brownout event

PowerLPF3_RESET_VDDS 

Device reset due to VDDS brownout event

PowerLPF3_RESET_PIN 

Device reset due to pin reset

PowerLPF3_RESET_POR 

Device booted due to power on reset

PowerLPF3_RESET_SHUTDOWN_IO 

Device woke up from shutdown due to an IO event

PowerLPF3_RESET_SHUTDOWN_SWD 

Device woke up from shutdown due to an SWD event

PowerLPF3_RESET_WATCHDOG 

Device reset because of a watchdog timeout.

PowerLPF3_RESET_SYSTEM 

Device reset trggered by software writing to RSTCTL.SYSRST

PowerLPF3_RESET_CPU 

Device reset triggered by CPU reset event

PowerLPF3_RESET_LOCKUP 

Device reset triggered by CPU lockup event

PowerLPF3_RESET_TSD 

Device woke up from thermal shutdown after temperature drop

PowerLPF3_RESET_SWD 

Device woke up due to Serial Wire Debug event

PowerLPF3_RESET_LFXT 

Device reset due to LFXT clock loss

PowerLPF3_RESET_VDDR 

Device reset due to VDDR brownout event

PowerLPF3_RESET_VDDS 

Device reset due to VDDS brownout event

PowerLPF3_RESET_PIN 

Device reset due to pin reset

PowerLPF3_RESET_POR 

Device booted due to power on reset

§ PowerLPF3_AfoscFreq

enum PowerLPF3_AfoscFreq

The possible frequencies to configure the AFOSC to.

The value of each enumeration represents the frequency in Hz.

Enumerator
PowerLPF3_AFOSC_FREQ_80MHZ 

80 MHz

PowerLPF3_AFOSC_FREQ_90P3168MHZ 

90.3168 MHz

PowerLPF3_AFOSC_FREQ_98P304MHZ 

98.304 MHz

Function Documentation

§ PowerCC27XX_doWFI()

void PowerCC27XX_doWFI ( void  )

The wait for interrupt (WFI) policy.

This is a lightweight Power Policy which simply invokes CPU wait for interrupt.

This policy can be selected statically via the policyFxn pointer in the PowerCC27XX_Config structure, or dynamically at runtime, via Power_setPolicy().

§ PowerLPF3_getResetReason()

static PowerLPF3_ResetReason PowerLPF3_getResetReason ( void  )
inlinestatic

Returns the reason for the most recent reset or wakeup.

Returns
PowerLPF3_ResetReason
Precondition
Power_shutdown()
Postcondition
PowerLPF3_releaseLatches()

§ PowerLPF3_releaseLatches()

static void PowerLPF3_releaseLatches ( void  )
inlinestatic

Unlatch all IOs.

This function releases the latches on all frozen IOs. This function should be called after waking up from shutdown and reconfiguring the IO state so as not to cause glitches.

Note
Calling this function will clear the reset reason register if it was PowerLPF3_RESET_SHUTDOWN_IO or PowerLPF3_RESET_SHUTDOWN_SWD and cause PowerLPF3_getResetReason() not to return the true reset reason.
Precondition
Power_shutdown()
PowerLPF3_getResetReason()

References PowerCC27XX_schedulerDisable(), PowerCC27XX_schedulerRestore(), PowerCC27XX_standbyPolicy(), PowerLPF3_selectLFOSC(), PowerLPF3_selectLFXT(), PowerLPF3_startAFOSC(), and PowerLPF3_stopAFOSC().

§ PowerCC27XX_standbyPolicy()

void PowerCC27XX_standbyPolicy ( void  )

The STANDBY Power Policy.

This is an agressive Power Policy, which considers active constraints, sleep state transition latencies, and time until the next scheduled work, and automatically transitions the device into the deepest sleep state possible.

The first goal is to enter STANDBY; if that is not appropriate given current conditions (e.g., the sleep transition latency is greater greater than the time until the next scheduled Clock event), then the secondary goal is the IDLE state; if that is disallowed (e.g., if the PowerLPF3_DISALLOW_IDLE constraint is declared), then the policy will fallback and simply invoke WFI, to clock gate the CPU until the next interrupt.

In order for this policy to run, it must be selected as the Power Policy (either by being specified as the 'policyFxn' in the PowerCC27XX_Config structure, or specified at runtime with Power_setPolicy()), and the Power Policy must be enabled (either via 'enablePolicy' in the PowerCC27XX_Config structure, or via a call to Power_enablePolicy() at runtime).

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_selectLFOSC()

void PowerLPF3_selectLFOSC ( void  )

Select LFOSC as LFCLK source.

Turn on the LFOSC and choose it as LFCLK source. Once LFCLK has switched, the PowerLPF3_LFCLK_SWITCHED notification will be issued and all subscribers to this event will be notified.

Precondition
Power_init()
See also
PowerLPF3_selectLFXT()

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_selectLFXT()

void PowerLPF3_selectLFXT ( void  )

Select LFXT as LFCLK source.

Turn on the LFXT and choose it as LFCLK source. Once LFCLK has switched, the PowerLPF3_LFCLK_SWITCHED notification will be issued and all subscribers to this event will be notified.

Precondition
Power_init()
See also
PowerLPF3_selectLFOSC()

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_startAFOSC()

int_fast16_t PowerLPF3_startAFOSC ( PowerLPF3_AfoscFreq  frequency)

Start the AFOSC.

This function will start the AFOSC if it is not already running. The AFOSC will be configured to the specified frequency and it will be configured to automatically be disabled when entering STANDBY, meaning this function will need to be called again after waking up from STANDBY.

If the AFOSC is already running, no change will be done, and an error code will be returned. This indicates that another SW component is "owning" the AFOSC.

Parameters
[in]frequencyThe desired frequency of the AFOSC.
Returns
Power_SOK on success, Power_EFAIL if AFOSC is already running, Power_EINVALIDINPUT if an invalid frequency is specified.
See also
PowerLPF3_stopAFOSC()

Referenced by PowerLPF3_releaseLatches().

§ PowerLPF3_stopAFOSC()

void PowerLPF3_stopAFOSC ( void  )

Stop the AFOSC.

This function will stop the AFOSC.

See also
PowerLPF3_startAFOSC()

Referenced by PowerLPF3_releaseLatches().

§ PowerCC27XX_schedulerDisable()

void PowerCC27XX_schedulerDisable ( void  )

Referenced by PowerLPF3_releaseLatches().

§ PowerCC27XX_schedulerRestore()

void PowerCC27XX_schedulerRestore ( void  )

Referenced by PowerLPF3_releaseLatches().

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