CC26xx Driver Library
[sys_ctrl.h] System Control

Functions

void SysCtrlIdle (uint32_t vimsPdMode)
 Force the system into idle mode. More...
 
void SysCtrlShutdownWithAbort (void)
 Try to enter shutdown but abort if wakeup event happened before shutdown. More...
 
void SysCtrlShutdown (void)
 Enable shutdown of the device. More...
 
void SysCtrlStandby (bool retainCache, uint32_t vimsPdMode, uint32_t rechargeMode)
 Force the system into standby mode. More...
 
static uint32_t SysCtrlClockGet (void)
 Get the CPU core clock frequency. More...
 
static void SysCtrlAonSync (void)
 Sync all accesses to the AON register interface. More...
 
static void SysCtrlAonUpdate (void)
 Update all interfaces to AON. More...
 
void SysCtrlSetRechargeBeforePowerDown (uint32_t xoscPowerMode)
 Set Recharge values before entering Power Down. More...
 
void SysCtrlAdjustRechargeAfterPowerDown (uint32_t vddrRechargeMargin)
 Adjust Recharge calculations to be used next. More...
 
void SysCtrl_DCDC_VoltageConditionalControl (void)
 Turns DCDC on or off depending of what is considered to be optimal usage. More...
 
uint32_t SysCtrlResetSourceGet (void)
 Returns the reset source (including "wakeup from shutdown"). More...
 
static void SysCtrlSystemReset (void)
 Perform a full system reset. More...
 
static void SysCtrlClockLossResetEnable (void)
 Enables reset if OSC clock loss event is asserted. More...
 
static void SysCtrlClockLossResetDisable (void)
 Disables reset due to OSC clock loss event. More...
 
#define RSTSRC_PWR_ON   (( AON_PMCTL_RESETCTL_RESET_SRC_PWR_ON ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_PIN_RESET   (( AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_VDDS_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_VDDR_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_CLK_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_SYSRESET   (( AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_WARMRESET   (( AON_PMCTL_RESETCTL_RESET_SRC_WARMRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
 
#define RSTSRC_WAKEUP_FROM_SHUTDOWN   ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 1 )
 
#define RSTSRC_WAKEUP_FROM_TCK_NOISE   ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 2 )
 

Detailed Description

Function Documentation

void SysCtrl_DCDC_VoltageConditionalControl ( void  )

Turns DCDC on or off depending of what is considered to be optimal usage.

This function controls the DCDC only if both the following CCFG settings are true:

  • DCDC is configured to be used.
  • Alternative DCDC settings are defined and enabled.

The DCDC is configured in accordance to the CCFG settings when turned on.

This function should be called periodically.

Returns
None
310 {
311  uint32_t batThreshold ; // Fractional format with 8 fractional bits.
312  uint32_t aonBatmonBat ; // Fractional format with 8 fractional bits.
313  uint32_t ccfg_ModeConfReg ; // Holds a copy of the CCFG_O_MODE_CONF register.
314  uint32_t aonPmctlPwrctl ; // Reflect whats read/written to the AON_PMCTL_O_PWRCTL register.
315 
316  // We could potentially call this function before any battery voltage measurement
317  // is made/available. In that case we must make sure that we do not turn off the DCDC.
318  // This can be done by doing nothing as long as the battery voltage is 0 (Since the
319  // reset value of the battery voltage register is 0).
320  aonBatmonBat = HWREG( AON_BATMON_BASE + AON_BATMON_O_BAT );
321  if ( aonBatmonBat != 0 ) {
322  // Check if Voltage Conditional Control is enabled
323  // It is enabled if all the following are true:
324  // - DCDC in use (either in active or recharge mode), (in use if one of the corresponding CCFG bits are zero).
325  // - Alternative DCDC settings are enabled ( DIS_ALT_DCDC_SETTING == 0 )
326  // - Not in external regulator mode ( EXT_REG_MODE == 0 )
327  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
328 
329  if (((( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) ||
330  (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) ) &&
333  {
334  aonPmctlPwrctl = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL );
335  batThreshold = (((( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) &
337  CCFG_MODE_CONF_1_ALT_DCDC_VMIN_S ) + 28 ) << 4 );
338 
339  if ( aonPmctlPwrctl & ( AON_PMCTL_PWRCTL_DCDC_EN_M | AON_PMCTL_PWRCTL_DCDC_ACTIVE_M )) {
340  // DCDC is ON, check if it should be switched off
341  if ( aonBatmonBat < batThreshold ) {
343 
344  HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl;
345  }
346  } else {
347  // DCDC is OFF, check if it should be switched on
348  if ( aonBatmonBat > batThreshold ) {
349  if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_RECHARGE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_EN_M ;
350  if (( ccfg_ModeConfReg & CCFG_MODE_CONF_DCDC_ACTIVE_M ) == 0 ) aonPmctlPwrctl |= AON_PMCTL_PWRCTL_DCDC_ACTIVE_M ;
351 
352  HWREG( AON_PMCTL_BASE + AON_PMCTL_O_PWRCTL ) = aonPmctlPwrctl;
353  }
354  }
355  }
356  }
357 }
void SysCtrlAdjustRechargeAfterPowerDown ( uint32_t  vddrRechargeMargin)

Adjust Recharge calculations to be used next.

Nothing to be done but keeping this function for platform compatibility.

Returns
None
298 {
299  // Nothing to be done but keeping this function for platform compatibility.
300 }
static void SysCtrlAonSync ( void  )
inlinestatic

Sync all accesses to the AON register interface.

When this function returns, all writes to the AON register interface are guaranteed to have propagated to hardware. The function will return immediately if no AON writes are pending; otherwise, it will wait for the next AON clock before returning.

Returns
None
See also
SysCtrlAonUpdate()

Referenced by SetupAfterColdResetWakeupFromShutDownCfg3(), SysCtrlIdle(), and SysCtrlStandby().

338 {
339  // Sync the AON interface
340  HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
341 }
static void SysCtrlAonUpdate ( void  )
inlinestatic

Update all interfaces to AON.

When this function returns, at least 1 clock cycle has progressed on the AON domain, so that any outstanding updates to and from the AON interface is guaranteed to be in sync.

Note
This function should primarily be used after wakeup from sleep modes, as it will guarantee that all shadow registers on the AON interface are updated before reading any AON registers from the MCU domain. If a write has been done to the AON interface it is sufficient to call the SysCtrlAonSync().
Returns
None
See also
SysCtrlAonSync()

Referenced by SysCtrlShutdownWithAbort().

363 {
364  // Force a clock cycle on the AON interface to guarantee all registers are
365  // in sync.
366  HWREG(AON_RTC_BASE + AON_RTC_O_SYNC) = 1;
367  HWREG(AON_RTC_BASE + AON_RTC_O_SYNC);
368 }
static uint32_t SysCtrlClockGet ( void  )
inlinestatic

Get the CPU core clock frequency.

Use this function to get the current clock frequency for the CPU.

The CPU can run from 48 MHz and down to 750kHz. The frequency is defined by the combined division factor of the SYSBUS and the CPU clock divider.

Returns
Returns the current CPU core clock frequency.
317 {
318  // Return fixed clock speed
319  return( GET_MCU_CLOCK );
320 }
static void SysCtrlClockLossResetDisable ( void  )
inlinestatic

Disables reset due to OSC clock loss event.

Note
This function shall typically not be called because the clock loss reset functionality is controlled by the boot code (a factory configuration defines whether it is set or not).
Returns
None
See also
SysCtrlClockLossResetEnable()
513 {
514  // Clear clock loss enable bit in AON_SYSCTRL using bit banding
516 }
static void SysCtrlClockLossResetEnable ( void  )
inlinestatic

Enables reset if OSC clock loss event is asserted.

Clock loss circuit in analog domain must be enabled as well in order to actually enable for a clock loss reset to occur OSCClockLossEventEnable().

Note
This function shall typically not be called because the clock loss reset functionality is controlled by the boot code (a factory configuration defines whether it is set or not).
Returns
None
See also
SysCtrlClockLossResetDisable(), OSCClockLossEventEnable()
493 {
494  // Set clock loss enable bit in AON_SYSCTRL using bit banding
496 }
void SysCtrlIdle ( uint32_t  vimsPdMode)

Force the system into idle mode.

This function forces the system into IDLE mode by configuring the requested VIMS mode, enabling cache retention and powering off the CPU power domain.

Parameters
vimsPdModeselects the requested VIMS power domain mode The parameter must be one of the following:
Returns
None
84 {
85  // Configure the VIMS mode
86  HWREG(PRCM_BASE + PRCM_O_PDCTL1VIMS) = vimsPdMode;
87 
88  // Always keep cache retention ON in IDLE
90 
91  // Turn off the CPU power domain, will take effect when PRCMDeepSleep() executes
93 
94  // Ensure any possible outstanding AON writes complete
96 
97  // Invoke deep sleep to go to IDLE
98  PRCMDeepSleep();
99 }
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
Definition: sys_ctrl.h:337
void PRCMDeepSleep(void)
Put the processor into deep-sleep mode.
Definition: prcm.c:637
static void PRCMCacheRetentionEnable(void)
Enable CACHE RAM retention.
Definition: prcm.h:1122
#define PRCM_DOMAIN_CPU
Definition: prcm.h:151
void PRCMPowerDomainOff(uint32_t ui32Domains)
Turn off a specific power domain.
Definition: prcm.c:459

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uint32_t SysCtrlResetSourceGet ( void  )

Returns the reset source (including "wakeup from shutdown").

In case of RSTSRC_WAKEUP_FROM_SHUTDOWN the application is responsible for unlatching the outputs (disable pad sleep). See PowerCtrlPadSleepDisable() for more information.

Returns
Returns the reset source.
367 {
368  uint32_t aonPmctlResetCtl = HWREG( AON_PMCTL_BASE + AON_PMCTL_O_RESETCTL );
369 
370  if ( aonPmctlResetCtl & AON_PMCTL_RESETCTL_WU_FROM_SD_M ) {
371  if ( aonPmctlResetCtl & AON_PMCTL_RESETCTL_GPIO_WU_FROM_SD_M ) {
372  return ( RSTSRC_WAKEUP_FROM_SHUTDOWN );
373  } else {
374  return ( RSTSRC_WAKEUP_FROM_TCK_NOISE );
375  }
376  } else {
377  return (( aonPmctlResetCtl & AON_PMCTL_RESETCTL_RESET_SRC_M ) >> AON_PMCTL_RESETCTL_RESET_SRC_S );
378  }
379 }
#define RSTSRC_WAKEUP_FROM_TCK_NOISE
Definition: sys_ctrl.h:429
#define RSTSRC_WAKEUP_FROM_SHUTDOWN
Definition: sys_ctrl.h:428
void SysCtrlSetRechargeBeforePowerDown ( uint32_t  xoscPowerMode)

Set Recharge values before entering Power Down.

This function shall be called just before entering Power Down. This function typically does nothing (default setting), but if temperature compensated recharge level are enabled (by setting CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC = 0) it adds temperature compensation to the recharge level.

Parameters
xoscPowerMode(typically running in XOSC_IN_HIGH_POWER_MODE all the time).
Returns
None

Referenced by SysCtrlStandby().

254 {
255  uint32_t ccfg_ModeConfReg ;
256 
257  // read the MODE_CONF register in CCFG
258  ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
259  // Do temperature compensation if enabled
260  if (( ccfg_ModeConfReg & CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC ) == 0 ) {
261  int32_t vddrSleepDelta ;
262  int32_t curTemp ;
263  int32_t tcDelta ;
264  int32_t vddrSleepTrim ;
265 
266  // Get VDDR_TRIM_SLEEP_DELTA + 1 (sign extended) ==> vddrSleepDelta = -7..+8
267  vddrSleepDelta = (((int32_t)( ccfg_ModeConfReg << ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_S )))
268  >> ( 32 - CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_W )) + 1 ;
269  curTemp = AONBatMonTemperatureGetDegC();
270  tcDelta = ( 62 - curTemp ) >> 3;
271  if ( tcDelta > 7 ) {
272  tcDelta = 7 ;
273  }
274  if ( tcDelta > vddrSleepDelta ) {
275  vddrSleepDelta = tcDelta ;
276  }
277  vddrSleepTrim = (( HWREG( FLASH_CFG_BASE + FCFG1_OFFSET + FCFG1_O_MISC_TRIM ) & FCFG1_MISC_TRIM_TRIM_RECHARGE_COMP_REFLEVEL_M ) >>
279  vddrSleepTrim -= vddrSleepDelta ;
280  if ( vddrSleepTrim > 15 ) vddrSleepTrim = 15 ;
281  if ( vddrSleepTrim < 1 ) vddrSleepTrim = 1 ;
282  // Write adjusted value using MASKED write (MASK8)
285  // Make a dummy read in order to make sure the write above is done before going into standby
287  }
288 }
int32_t AONBatMonTemperatureGetDegC(void)
Get the current temperature measurement as a signed value in Deg Celsius.
Definition: aon_batmon.c:60
#define FCFG1_OFFSET
Definition: flash.h:150

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void SysCtrlShutdown ( void  )

Enable shutdown of the device.

This function puts the device in shutdown state. The device automatically latches all outputs (pads in sleep) before it turns off all internal power supplies.

JTAG must be disconnected and JTAG power domain must be off before device can enter shutdown. This function waits until the device satisfies all shutdown conditions before it enters shutdown.

Note
The application must unlatch the outputs when the device wakes up from shutdown. It is recommended that any outputs that need to be restored after a wakeup from shutdown are restored before outputs are unlatched in order to avoid glitches.

See PowerCtrlPadSleepDisable() for information about how to unlatch outputs (disable pad sleep) after wakeup from shutdown.

Note
Wakeup events are only detected after the device enters shutdown.

See IOCIOShutdownSet() for information about how to enable wakeup from shutdown.

See SysCtrlResetSourceGet() for information about how to detect wakeup from shutdown.

It is recommended to disable interrupts before calling this function. Shutdown happens immediately when the device satisfies all shutdown conditions thus interrupt routines triggered after this function is called might be aborted.

Returns
This function does not return.

Referenced by SysCtrlShutdownWithAbort().

145 {
146  // Request shutdown mode
148 
149  // Make sure System CPU does not continue beyond this point.
150  // Shutdown happens when all shutdown conditions are met.
151  while(1);
152 }
void SysCtrlShutdownWithAbort ( void  )

Try to enter shutdown but abort if wakeup event happened before shutdown.

This function puts the device in shutdown state if no wakeup events are detected before shutdown.

Compared to the basic SysCtrlShutdown() function this function makes sure that wakeup events that happen before actual shutdown are also detected. This function either enters shutdown with a guaranteed wakeup detection or returns to the caller function due to a pre-shutdown wakeup event.

See SysCtrlShutdown() for basic information about how to configure the device before shutdown and how to wakeup from shutdown.

This function uses IO edge detection in addition to the mandatory wakeup configuration. Additional requirements to the application for this function are:

  • Before :
    • When the application configures an IO for wakeup (see IOCIOShutdownSet()) the application must also configure the same IO for edge detection (see IOCIOIntSet()).
    • Edge detection must use the same polarity as the wakeup configuration.
    • Application must enable peripheral power domain (see PRCMPowerDomainOn()) and enable GPIO module in the peripheral power domain (see PRCMPeripheralRunEnable()).
  • After :
    • An edge, with same polarity as a wakeup event, was detected on a wakeup enabled IO before shutdown, and the shutdown was aborted. The application must clear the event generated by the edge detect (see GPIO_clearEventDio()) and decide what happens next.

Useful functions related to shutdown:

It is recommended to disable interrupts before calling this function because:

  • Pads are in sleep mode while this function runs.
  • An interrupt routine might be terminated if it is triggered after the decision to enter shutdown.
Returns
None
107 {
108  uint32_t wu_detect_vector = 0;
109  uint32_t io_num = 0;
110 
111  // For all IO CFG registers check if wakeup detect is enabled
112  for(io_num = 0; io_num < 32; io_num++)
113  {
114  // Read MSB from WU_CFG bit field
115  if( HWREG(IOC_BASE + IOC_O_IOCFG0 + (io_num * 4) ) & (1 << (IOC_IOCFG0_WU_CFG_S + IOC_IOCFG0_WU_CFG_W - 1)) )
116  {
117  wu_detect_vector |= (1 << io_num);
118  }
119  }
120 
121  // Wakeup events are detected when pads are in sleep mode
123 
124  // Make sure all potential events have propagated before checking event flags
127 
128  // If no edge detect flags for wakeup enabled IOs are set then shut down the device
129  if( GPIO_getEventMultiDio(wu_detect_vector) == 0 )
130  {
131  SysCtrlShutdown();
132  }
133  else
134  {
136  }
137 }
static void SysCtrlAonUpdate(void)
Update all interfaces to AON.
Definition: sys_ctrl.h:362
static void PowerCtrlPadSleepDisable(void)
Disables pad sleep in order to unlatch device outputs after wakeup from shutdown. ...
Definition: pwr_ctrl.h:264
void SysCtrlShutdown(void)
Enable shutdown of the device.
Definition: sys_ctrl.c:144
static void PowerCtrlPadSleepEnable(void)
Enables pad sleep in order to latch device outputs before shutdown.
Definition: pwr_ctrl.h:242
static uint32_t GPIO_getEventMultiDio(uint32_t dioMask)
Gets the event status of the specified DIOs.
Definition: gpio.h:570

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void SysCtrlStandby ( bool  retainCache,
uint32_t  vimsPdMode,
uint32_t  rechargeMode 
)

Force the system into standby mode.

This function forces all power domains (RFCORE, SERIAL, PERIPHERAL) off. The VIMS and CPU power domains are turned off by the HW when the PRCMDeepSleep() function is called. The IOs are latched (frozen) before the power domains are turned off to avoid glitches. The VIMS retention (cache) and VIMS module are turned off if requested. The deep-sleep clock for the crypto and DMA modules are turned off, as they must be off in order to enter standby. This function assumes that the LF clock has already been switched to and that the LF clock qualifiers must have been disabled/bypassed.

In internal regulator mode the adaptive recharge functionality is enabled with fixed parameter values. In external regulator mode the recharge functionality is disabled.

Note
This function is optimized to execute with TI-RTOS. There might be application specific prerequisites you would want to do before entering standby which deviate from this specific implementation.
Parameters
retainCacheselects if VIMS cache shall be retained or not.
  • false : VIMS cache is not retained
  • true : VIMS cache is retained
vimsPdModeselects the VIMS power domain mode. The parameter must be one of the following:
rechargeModespecifies the requested recharge mode. The parameter must be one of the following:
Returns
None
160 {
161  uint32_t modeVIMS;
162 
163  // Handle compensation for improving RCOSC_LF stability at low temperatures
164  // as configured in CCFG
166 
167  // Freeze the IOs on the boundary between MCU and AON
169 
170  // Ensure any possible outstanding AON writes complete before turning off the power domains
171  SysCtrlAonSync();
172 
173  // Request power off of domains in the MCU voltage domain
175 
176  // Ensure that no clocks are forced on in any modes for Crypto, DMA and I2S
179 
180  // Gate running deep sleep clocks for Crypto, DMA and I2S
184 
185  // Load the new clock settings
186  PRCMLoadSet();
187 
188  // Configure the VIMS power domain mode
189  HWREG(PRCM_BASE + PRCM_O_PDCTL1VIMS) = vimsPdMode;
190 
191  // Request uLDO during standby
193 
194  // Check the regulator mode
196  {
197  // In external regulator mode the recharge functionality is disabled
198  HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = 0x00000000;
199  }
200  else
201  {
202  // In internal regulator mode the recharge functionality is set up with
203  // adaptive recharge mode and fixed parameter values
204  if(rechargeMode == SYSCTRL_PREFERRED_RECHARGE_MODE)
205  {
206  // Enable the Recharge Comparator
208  }
209  else
210  {
211  // Set requested recharge mode
212  HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RECHARGECFG) = rechargeMode;
213  }
214  }
215 
216  // Ensure all writes have taken effect
217  SysCtrlAonSync();
218 
219  // Ensure UDMA, Crypto and I2C clocks are turned off
220  while (!PRCMLoadGet()) {;}
221 
222  // Ensure power domains have been turned off.
223  // CPU power domain will power down when PRCMDeepSleep() executes.
225 
226  // Turn off cache retention if requested
227  if (retainCache == false) {
228 
229  // Get the current VIMS mode
230  do {
231  modeVIMS = VIMSModeGet(VIMS_BASE);
232  } while (modeVIMS == VIMS_MODE_CHANGING);
233 
234  // If in a cache mode, turn VIMS off
235  if (modeVIMS == VIMS_MODE_ENABLED) {
237  }
238 
239  // Disable retention of cache RAM
241  }
242 
243  // Invoke deep sleep to go to STANDBY
244  PRCMDeepSleep();
245 }
static void SysCtrlAonSync(void)
Sync all accesses to the AON register interface.
Definition: sys_ctrl.h:337
void VIMSModeSet(uint32_t ui32Base, uint32_t ui32Mode)
Set the operational mode of the VIMS.
Definition: vims.c:92
#define XOSC_IN_HIGH_POWER_MODE
Definition: sys_ctrl.h:134
static void AONIOCFreezeEnable(void)
Freeze the IOs.
Definition: aon_ioc.h:208
#define PRCM_PERIPH_I2S
Definition: prcm.h:208
uint32_t PRCMPowerDomainStatus(uint32_t ui32Domains)
Get the status for a specific power domain.
Definition: prcm.c:596
#define VIMS_MODE_ENABLED
Definition: vims.h:98
#define PRCM_DOMAIN_PERIPH
Definition: prcm.h:141
static bool PRCMLoadGet(void)
Check if any of the load sensitive register has been updated.
Definition: prcm.h:605
static void PRCMMcuUldoConfigure(uint32_t ui32Enable)
Assert or de-assert a request for the uLDO.
Definition: prcm.h:331
static void PRCMCacheRetentionDisable(void)
Disable CACHE RAM retention.
Definition: prcm.h:1137
uint32_t VIMSModeGet(uint32_t ui32Base)
Get the current operational mode of the VIMS.
Definition: vims.c:117
#define SYSCTRL_PREFERRED_RECHARGE_MODE
Definition: sys_ctrl.h:151
#define PRCM_PERIPH_CRYPTO
Definition: prcm.h:203
#define PRCM_PERIPH_UDMA
Definition: prcm.h:206
void SysCtrlSetRechargeBeforePowerDown(uint32_t xoscPowerMode)
Set Recharge values before entering Power Down.
Definition: sys_ctrl.c:253
#define VIMS_MODE_CHANGING
Definition: vims.h:95
void PRCMDeepSleep(void)
Put the processor into deep-sleep mode.
Definition: prcm.c:637
#define VIMS_MODE_OFF
Definition: vims.h:99
#define PRCM_DOMAIN_SERIAL
Definition: prcm.h:139
#define PRCM_DOMAIN_RFCORE
Definition: prcm.h:137
static void PRCMLoadSet(void)
Use this function to synchronize the load settings.
Definition: prcm.h:587
#define PRCM_DOMAIN_CPU
Definition: prcm.h:151
void PRCMPowerDomainOff(uint32_t ui32Domains)
Turn off a specific power domain.
Definition: prcm.c:459
void PRCMPeripheralDeepSleepDisable(uint32_t ui32Peripheral)
Disables a peripheral in deep-sleep mode.
Definition: prcm.c:580
#define PRCM_DOMAIN_POWER_OFF
Definition: prcm.h:159

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static void SysCtrlSystemReset ( void  )
inlinestatic

Perform a full system reset.

Returns
The chip will reset and hence never return from this call.
463 {
464  // Disable CPU interrupts
465  CPUcpsid();
466  // Write reset register
468  // Finally, wait until the above write propagates
469  while ( 1 ) {
470  // Do nothing, just wait for the reset (and never return from here)
471  }
472 }
uint32_t CPUcpsid(void)
Disable all external interrupts.
Definition: cpu.c:68

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Macro Definition Documentation

#define CPU_DEEP_SLEEP   0x00000002
#define CPU_RUN   0x00000000
#define CPU_SLEEP   0x00000001
#define RSTSRC_CLK_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_CLK_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define RSTSRC_PIN_RESET   (( AON_PMCTL_RESETCTL_RESET_SRC_PIN_RESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define RSTSRC_SYSRESET   (( AON_PMCTL_RESETCTL_RESET_SRC_SYSRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define RSTSRC_VDDR_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_VDDR_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define RSTSRC_VDDS_LOSS   (( AON_PMCTL_RESETCTL_RESET_SRC_VDDS_LOSS ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define RSTSRC_WAKEUP_FROM_SHUTDOWN   ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 1 )

Referenced by SysCtrlResetSourceGet().

#define RSTSRC_WAKEUP_FROM_TCK_NOISE   ((( AON_PMCTL_RESETCTL_RESET_SRC_M ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S )) + 2 )

Referenced by SysCtrlResetSourceGet().

#define RSTSRC_WARMRESET   (( AON_PMCTL_RESETCTL_RESET_SRC_WARMRESET ) >> ( AON_PMCTL_RESETCTL_RESET_SRC_S ))
#define SYSCTRL_PREFERRED_RECHARGE_MODE   0xFFFFFFFF

Referenced by SysCtrlStandby().

#define SYSCTRL_SYSBUS_OFF   0x00000000
#define SYSCTRL_SYSBUS_ON   0x00000001
#define VIMS_NO_PWR_UP_MODE   2
#define VIMS_ON_BUS_ON_MODE   1
#define VIMS_ON_CPU_ON_MODE   0
#define XOSC_IN_HIGH_POWER_MODE   0

Referenced by SysCtrlStandby().

#define XOSC_IN_LOW_POWER_MODE   1