[aon_pmctl.h] AON Power Management Controller

Functions
static void	AONPMCTLMcuSRamRetConfig (uint32_t ui32Retention)
	Configure the retention on the block SRAM in the MCU BUS domain. More...
static uint32_t	AONPMCTLPowerStatusGet (void)
	Get the power status of the Always On (AON) domain. More...
static void	AONPMCTLJtagPowerOff (void)
	Request power off of the JTAG domain. More...

Detailed Description

Introduction

This API provides a set of functions for using the AON Power Management Controller module (AON_PMCTL).

The AON_PMCTL module contains the following functional options:

• Selection of voltage regulator for the digital domain.
• Control of retention of MCU SRAM banks during power off of the BUS power domain.
• Control of power and retention of AUX SRAM.
• Control of power, reset, and clock for the following domains:
  • MCU_VD
  • JTAG_PD
  • AUX
• Control of the recharging of VDDR while in uLDO state.
• Control of the generation of a periodic request to the OSCDIG to initiate an XOSC_HF amplitude calibration sequence.

The main clock for the AON_PMCTL module is the 2 MHz SCLK MF clock.

AON_PMCTL supports the MCU_voltage domain with a 48 MHz clock (SCLK_HF) that is divided and gated by the PRCM module before being distributed to all modules in the MCU voltage domain.

The AON_PMCTL controls the SCLK_HF clock to ensure that it is available in the Active and Idle power modes, and disabled for all other modes. SCLK_HF is not allowed in uLDO state since it uses too much power. The SCLK_HF clock is also available for the AUX module in the Active and Idle power modes.

The AON_PMCTL selects the clock source for the AUX domain in the different power modes.

Main functionality to control power management of the JTAG power domain is supported. Note that no clock control is supported, as the JTAG is clocked on the TCK clock.

API

The API functions can be grouped like this:

Functions to perform status report:

• AONPMCTLPowerStatusGet()

Functions to perform device configuration:

• AONPMCTLJtagPowerOff()
• AONPMCTLMcuSRamRetConfig()

Please note that due to legacy software compatibility some functionalities controlled by the AON Power Management Controller module are supported through the APIs of the System Controller and Power Controller. Relevant functions are:

• PowerCtrlSourceGet()
• PowerCtrlSourceSet()
• PowerCtrlResetSourceGet()
• SysCtrl_DCDC_VoltageConditionalControl()
• SysCtrlClockLossResetDisable()
• SysCtrlClockLossResetEnable()
• SysCtrlSystemReset()
• SysCtrlResetSourceGet()

Function Documentation

static void AONPMCTLJtagPowerOff ( void  )

inlinestatic

Request power off of the JTAG domain.

The JTAG domain is automatically powered up on if a debugger is connected. If a debugger is not connected this function can be used to power off the JTAG domain.

Note

Achieving the lowest power modes (shutdown/powerdown) requires the JTAG domain to be turned off. In general the JTAG domain should never be powered in production code.

Returns

None

{
    // Request the power off of the JTAG domain
    HWREG(AON_PMCTL_BASE + AON_PMCTL_O_JTAGCFG) = 0;
}

static void AONPMCTLMcuSRamRetConfig ( uint32_t  ui32Retention )

inlinestatic

Configure the retention on the block SRAM in the MCU BUS domain.

MCU SRAM is partitioned into 5 banks of 16 KB each. The SRAM supports retention on all 5 banks during MCU BUS domain power off. The retention on the SRAM can be turned on and off. Use this function to enable the retention on the banks.

If a group of banks is not represented in the parameter ui32Retention then the retention will be disabled for that bank group during MCU BUS domain power off.

Note

Retention on all SRAM banks is enabled by default. Configuration of individual SRAM banks is not supported. Configuration is only supported on bank group level.

Parameters

ui32Retention

defines which groups of SRAM banks to enable/disable retention on: MCU_RAM_RET_NONE Retention is disabled MCU_RAM_RET_LVL1 Retention on for banks 0 and 1 MCU_RAM_RET_LVL2 Retention on for banks 0, 1 and 2 MCU_RAM_RET_LVL3 Retention on for banks 0, 1, 2 and 3 MCU_RAM_RET_FULL Retention on for all five banks

Returns

None

{
    uint32_t ui32Reg;

    // Check the arguments.
    ASSERT((ui32Retention == MCU_RAM_RET_NONE) ||
           (ui32Retention == MCU_RAM_RET_LVL1) ||
           (ui32Retention == MCU_RAM_RET_LVL2) ||
           (ui32Retention == MCU_RAM_RET_LVL3) ||
           (ui32Retention == MCU_RAM_RET_FULL));

    // Configure the retention.
    ui32Reg = HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) & ~AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_M;
    ui32Reg |= ui32Retention;
    HWREG(AON_PMCTL_BASE + AON_PMCTL_O_RAMCFG) = ui32Reg;
}

static uint32_t AONPMCTLPowerStatusGet ( void  )

inlinestatic

Get the power status of the Always On (AON) domain.

This function reports the power management status in AON.

Returns

Returns the current power status of the device as a bitwise OR'ed combination of these values:

• AONPMCTL_JTAG_POWER_ON

{
    // Return the power status.
    return (HWREG(AON_PMCTL_BASE + AON_PMCTL_O_PWRSTAT));
}

Macro Definition Documentation

#define AONPMCTL_JTAG_POWER_ON   AON_PMCTL_PWRSTAT_JTAG_PD_ON

#define MCU_RAM_RET_FULL   AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_FULL

Referenced by AONPMCTLMcuSRamRetConfig().

#define MCU_RAM_RET_LVL1   AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL1

Referenced by AONPMCTLMcuSRamRetConfig().

#define MCU_RAM_RET_LVL2   AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL2

Referenced by AONPMCTLMcuSRamRetConfig().

#define MCU_RAM_RET_LVL3   AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_LEVEL3

Referenced by AONPMCTLMcuSRamRetConfig().

#define MCU_RAM_RET_NONE   AON_PMCTL_RAMCFG_BUS_SRAM_RET_EN_RET_NONE

Referenced by AONPMCTLMcuSRamRetConfig().