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UDMACC26XX hardware attributes. More...
#include <UDMACC26XX.h>
Data Fields | |
| uint32_t | baseAddr |
| PowerCC26XX_Resource | powerMngrId |
| uint8_t | intNum |
| uint8_t | intPriority |
| UDMACC26XX error interrupt priority. intPriority is the DMA peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create(). More... | |
UDMACC26XX hardware attributes.
| uint32_t UDMACC26XX_HWAttrs::baseAddr |
Base adddress for UDMACC26XX
Referenced by UDMACC26XX_channelDisable(), UDMACC26XX_channelDone(), UDMACC26XX_channelEnable(), UDMACC26XX_clearInterrupt(), and UDMACC26XX_disableAttribute().
| PowerCC26XX_Resource UDMACC26XX_HWAttrs::powerMngrId |
UDMACC26XX Peripheral's power manager ID
| uint8_t UDMACC26XX_HWAttrs::intNum |
UDMACC26XX error interrupt number
| uint8_t UDMACC26XX_HWAttrs::intPriority |
UDMACC26XX error interrupt priority. intPriority is the DMA peripheral's interrupt priority, as defined by the underlying OS. It is passed unmodified to the underlying OS's interrupt handler creation code, so you need to refer to the OS documentation for usage. If the driver uses the ti.dpl interface instead of making OS calls directly, then the HwiP port handles the interrupt priority in an OS specific way. In the case of the SYS/BIOS port, intPriority is passed unmodified to Hwi_create().
The CC26xx uses three of the priority bits, meaning ~0 has the same effect as (7 << 5).
(7 << 5) will apply the lowest priority.
(1 << 5) will apply the highest priority.
Setting the priority to 0 is not supported by this driver.
HWI's with priority 0 ignore the HWI dispatcher to support zero-latency interrupts, thus invalidating the critical sections in this driver.