UDMACC26XX.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2015-2018, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
111 #ifndef ti_drivers_UDMACC26XX__include
112 #define ti_drivers_UDMACC26XX__include
113 
114 #ifdef __cplusplus
115 extern "C" {
116 #endif
117 
118 #include <stdint.h>
119 #include <stdbool.h>
120 
121 #include <ti/drivers/Power.h>
123 
124 #include <ti/devices/DeviceFamily.h>
125 #include DeviceFamily_constructPath(inc/hw_types.h)
126 #include DeviceFamily_constructPath(driverlib/udma.h)
127 
138 /* Add DMACC26XX_STATUS_* macros here */
139 
152 /* Add DMACC26XX_CMD_* macros here */
153 
157 #if !defined(UDMACC26XX_CONFIG_BASE) && (DeviceFamily_PARENT == DeviceFamily_PARENT_CC13X2_CC26X2)
158  #define UDMACC26XX_CONFIG_BASE 0x20001800
159 #elif !defined(UDMACC26XX_CONFIG_BASE)
160  #define UDMACC26XX_CONFIG_BASE 0x20000400
161 #endif
162 
164 #if(UDMACC26XX_CONFIG_BASE & 0x3FF)
165  #error "Base address for DMA control table 'UDMACC26XX_CONFIG_BASE' must be 1024 bytes aligned."
166 #endif
167 
169 #if defined(__IAR_SYSTEMS_ICC__)
170 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \
171 __no_init static volatile tDMAControlTable ENTRY_NAME @ UDMACC26XX_CONFIG_BASE + CHANNEL_INDEX * sizeof(tDMAControlTable)
172 #elif defined(__TI_COMPILER_VERSION__)
173 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \
174 PRAGMA(LOCATION( ENTRY_NAME , UDMACC26XX_CONFIG_BASE + CHANNEL_INDEX * sizeof(tDMAControlTable) );)\
175 static volatile tDMAControlTable ENTRY_NAME
176 #define PRAGMA(x) _Pragma(#x)
177 #elif defined(__GNUC__)
178 #define ALLOCATE_CONTROL_TABLE_ENTRY(ENTRY_NAME, CHANNEL_INDEX) \
179  extern int UDMACC26XX_ ## ENTRY_NAME ## _is_placed; __attribute__ ((section("."#ENTRY_NAME))) static volatile tDMAControlTable ENTRY_NAME = {&UDMACC26XX_ ## ENTRY_NAME ## _is_placed}
180 #else
181 #error "don't know how to define ALLOCATE_CONTROL_TABLE_ENTRY for this toolchain"
182 #endif
183 
185 #define UDMACC26XX_SET_TRANSFER_SIZE(SIZE) (((SIZE - 1) << UDMA_XFER_SIZE_S) & UDMA_XFER_SIZE_M)
186 
187 #define UDMACC26XX_GET_TRANSFER_SIZE(CONTROL) (((CONTROL & UDMA_XFER_SIZE_M) >> UDMA_XFER_SIZE_S) + 1)
188 
192 typedef struct UDMACC26XX_Object {
193  bool isOpen;
194  HwiP_Struct hwi;
196 
200 typedef struct UDMACC26XX_HWAttrs {
201  uint32_t baseAddr;
202  PowerCC26XX_Resource powerMngrId;
203  uint8_t intNum;
225  uint8_t intPriority;
227 
231 typedef struct UDMACC26XX_Config {
232  void *object;
233  void const *hwAttrs;
235 
240 
241 /* Extern'd hwiIntFxn */
242 extern void UDMACC26XX_hwiIntFxn(uintptr_t callbacks);
243 
256 __STATIC_INLINE void UDMACC26XX_init(UDMACC26XX_Handle handle)
257 {
259 
260  /* Get the pointer to the object */
261  object = (UDMACC26XX_Object *)(handle->object);
262 
263  /* mark the module as available */
264  object->isOpen = false;
265 }
266 
282 extern UDMACC26XX_Handle UDMACC26XX_open();
283 
297 __STATIC_INLINE void UDMACC26XX_channelEnable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
298 {
300 
301  /* Get the pointer to the hwAttrs */
302  hwAttrs = (UDMACC26XX_HWAttrs *)(handle->hwAttrs);
303 
304  /* Enable DMA channel */
305  HWREG(hwAttrs->baseAddr + UDMA_O_SETCHANNELEN) = channelBitMask;
306 }
307 
326 __STATIC_INLINE bool UDMACC26XX_channelDone(UDMACC26XX_Handle handle, uint32_t channelBitMask)
327 {
329 
330  /* Get the pointer to the hwAttrs */
331  hwAttrs = (UDMACC26XX_HWAttrs *)(handle->hwAttrs);
332 
333  /* Check if REQDONE is set for a specific channel */
334  return (uDMAIntStatus(hwAttrs->baseAddr) & channelBitMask) ? true : false;
335 }
336 
354 __STATIC_INLINE void UDMACC26XX_clearInterrupt(UDMACC26XX_Handle handle, uint32_t channelBitMask)
355 {
357 
358  /* Get the pointer to the hwAttrs and object */
359  hwAttrs = (UDMACC26XX_HWAttrs *)(handle->hwAttrs);
360 
361  /* Clear UDMA done interrupt */
362  uDMAIntClear(hwAttrs->baseAddr, channelBitMask);
363 }
364 
382 __STATIC_INLINE void UDMACC26XX_channelDisable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
383 {
384  UDMACC26XX_HWAttrs const *hwAttrs = handle->hwAttrs;
385 
386  HWREG(hwAttrs->baseAddr + UDMA_O_CLEARCHANNELEN) = channelBitMask;
387 }
388 
409 __STATIC_INLINE void UDMACC26XX_disableAttribute(UDMACC26XX_Handle handle,
410  uint32_t channelNum, uint32_t attr)
411 {
413 
414  uDMAChannelAttributeDisable(hwAttrs->baseAddr, channelNum, attr);
415 }
416 
432 extern void UDMACC26XX_close(UDMACC26XX_Handle handle);
433 
434 #ifdef __cplusplus
435 }
436 #endif
437 
438 #endif /* ti_drivers_UDMACC26XX__include */
bool isOpen
Definition: UDMACC26XX.h:193
HwiP_Struct hwi
Definition: UDMACC26XX.h:194
void UDMACC26XX_hwiIntFxn(uintptr_t callbacks)
PowerCC26XX_Resource powerMngrId
Definition: UDMACC26XX.h:202
void UDMACC26XX_close(UDMACC26XX_Handle handle)
Function to close the DMA driver.
__STATIC_INLINE void UDMACC26XX_clearInterrupt(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:354
Power Manager.
__STATIC_INLINE void UDMACC26XX_channelEnable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:297
uint8_t intNum
Definition: UDMACC26XX.h:203
__STATIC_INLINE void UDMACC26XX_init(UDMACC26XX_Handle handle)
Function to initialize the CC26XX DMA driver.
Definition: UDMACC26XX.h:256
__STATIC_INLINE void UDMACC26XX_disableAttribute(UDMACC26XX_Handle handle, uint32_t channelNum, uint32_t attr)
Definition: UDMACC26XX.h:409
UDMACC26XX Global configuration.
Definition: UDMACC26XX.h:231
Power manager interface for CC26XX/CC13XX.
struct UDMACC26XX_Object UDMACC26XX_Object
UDMACC26XX object.
UDMACC26XX_Handle UDMACC26XX_open()
Function to initialize the CC26XX DMA peripheral.
struct UDMACC26XX_Config UDMACC26XX_Config
UDMACC26XX Global configuration.
UDMACC26XX hardware attributes.
Definition: UDMACC26XX.h:200
void * object
Definition: UDMACC26XX.h:232
uint8_t intPriority
UDMACC26XX error interrupt priority. intPriority is the DMA peripheral&#39;s interrupt priority...
Definition: UDMACC26XX.h:225
__STATIC_INLINE void UDMACC26XX_channelDisable(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:382
__STATIC_INLINE bool UDMACC26XX_channelDone(UDMACC26XX_Handle handle, uint32_t channelBitMask)
Definition: UDMACC26XX.h:326
uint32_t baseAddr
Definition: UDMACC26XX.h:201
UDMACC26XX object.
Definition: UDMACC26XX.h:192
struct UDMACC26XX_Config * UDMACC26XX_Handle
A handle that is returned from a UDMACC26XX_open() call.
Definition: UDMACC26XX.h:239
void const * hwAttrs
Definition: UDMACC26XX.h:233
struct UDMACC26XX_HWAttrs UDMACC26XX_HWAttrs
UDMACC26XX hardware attributes.
© Copyright 1995-2019, Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy policy | Terms of use | Terms of sale