#include "lv_conf.h"

Include dependency graph for ssd2119/lv_drv_conf.h:

Macros
#define	USE_SSD2119 1

#define	LV_DRV_DELAY_INCLUDE <unistd.h>

#define	LV_DRV_DELAY_US(us) usleep(us) /Delay the given number of microseconds/

#define	LV_DRV_DELAY_MS(ms) usleep(1000ms) /Delay the given number of milliseconds*/

#define	LV_DRV_DISP_INCLUDE <ti_lvgl_disp_interface.h>

#define	LV_DRV_DISP_CMD_DATA(val) GPIO_write(Board_GPIO_KENTEC_LCD_DC, val) /Set the command/data pin to 'val'/

#define	LV_DRV_DISP_RST(val) GPIO_write(Board_GPIO_KENTEC_LCD_RESET, val) /Set the reset pin to 'val'/

#define	LV_DRV_DISP_BACKLIGHT(val) GPIO_write(Board_GPIO_KENTEC_LCD_BACKLIGHT, val) /Set the backlight pin to 'val'/

#define	LV_DRV_DISP_SPI_BITRATE 24000000

#define	LV_DRV_DISP_SPI_CS(val) GPIO_write(Board_GPIO_KENTEC_LCD_CS, val); /Set the SPI's Chip select to 'val'/

#define	LV_DRV_DISP_SPI_WR_BYTE(data) spi_wr_byte(data) /Write a byte the SPI bus/

#define	LV_DRV_DISP_SPI_WR_WORD(data) spi_wr_word(data) /Write a word the SPI bus/

#define	LV_DRV_DISP_SPI_WR_ARRAY(adr, n) spi_wr_array(adr, n) /Write 'n' bytes to SPI bus from 'adr'/

#define	LV_DRV_DISP_PAR_CS(val) /par_cs_set(val)/ /Set the Parallel port's Chip select to 'val'/

#define	LV_DRV_DISP_PAR_SLOW /par_slow()/ /Set low speed on the parallel port/

#define	LV_DRV_DISP_PAR_FAST /par_fast()/ /Set high speed on the parallel port/

#define	LV_DRV_DISP_PAR_WR_WORD(data) /par_wr(data)/ /Write a word to the parallel port/

#define	LV_DRV_DISP_PAR_WR_ARRAY(adr, n) /par_wr_mem(adr,n)/ /Write 'n' bytes to Parallel ports from 'adr'/

#define	LV_DRV_INDEV_INCLUDE <stdint.h> /Dummy include by default/

#define	LV_DRV_INDEV_RST(val) /pin_x_set(val)/ /Set the reset pin to 'val'/

#define	LV_DRV_INDEV_IRQ_READ 0 /pn_x_read()/ /Read the IRQ pin/

#define	LV_DRV_INDEV_SPI_CS(val) /spi_cs_set(val)/ /Set the SPI's Chip select to 'val'/

#define	LV_DRV_INDEV_SPI_XCHG_BYTE(data) 0 /spi_xchg(val)/ /Write 'val' to SPI and give the read value/

#define	LV_DRV_INDEV_I2C_START /i2c_start()/ /Make an I2C start/

#define	LV_DRV_INDEV_I2C_STOP /i2c_stop()/ /Make an I2C stop/

#define	LV_DRV_INDEV_I2C_RESTART /i2c_restart()/ /Make an I2C restart/

#define	LV_DRV_INDEV_I2C_WR(data) /i2c_wr(data)/ /Write a byte to the I1C bus/

#define	LV_DRV_INDEV_I2C_READ(last_read) 0 /i2c_rd()/ /Read a byte from the I2C bud/

#define	USE_MONITOR 0

#define	USE_WINDOWS 0

#define	USE_WINDOWS 0

#define	USE_LS013B7DH03 0

#define	LANDSCAPE

#define	HORIZ_DIRECTION 0x00

#define	VERT_DIRECTION 0x08

#define	MAPPED_X(x, y) (LV_HOR_RES - 1 - (x))

#define	MAPPED_Y(x, y) (LV_VER_RES - 1 - (y))

#define	SSD2119_DEVICE_CODE_READ_REG 0x00

#define	SSD2119_OSC_START_REG 0x00

#define	SSD2119_OUTPUT_CTRL_REG 0x01

#define	SSD2119_LCD_DRIVE_AC_CTRL_REG 0x02

#define	SSD2119_PWR_CTRL_1_REG 0x03

#define	SSD2119_DISPLAY_CTRL_REG 0x07

#define	SSD2119_FRAME_CYCLE_CTRL_REG 0x0B

#define	SSD2119_PWR_CTRL_2_REG 0x0C

#define	SSD2119_PWR_CTRL_3_REG 0x0D

#define	SSD2119_PWR_CTRL_4_REG 0x0E

#define	SSD2119_GATE_SCAN_START_REG 0x0F

#define	SSD2119_SLEEP_MODE_1_REG 0x10

#define	SSD2119_ENTRY_MODE_REG 0x11

#define	SSD2119_SLEEP_MODE_2_REG 0x12

#define	SSD2119_GEN_IF_CTRL_REG 0x15

#define	SSD2119_PWR_CTRL_5_REG 0x1E

#define	SSD2119_RAM_DATA_REG 0x22

#define	SSD2119_FRAME_FREQ_REG 0x25

#define	SSD2119_ANALOG_SET_REG 0x26

#define	SSD2119_VCOM_OTP_1_REG 0x28

#define	SSD2119_VCOM_OTP_2_REG 0x29

#define	SSD2119_GAMMA_CTRL_1_REG 0x30

#define	SSD2119_GAMMA_CTRL_2_REG 0x31

#define	SSD2119_GAMMA_CTRL_3_REG 0x32

#define	SSD2119_GAMMA_CTRL_4_REG 0x33

#define	SSD2119_GAMMA_CTRL_5_REG 0x34

#define	SSD2119_GAMMA_CTRL_6_REG 0x35

#define	SSD2119_GAMMA_CTRL_7_REG 0x36

#define	SSD2119_GAMMA_CTRL_8_REG 0x37

#define	SSD2119_GAMMA_CTRL_9_REG 0x3A

#define	SSD2119_GAMMA_CTRL_10_REG 0x3B

#define	SSD2119_V_RAM_POS_REG 0x44

#define	SSD2119_H_RAM_START_REG 0x45

#define	SSD2119_H_RAM_END_REG 0x46

#define	SSD2119_X_RAM_ADDR_REG 0x4E

#define	SSD2119_Y_RAM_ADDR_REG 0x4F

#define	ENTRY_MODE_DEFAULT 0x6830

#define	MAKE_ENTRY_MODE(x) ((ENTRY_MODE_DEFAULT & 0xFF00) \| (x))

#define	SSD2119_CMD_MODE 0

#define	SSD2119_DATA_MODE 1

#define	USE_SSD1963 0

#define	USE_R61581 0

#define	USE_ST7565 0

#define	USE_UC1610 0

#define	USE_FBDEV 0

#define	USE_XPT2046 0

#define	USE_FT5406EE8 0

#define	USE_AD_TOUCH 0

#define	USE_MOUSE 0

#define	USE_MOUSEWHEEL 0

#define	USE_LIBINPUT 0

#define	USE_EVDEV 0

#define	USE_KEYBOARD 0

Macro Definition Documentation

§ USE_SSD2119

#define USE_SSD2119 1

§ LV_DRV_DELAY_INCLUDE

#define LV_DRV_DELAY_INCLUDE <unistd.h>

§ LV_DRV_DELAY_US

#define LV_DRV_DELAY_US ( us ) usleep(us) /*Delay the given number of microseconds*/

§ LV_DRV_DELAY_MS

#define LV_DRV_DELAY_MS ( ms ) usleep(1000*ms) /*Delay the given number of milliseconds*/

§ LV_DRV_DISP_INCLUDE

#define LV_DRV_DISP_INCLUDE <ti_lvgl_disp_interface.h>

§ LV_DRV_DISP_CMD_DATA

#define LV_DRV_DISP_CMD_DATA ( val ) GPIO_write(Board_GPIO_KENTEC_LCD_DC, val) /*Set the command/data pin to 'val'*/

§ LV_DRV_DISP_RST

#define LV_DRV_DISP_RST ( val ) GPIO_write(Board_GPIO_KENTEC_LCD_RESET, val) /*Set the reset pin to 'val'*/

§ LV_DRV_DISP_BACKLIGHT

#define LV_DRV_DISP_BACKLIGHT ( val ) GPIO_write(Board_GPIO_KENTEC_LCD_BACKLIGHT, val) /*Set the backlight pin to 'val'*/

§ LV_DRV_DISP_SPI_BITRATE

#define LV_DRV_DISP_SPI_BITRATE 24000000

§ LV_DRV_DISP_SPI_CS

#define LV_DRV_DISP_SPI_CS ( val ) GPIO_write(Board_GPIO_KENTEC_LCD_CS, val); /*Set the SPI's Chip select to 'val'*/

§ LV_DRV_DISP_SPI_WR_BYTE

#define LV_DRV_DISP_SPI_WR_BYTE ( data ) spi_wr_byte(data) /*Write a byte the SPI bus*/

§ LV_DRV_DISP_SPI_WR_WORD

#define LV_DRV_DISP_SPI_WR_WORD ( data ) spi_wr_word(data) /*Write a word the SPI bus*/

§ LV_DRV_DISP_SPI_WR_ARRAY

#define LV_DRV_DISP_SPI_WR_ARRAY	(	adr,
		n
	)	spi_wr_array(adr, n) /Write 'n' bytes to SPI bus from 'adr'/

§ LV_DRV_DISP_PAR_CS

#define LV_DRV_DISP_PAR_CS ( val ) /*par_cs_set(val)*/ /*Set the Parallel port's Chip select to 'val'*/

§ LV_DRV_DISP_PAR_SLOW

#define LV_DRV_DISP_PAR_SLOW /*par_slow()*/ /*Set low speed on the parallel port*/

§ LV_DRV_DISP_PAR_FAST

#define LV_DRV_DISP_PAR_FAST /*par_fast()*/ /*Set high speed on the parallel port*/

§ LV_DRV_DISP_PAR_WR_WORD

#define LV_DRV_DISP_PAR_WR_WORD ( data ) /*par_wr(data)*/ /*Write a word to the parallel port*/

§ LV_DRV_DISP_PAR_WR_ARRAY

#define LV_DRV_DISP_PAR_WR_ARRAY	(	adr,
		n
	)	/par_wr_mem(adr,n)/ /Write 'n' bytes to Parallel ports from 'adr'/

§ LV_DRV_INDEV_INCLUDE

#define LV_DRV_INDEV_INCLUDE <stdint.h> /*Dummy include by default*/

§ LV_DRV_INDEV_RST

#define LV_DRV_INDEV_RST ( val ) /*pin_x_set(val)*/ /*Set the reset pin to 'val'*/

§ LV_DRV_INDEV_IRQ_READ

#define LV_DRV_INDEV_IRQ_READ 0 /*pn_x_read()*/ /*Read the IRQ pin*/

§ LV_DRV_INDEV_SPI_CS

#define LV_DRV_INDEV_SPI_CS ( val ) /*spi_cs_set(val)*/ /*Set the SPI's Chip select to 'val'*/

§ LV_DRV_INDEV_SPI_XCHG_BYTE

#define LV_DRV_INDEV_SPI_XCHG_BYTE ( data ) 0 /*spi_xchg(val)*/ /*Write 'val' to SPI and give the read value*/

§ LV_DRV_INDEV_I2C_START

#define LV_DRV_INDEV_I2C_START /*i2c_start()*/ /*Make an I2C start*/

§ LV_DRV_INDEV_I2C_STOP

#define LV_DRV_INDEV_I2C_STOP /*i2c_stop()*/ /*Make an I2C stop*/

§ LV_DRV_INDEV_I2C_RESTART

#define LV_DRV_INDEV_I2C_RESTART /*i2c_restart()*/ /*Make an I2C restart*/

§ LV_DRV_INDEV_I2C_WR

#define LV_DRV_INDEV_I2C_WR ( data ) /*i2c_wr(data)*/ /*Write a byte to the I1C bus*/

§ LV_DRV_INDEV_I2C_READ

#define LV_DRV_INDEV_I2C_READ ( last_read ) 0 /*i2c_rd()*/ /*Read a byte from the I2C bud*/

§ USE_MONITOR

#define USE_MONITOR 0

§ USE_WINDOWS [1/2]

#define USE_WINDOWS 0

§ USE_WINDOWS [2/2]

#define USE_WINDOWS 0

§ USE_LS013B7DH03

#define USE_LS013B7DH03 0

§ LANDSCAPE

#define LANDSCAPE

§ HORIZ_DIRECTION

#define HORIZ_DIRECTION 0x00

§ VERT_DIRECTION

#define VERT_DIRECTION 0x08

§ MAPPED_X

#define MAPPED_X	(	x,
		y
	)	(LV_HOR_RES - 1 - (x))

§ MAPPED_Y

#define MAPPED_Y	(	x,
		y
	)	(LV_VER_RES - 1 - (y))

§ SSD2119_DEVICE_CODE_READ_REG

#define SSD2119_DEVICE_CODE_READ_REG 0x00

§ SSD2119_OSC_START_REG

#define SSD2119_OSC_START_REG 0x00

§ SSD2119_OUTPUT_CTRL_REG

#define SSD2119_OUTPUT_CTRL_REG 0x01

§ SSD2119_LCD_DRIVE_AC_CTRL_REG

#define SSD2119_LCD_DRIVE_AC_CTRL_REG 0x02

§ SSD2119_PWR_CTRL_1_REG

#define SSD2119_PWR_CTRL_1_REG 0x03

§ SSD2119_DISPLAY_CTRL_REG

#define SSD2119_DISPLAY_CTRL_REG 0x07

§ SSD2119_FRAME_CYCLE_CTRL_REG

#define SSD2119_FRAME_CYCLE_CTRL_REG 0x0B

§ SSD2119_PWR_CTRL_2_REG

#define SSD2119_PWR_CTRL_2_REG 0x0C

§ SSD2119_PWR_CTRL_3_REG

#define SSD2119_PWR_CTRL_3_REG 0x0D

§ SSD2119_PWR_CTRL_4_REG

#define SSD2119_PWR_CTRL_4_REG 0x0E

§ SSD2119_GATE_SCAN_START_REG

#define SSD2119_GATE_SCAN_START_REG 0x0F

§ SSD2119_SLEEP_MODE_1_REG

#define SSD2119_SLEEP_MODE_1_REG 0x10

§ SSD2119_ENTRY_MODE_REG

#define SSD2119_ENTRY_MODE_REG 0x11

§ SSD2119_SLEEP_MODE_2_REG

#define SSD2119_SLEEP_MODE_2_REG 0x12

§ SSD2119_GEN_IF_CTRL_REG

#define SSD2119_GEN_IF_CTRL_REG 0x15

§ SSD2119_PWR_CTRL_5_REG

#define SSD2119_PWR_CTRL_5_REG 0x1E

§ SSD2119_RAM_DATA_REG

#define SSD2119_RAM_DATA_REG 0x22

§ SSD2119_FRAME_FREQ_REG

#define SSD2119_FRAME_FREQ_REG 0x25

§ SSD2119_ANALOG_SET_REG

#define SSD2119_ANALOG_SET_REG 0x26

§ SSD2119_VCOM_OTP_1_REG

#define SSD2119_VCOM_OTP_1_REG 0x28

§ SSD2119_VCOM_OTP_2_REG

#define SSD2119_VCOM_OTP_2_REG 0x29

§ SSD2119_GAMMA_CTRL_1_REG

#define SSD2119_GAMMA_CTRL_1_REG 0x30

§ SSD2119_GAMMA_CTRL_2_REG

#define SSD2119_GAMMA_CTRL_2_REG 0x31

§ SSD2119_GAMMA_CTRL_3_REG

#define SSD2119_GAMMA_CTRL_3_REG 0x32

§ SSD2119_GAMMA_CTRL_4_REG

#define SSD2119_GAMMA_CTRL_4_REG 0x33

§ SSD2119_GAMMA_CTRL_5_REG

#define SSD2119_GAMMA_CTRL_5_REG 0x34

§ SSD2119_GAMMA_CTRL_6_REG

#define SSD2119_GAMMA_CTRL_6_REG 0x35

§ SSD2119_GAMMA_CTRL_7_REG

#define SSD2119_GAMMA_CTRL_7_REG 0x36

§ SSD2119_GAMMA_CTRL_8_REG

#define SSD2119_GAMMA_CTRL_8_REG 0x37

§ SSD2119_GAMMA_CTRL_9_REG

#define SSD2119_GAMMA_CTRL_9_REG 0x3A

§ SSD2119_GAMMA_CTRL_10_REG

#define SSD2119_GAMMA_CTRL_10_REG 0x3B

§ SSD2119_V_RAM_POS_REG

#define SSD2119_V_RAM_POS_REG 0x44

§ SSD2119_H_RAM_START_REG

#define SSD2119_H_RAM_START_REG 0x45

§ SSD2119_H_RAM_END_REG

#define SSD2119_H_RAM_END_REG 0x46

§ SSD2119_X_RAM_ADDR_REG

#define SSD2119_X_RAM_ADDR_REG 0x4E

§ SSD2119_Y_RAM_ADDR_REG

#define SSD2119_Y_RAM_ADDR_REG 0x4F

§ ENTRY_MODE_DEFAULT

#define ENTRY_MODE_DEFAULT 0x6830

§ MAKE_ENTRY_MODE

#define MAKE_ENTRY_MODE ( x ) ((ENTRY_MODE_DEFAULT & 0xFF00) | (x))

§ SSD2119_CMD_MODE

#define SSD2119_CMD_MODE 0

§ SSD2119_DATA_MODE

#define SSD2119_DATA_MODE 1

§ USE_SSD1963

#define USE_SSD1963 0

§ USE_R61581

#define USE_R61581 0

§ USE_ST7565

#define USE_ST7565 0

§ USE_UC1610

#define USE_UC1610 0

§ USE_FBDEV

#define USE_FBDEV 0

§ USE_XPT2046

#define USE_XPT2046 0

§ USE_FT5406EE8

#define USE_FT5406EE8 0

§ USE_AD_TOUCH

#define USE_AD_TOUCH 0

§ USE_MOUSE

#define USE_MOUSE 0

§ USE_MOUSEWHEEL

#define USE_MOUSEWHEEL 0

§ USE_LIBINPUT

#define USE_LIBINPUT 0

§ USE_EVDEV

#define USE_EVDEV 0

§ USE_KEYBOARD

#define USE_KEYBOARD 0

Macros