soc.h

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#ifndef SOC_XWRL64XX_H_
#define SOC_XWRL64XX_H_
 
#include <stdint.h>
 
#ifdef __cplusplus
extern "C"
{
#endif
 
#include <kernel/dpl/SystemP.h>
#include <drivers/soc/xwrLx4xx/soc_rcm.h>
#include <drivers/hw_include/cslr_soc.h>
 
#define SOC_DOMAIN_ID_TOPSS_CTRL        (0U)
#define SOC_DOMAIN_ID_APP_RCM           (1U)
#define SOC_DOMAIN_ID_APP_CTRL          (2U)
#define SOC_DOMAIN_ID_TOP_IO_MUX        (3U)
#define SOC_DOMAIN_ID_TOP_PRCM          (4U)
 
typedef enum SOC_SysRstReason_e 
{
    SOC_SYS_RESET_REASON_PORZ = 0x01U,
    SOC_SYS_RESET_REASON_SR = 0x02U,
    SOC_SYS_RESET_REASON_WDG = 0x04U,
 
}SOC_SysRstReason ;
 
typedef enum SOC_RstReason_e 
{
    SOC_RESET_REASON_PORZ = 0x01U,
    SOC_RESET_REASON_WARM,
    SOC_RESET_REASON_DEEPSLEEP,
    SOC_RESET_REASON_SOFT,    
    SOC_RESET_REASON_STC_WARM, 
    SOC_RESET_REASON_STC_PORZ, 
 
}SOC_RstReason ;
 
 
 
int32_t SOC_moduleClockEnable(uint32_t moduleId, uint32_t enable);
 
int32_t SOC_clocksEnable(void);
int32_t SOC_moduleSetClockFrequency(uint32_t moduleId, uint32_t clkId, uint64_t clkRate);
 
const char *SOC_getCoreName(uint16_t coreId);
 
void SOC_controlModuleLockMMR(uint32_t domainId, uint32_t partition);
 
void SOC_controlModuleUnlockMMR(uint32_t domainId, uint32_t partition);
 
void SOC_logAllClockHz(void);
 
uint64_t SOC_virtToPhy(void *virtAddr);
 
void SOC_memoryInit(uint16_t flag);
 
void SOC_enableMDLLClock(void);
 
void SOC_triggerWarmReset(void);
 
void SOC_triggerSoftReset(void);
 
SOC_RstReason SOC_getRstReason(void);
 
SOC_SysRstReason SOC_getSysRstReason(void);
 
void SOC_setEpwmTbClk(uint32_t enable);
 
#ifdef __cplusplus
}
#endif
 
#endif