xWRL6432 MMWAVE-L-SDK  05.04.00.01
edma/v0/edma.h
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1 /*
2  * Copyright (C) 2021 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
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32 
61 #ifndef EDMA_V0_H_
62 #define EDMA_V0_H_
63 
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 
68 /* ========================================================================== */
69 /* Include Files */
70 /* ========================================================================== */
71 
72 #include <drivers/hw_include/cslr_edma.h>
73 #include <drivers/hw_include/cslr_soc.h>
74 #include <drivers/hw_include/tistdtypes.h>
75 #include <kernel/dpl/SystemP.h>
76 #include <kernel/dpl/HwiP.h>
77 
78 /* ========================================================================== */
79 /* Macros */
80 /* ========================================================================== */
85 #define EDMACC_DMAQNUM_CLR(chNum) \
86  (~((uint32_t) 0x7U << (((chNum) % 8U) * 4U)))
87 
88 #define EDMACC_DMAQNUM_SET(chNum, queNum) \
89  (((uint32_t) 0x7U & (queNum)) << (((chNum) % 8U) * 4U))
90 
91 #define EDMACC_QDMAQNUM_CLR(chNum) \
92  (~((uint32_t) 0x7U << ((chNum) * 4U)))
93 
94 #define EDMACC_QDMAQNUM_SET(chNum, queNum) \
95  (((uint32_t) 0x7U & (queNum)) << ((chNum) * 4U))
96 
103 #define EDMACC_QCHMAP_PAENTRY_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_PAENTRY_MASK)))
104 
105 #define EDMACC_QCHMAP_PAENTRY_SET(paRAMId) \
106  (((EDMA_TPCC_QCHMAPN_PAENTRY_MASK >> EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
107  & (paRAMId)) << EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
108 
109 #define EDMACC_QCHMAP_TRWORD_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_TRWORD_MASK)))
110 
111 #define EDMACC_QCHMAP_TRWORD_SET(paRAMId) \
112  (((EDMA_TPCC_QCHMAPN_TRWORD_MASK >> EDMA_TPCC_QCHMAPN_TRWORD_SHIFT) & \
113  (paRAMId)) << EDMA_TPCC_QCHMAPN_TRWORD_SHIFT)
114 
121 #define EDMA_TRIG_MODE_MANUAL ((uint32_t) 0U)
122 
123 #define EDMA_TRIG_MODE_QDMA ((uint32_t) 1U)
124 
125 #define EDMA_TRIG_MODE_EVENT ((uint32_t) 2U)
126 
135 #define EDMA_CHANNEL_TYPE_DMA ((uint32_t) 0U)
136 
137 #define EDMA_CHANNEL_TYPE_QDMA ((uint32_t) 1U)
138 
147 #define EDMA_XFER_COMPLETE ((uint32_t) 0U)
148 
149 #define EDMA_CC_DMA_EVT_MISS ((uint32_t) 1U)
150 
151 #define EDMA_CC_QDMA_EVT_MISS ((uint32_t) 2U)
152 
163 #define EDMA_SYNC_A ((uint32_t) 0U)
164 
165 #define EDMA_SYNC_AB ((uint32_t) 1U)
166 
176 #define EDMA_ADDRESSING_MODE_LINEAR ((uint32_t) 0U)
177 
178 #define EDMA_ADDRESSING_MODE_FIFO_WRAP ((uint32_t) 1U)
179 
189 #define EDMA_FIFO_WIDTH_8BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
190 
191 #define EDMA_FIFO_WIDTH_16BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
192 
193 #define EDMA_FIFO_WIDTH_32BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
194 
195 #define EDMA_FIFO_WIDTH_64BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
196 
197 #define EDMA_FIFO_WIDTH_128BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
198 
199 #define EDMA_FIFO_WIDTH_256BIT ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
200 
209 #define EDMACC_CLR_TCCERR ((uint32_t) EDMA_TPCC_CCERRCLR_TCERR_MASK)
210 
211 #define EDMACC_CLR_QTHRQ0 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD0_MASK)
212 
213 #define EDMACC_CLR_QTHRQ1 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD1_MASK)
214 
222 #define EDMA_OPT_TCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCCHEN_MASK)
223 
224 #define EDMA_OPT_ITCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCCHEN_MASK)
225 
226 #define EDMA_OPT_TCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCINTEN_MASK)
227 
228 #define EDMA_OPT_ITCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCINTEN_MASK)
229 
230 #define EDMA_OPT_TCC_MASK ((uint32_t) EDMA_TPCC_OPT_TCC_MASK)
231 
232 #define EDMA_OPT_TCC_SHIFT ((uint32_t) EDMA_TPCC_OPT_TCC_SHIFT)
233 
234 #define EDMA_OPT_SYNCDIM_MASK ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_MASK)
235 
236 #define EDMA_OPT_SYNCDIM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_SHIFT)
237 
238 #define EDMA_OPT_STATIC_MASK ((uint32_t) EDMA_TPCC_OPT_STATIC_MASK)
239 
240 #define EDMA_OPT_STATIC_SHIFT ((uint32_t) EDMA_TPCC_OPT_STATIC_SHIFT)
241 
242 #define EDMACC_OPT_TCC_CLR ((uint32_t) (~EDMA_TPCC_OPT_TCC_MASK))
243 
244 #define EDMACC_OPT_TCC_SET(tcc) \
245  (((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT) & (tcc)) << \
246  EDMA_TPCC_OPT_TCC_SHIFT)
247 
255 #define EDMACC_PARAM_ENTRY_OPT ((uint32_t) 0x0U)
256 
257 #define EDMACC_PARAM_ENTRY_SRC ((uint32_t) 0x1U)
258 
259 #define EDMACC_PARAM_ENTRY_ACNT_BCNT ((uint32_t) 0x2U)
260 
261 #define EDMACC_PARAM_ENTRY_DST ((uint32_t) 0x3U)
262 
263 #define EDMACC_PARAM_ENTRY_SRC_DST_BIDX ((uint32_t) 0x4U)
264 
265 #define EDMACC_PARAM_ENTRY_LINK_BCNTRLD ((uint32_t) 0x5U)
266 
267 #define EDMACC_PARAM_ENTRY_SRC_DST_CIDX ((uint32_t) 0x6U)
268 
269 #define EDMACC_PARAM_ENTRY_CCNT ((uint32_t) 0x7U)
270 
271 #define EDMACC_PARAM_FIELD_OFFSET ((uint32_t) 0x4U)
272 
273 #define EDMACC_PARAM_ENTRY_FIELDS ((uint32_t) 0x8U)
274 
278 #define EDMA_NUM_TCC ((uint32_t) SOC_EDMA_NUM_DMACH)
279 
288 #define EDMA_RESOURCE_TYPE_DMA ((uint32_t) 0U)
289 
290 #define EDMA_RESOURCE_TYPE_QDMA ((uint32_t) 1U)
291 
292 #define EDMA_RESOURCE_TYPE_TCC ((uint32_t) 2U)
293 
294 #define EDMA_RESOURCE_TYPE_PARAM ((uint32_t) 3U)
295 
296 #define EDMA_RESOURCE_ALLOC_ANY ((uint32_t) 0xFFFFU)
297 
300 #define EDMA_SET_ALL_BITS ((uint32_t) 0xFFFFFFFFU)
301 
302 #define EDMA_CLR_ALL_BITS ((uint32_t) 0x00000000U)
303 
304 #define EDMACC_COMPL_HANDLER_RETRY_COUNT ((uint32_t) 10U)
305 
306 #define EDMACC_ERR_HANDLER_RETRY_COUNT ((uint32_t) 10U)
307 
309 /* ========================================================================== */
310 /* Structures */
311 /* ========================================================================== */
317 typedef struct {
318  /* \brief OPT field of PaRAM Set */
319  uint32_t opt;
324  uint32_t srcAddr;
325  /* \brief Number of bytes in each Array (ACNT) */
326  uint16_t aCnt;
327  /* \brief Number of Arrays in each Frame (BCNT) */
328  uint16_t bCnt;
334  uint32_t destAddr;
335  /* \brief Index between consec. arrays of a Source Frame (SRCBIDX) */
336  int16_t srcBIdx;
337  /* \brief Index between consec. arrays of a Destination Frame (DSTBIDX) */
338  int16_t destBIdx;
344  uint16_t linkAddr;
349  uint16_t bCntReload;
350  /* \brief Index between consecutive frames of a Source Block (SRCCIDX) */
351  int16_t srcCIdx;
352  /* \brief Index between consecutive frames of a Dest Block (DSTCIDX) */
353  int16_t destCIdx;
354  /* \brief Number of Frames in a block (CCNT) */
355  uint16_t cCnt;
356  /* \brief Stores higher 8 Bits of SRCBIDX */
357  int8_t srcBIdxExt;
358  /* \brief Stores higher 8 Bits of DSTBIDX */
359  int8_t destBIdxExt;
360 
361 } __attribute__((packed))
362 EDMACCPaRAMEntry;
363 
368 typedef struct
369 {
374  uint32_t dmaCh[SOC_EDMA_NUM_DMACH/32U];
375  /* \brief QDMA channels allocated. Each channel will be defined with 1 bit. */
376  uint32_t qdmaCh;
381  uint32_t tcc[EDMA_NUM_TCC/32U];
386  uint32_t paramSet[SOC_EDMA_NUM_PARAMSETS/32U];
388 
393 typedef struct {
394  /* \brief EDMA region to be used */
395  uint32_t regionId;
396  /* \brief EDMA Event queue to be used for all channels */
397  uint32_t queNum;
398  /* \brief Parameter to reset the PaRAM memory of the owned PaRAMs */
399  uint32_t initParamSet;
400  /* \brief owned resource configuration */
401  EDMA_ResourceObject ownResource;
402  /* \brief Dma channels reserved for Event triggered transfers */
403  uint32_t reservedDmaCh[SOC_EDMA_NUM_DMACH/32U];
405 
409 typedef struct
410 {
411  uint32_t intrEnable;
413 } EDMA_Params;
414 
418 typedef struct Edma_IntrObject_t *Edma_IntrHandle;
419 
423 typedef void (*Edma_EventCallback)(Edma_IntrHandle intrHandle,
424  void *appData);
425 
433 typedef struct Edma_IntrObject_t
434 {
435  /* \brief TCC number for which the callback to be reistered. */
436  uint32_t tccNum;
437  /* \brief Application data pointer passed to callback function. */
438  void *appData;
439  /* \brief Callback function pointer. */
445  Edma_IntrHandle nextIntr;
450  Edma_IntrHandle prevIntr;
452 
454 typedef void *EDMA_Handle;
455 
459 typedef struct
460 {
461  /*
462  * User parameters
463  */
464  EDMA_Handle handle;
466  EDMA_Params openPrms;
468  uint32_t isOpen;
470  EDMA_ResourceObject allocResource;
472  void *hwiHandle;
474  HwiP_Object hwiObj;
476  Edma_IntrHandle firstIntr;
477 } EDMA_Object;
478 
480 typedef struct
481 {
482  /*
483  * SOC configuration
484  */
485  uint32_t baseAddr;
487  EDMA_InitParams initPrms;
489  uint32_t compIntrNumber;
491  uint32_t intrAggEnableAddr;
493  uint32_t intrAggEnableMask;
495  uint32_t intrAggStatusAddr;
497  uint32_t intrAggClearMask;
499 } EDMA_Attrs;
500 
504 typedef struct
505 {
506  EDMA_Attrs *attrs;
508  EDMA_Object *object;
511 
513 extern EDMA_Config gEdmaConfig[];
515 extern uint32_t gEdmaConfigNum;
518 
519 /* ========================================================================== */
520 /* Function Declarations */
521 /* ========================================================================== */
522 
532 void EDMA_InitParams_init(EDMA_InitParams *initParam);
533 
540 void EDMACCPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry);
541 
566 void EDMAEnableChInShadowRegRegion(uint32_t baseAddr,
567  uint32_t regionId,
568  uint32_t chType,
569  uint32_t chNum);
570 
595 void EDMADisableChInShadowRegRegion(uint32_t baseAddr,
596  uint32_t regionId,
597  uint32_t chType,
598  uint32_t chNum);
599 
613 void EDMAChannelToParamMap(uint32_t baseAddr,
614  uint32_t channel,
615  uint32_t paramSet);
616 
641 void EDMAMapChToEvtQ(uint32_t baseAddr,
642  uint32_t chType,
643  uint32_t chNum,
644  uint32_t evtQNum);
645 
666 void EDMAUnmapChToEvtQ(uint32_t baseAddr,
667  uint32_t chType,
668  uint32_t chNum);
669 
692 void EDMAMapQdmaChToPaRAM(uint32_t baseAddr,
693  uint32_t chNum,
694  const uint32_t *paRAMId);
695 
713 uint32_t EDMAGetMappedPaRAM(uint32_t baseAddr,
714  uint32_t chNum,
715  uint32_t chType,
716  uint32_t *paramId);
735 void EDMASetQdmaTrigWord(uint32_t baseAddr,
736  uint32_t chNum,
737  uint32_t trigWord);
738 
750 void EDMAClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
751 
765 void EDMAQdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
766 
782 void EDMAClrCCErr(uint32_t baseAddr, uint32_t flags);
783 
797 void EDMASetEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
798 
812 void EDMAClrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
813 
828 void EDMAEnableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
829 
845 void EDMADisableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
846 
861 void EDMAEnableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
862 
877 void EDMADisableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
878 
891 uint32_t EDMAGetIntrStatusRegion(uint32_t baseAddr, uint32_t regionId);
892 
908 void EDMAEnableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
909 
925 void EDMADisableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
926 
939 void EDMAClrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value);
940 
953 uint32_t EDMAGetEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId);
954 
967 uint32_t EDMAGetEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId);
968 
982 void EDMAGetPaRAM(uint32_t baseAddr,
983  uint32_t paRAMId,
984  EDMACCPaRAMEntry *currPaRAM);
985 
999 void EDMAQdmaGetPaRAM(uint32_t baseAddr,
1000  uint32_t paRAMId,
1001  EDMACCPaRAMEntry *currPaRAM);
1002 
1022 void EDMASetPaRAM(uint32_t baseAddr,
1023  uint32_t paRAMId,
1024  const EDMACCPaRAMEntry *newPaRAM);
1025 
1046 void EDMAQdmaSetPaRAM(uint32_t baseAddr,
1047  uint32_t paRAMId,
1048  const EDMACCPaRAMEntry *newPaRAM);
1049 
1078 void EDMAQdmaSetPaRAMEntry(uint32_t baseAddr,
1079  uint32_t paRAMId,
1080  uint32_t paRAMEntry,
1081  uint32_t newPaRAMEntryVal);
1082 
1115 uint32_t EDMAQdmaGetPaRAMEntry(uint32_t baseAddr,
1116  uint32_t paRAMId,
1117  uint32_t paRAMEntry);
1118 
1145 void EDMADmaSetPaRAMEntry(uint32_t baseAddr,
1146  uint32_t paRAMId,
1147  uint32_t paRAMEntry,
1148  uint32_t newPaRAMEntryVal);
1149 
1182 uint32_t EDMADmaGetPaRAMEntry(uint32_t baseAddr,
1183  uint32_t paRAMId,
1184  uint32_t paRAMEntry);
1185 
1237 uint32_t EDMAConfigureChannelRegion(uint32_t baseAddr,
1238  uint32_t regionId,
1239  uint32_t chType,
1240  uint32_t chNum,
1241  uint32_t tccNum,
1242  uint32_t paramId,
1243  uint32_t evtQNum);
1244 
1290 uint32_t EDMAFreeChannelRegion(uint32_t baseAddr,
1291  uint32_t regionId,
1292  uint32_t chType,
1293  uint32_t chNum,
1294  uint32_t trigMode,
1295  uint32_t tccNum,
1296  uint32_t evtQNum);
1297 
1338 uint32_t EDMAEnableTransferRegion(uint32_t baseAddr,
1339  uint32_t regionId,
1340  uint32_t chNum,
1341  uint32_t trigMode);
1342 
1375 uint32_t EDMADisableTransferRegion(uint32_t baseAddr,
1376  uint32_t regionId,
1377  uint32_t chNum,
1378  uint32_t trigMode);
1379 
1401 void EDMAClearErrorBitsRegion(uint32_t baseAddr,
1402  uint32_t regionId,
1403  uint32_t chNum,
1404  uint32_t evtQNum);
1405 
1414 uint32_t EDMAGetCCErrStatus(uint32_t baseAddr);
1415 
1425 uint32_t EDMAGetErrIntrStatus(uint32_t baseAddr);
1426 
1435 uint32_t EDMAQdmaGetErrIntrStatus(uint32_t baseAddr);
1436 
1444 uint32_t EDMAPeripheralIdGet(uint32_t baseAddr);
1445 
1457 uint32_t EDMAIntrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId);
1458 
1472 uint32_t EDMAReadIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum);
1473 
1483 uint32_t EDMAErrIntrHighStatusGet(uint32_t baseAddr);
1484 
1520 void EDMAChainChannel(uint32_t baseAddr,
1521  uint32_t chId1,
1522  uint32_t chId2,
1523  uint32_t chainOptions);
1524 
1558 void EDMALinkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2);
1559 
1564 void EDMA_init(void);
1565 
1570 void EDMA_deinit(void);
1571 
1582 EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms);
1583 
1596 EDMA_Handle EDMA_getHandle(uint32_t index);
1597 
1607 void EDMA_close(EDMA_Handle handle);
1608 
1618 uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle);
1619 
1636 
1653 
1666 uint32_t EDMA_getBaseAddr(EDMA_Handle handle);
1667 
1681 uint32_t EDMA_getRegionId(EDMA_Handle handle);
1682 
1697 int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1713 int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1729 int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc);
1745 int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param);
1760 int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1761 
1775 int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1776 
1790 int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc);
1791 
1805 int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param);
1806 
1807 #ifdef __cplusplus
1808 }
1809 #endif
1810 
1811 #endif /* #ifndef EDMA_V0_H_ */
1812 
EDMA_registerIntr
int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to register callback function for a TCC.
EDMA_Config
EDMA Instance Configuration. Pointer to this object is returned as handle by driver open.
Definition: edma/v0/edma.h:522
EDMAQdmaGetErrIntrStatus
uint32_t EDMAQdmaGetErrIntrStatus(uint32_t baseAddr)
This returns QDMA error interrupt status.
EDMA_ResourceObject
EDMA resource allocation structure.
Definition: edma/v0/edma.h:386
EDMAGetEnabledIntrHighRegion
uint32_t EDMAGetEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are more than 32.
EDMADisableEvtIntrRegion
void EDMADisableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to clear CC interrupts.
SOC_EDMA_NUM_DMACH
#define SOC_EDMA_NUM_DMACH
Number of DMA Channels.
Definition: cslr_soc_defines.h:86
EDMAEnableDmaEvtRegion
void EDMAEnableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an DMA event.
EDMAEnableChInShadowRegRegion
void EDMAEnableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Enable channel to Shadow region mapping.
EDMAEnableEvtIntrRegion
void EDMAEnableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable the transfer completion interrupt generation by the EDMACC for all DMA/QDM...
EDMA_freeTcc
int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc)
Function to free the tcc Channel.
EDMAMapQdmaChToPaRAM
void EDMAMapQdmaChToPaRAM(uint32_t baseAddr, uint32_t chNum, const uint32_t *paRAMId)
Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming th...
EDMAIntrStatusHighGetRegion
uint32_t EDMAIntrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt status of those events which are greater than 32.
EDMA_init
void EDMA_init(void)
This function initializes the EDMA driver object and controller.
Edma_IntrObject
EDMA interrupt configuration object. The object is passed to the EDMA_registerIntr() function....
Definition: edma/v0/edma.h:451
SystemP.h
EDMA_Object
EDMA driver object.
Definition: edma/v0/edma.h:477
EDMA_unregisterIntr
int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to unregister callback function for a TCC.
EDMAClrEvtRegion
void EDMAClrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear an event.
EDMAErrIntrHighStatusGet
uint32_t EDMAErrIntrHighStatusGet(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is greater than 32.
EDMA_getRegionId
uint32_t EDMA_getRegionId(EDMA_Handle handle)
Function to get the edma region.
EDMASetPaRAM
void EDMASetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link).
EDMASetQdmaTrigWord
void EDMASetQdmaTrigWord(uint32_t baseAddr, uint32_t chNum, uint32_t trigWord)
Assign a Trigger Word to the specified QDMA channel.
EDMAEnableTransferRegion
uint32_t EDMAEnableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Start EDMA transfer on the specified channel.
EDMAConfigureChannelRegion
uint32_t EDMAConfigureChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t tccNum, uint32_t paramId, uint32_t evtQNum)
Request a DMA/QDMA/Link channel.
EDMAGetEnabledIntrRegion
uint32_t EDMAGetEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are less than 32.
EDMA_freeDmaChannel
int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to free the Dma Channel.
EDMAGetPaRAM
void EDMAGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (DMA/Link).
Edma_EventCallback
void(* Edma_EventCallback)(Edma_IntrHandle intrHandle, void *appData)
EDMA interrupt callback function prototype.
Definition: edma/v0/edma.h:440
EDMADisableTransferRegion
uint32_t EDMADisableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Disable DMA transfer on the specified channel.
EDMAPeripheralIdGet
uint32_t EDMAPeripheralIdGet(uint32_t baseAddr)
This API return the revision Id of the peripheral.
EDMA_getBaseAddr
uint32_t EDMA_getBaseAddr(EDMA_Handle handle)
Function to get the edma base address.
EDMAClrCCErr
void EDMAClrCCErr(uint32_t baseAddr, uint32_t flags)
Enables the user to Clear any Channel controller Errors.
EDMA_InitParams_init
void EDMA_InitParams_init(EDMA_InitParams *initParam)
Structure initialization function for EDMA_InitParams.
SOC_EDMA_NUM_PARAMSETS
#define SOC_EDMA_NUM_PARAMSETS
Number of PaRAM Sets available.
Definition: cslr_soc_defines.h:90
EDMAMapChToEvtQ
void EDMAMapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t evtQNum)
Map channel to Event Queue.
EDMADisableChInShadowRegRegion
void EDMADisableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Disable channel to Shadow region mapping.
EDMA_allocDmaChannel
int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to allocate the Dma Channel.
EDMA_close
void EDMA_close(EDMA_Handle handle)
Function to close a EDMA peripheral specified by the EDMA handle.
EDMAQdmaClrMissEvtRegion
void EDMAQdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any QDMA missed event.
EDMADisableQdmaEvtRegion
void EDMADisableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to disable an QDMA event.
EDMAQdmaSetPaRAM
void EDMAQdmaSetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only).
EDMADmaGetPaRAMEntry
uint32_t EDMADmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMAChainChannel
void EDMAChainChannel(uint32_t baseAddr, uint32_t chId1, uint32_t chId2, uint32_t chainOptions)
Chain the two specified channels.
EDMA_Attrs
EDMA instance attributes - used during init time.
Definition: edma/v0/edma.h:498
EDMACCPaRAMEntry_init
void EDMACCPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry)
Clear a PaRAM Set .
HwiP.h
EDMAEnableQdmaEvtRegion
void EDMAEnableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an QDMA event.
EDMAClrMissEvtRegion
void EDMAClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any missed event.
gEdmaConfigNum
uint32_t gEdmaConfigNum
Externally defined driver configuration array size.
EDMA_allocQdmaChannel
int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to allocate the Dma Channel.
EDMAReadIntrStatusRegion
uint32_t EDMAReadIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum)
This function reads interrupt status.
EDMAGetCCErrStatus
uint32_t EDMAGetCCErrStatus(uint32_t baseAddr)
This returns EDMA CC error status.
EDMAUnmapChToEvtQ
void EDMAUnmapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum)
Remove Mapping of channel to Event Queue.
EDMADisableDmaEvtRegion
void EDMADisableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Disable an DMA event.
EDMAFreeChannelRegion
uint32_t EDMAFreeChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t trigMode, uint32_t tccNum, uint32_t evtQNum)
Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set,...
EDMAChannelToParamMap
void EDMAChannelToParamMap(uint32_t baseAddr, uint32_t channel, uint32_t paramSet)
This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map.
EDMA_InitParams
EDMA initialization structure used for EDMAInitialize.
Definition: edma/v0/edma.h:410
EDMADmaSetPaRAMEntry
void EDMADmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
Edma_IntrHandle
struct Edma_IntrObject_t * Edma_IntrHandle
EDMA interrupt handle returned from EDMA_registerIntr() function.
Definition: edma/v0/edma.h:435
EDMA_NUM_TCC
#define EDMA_NUM_TCC
Definition: edma/v0/edma.h:295
EDMAQdmaGetPaRAM
void EDMAQdmaGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (QDMA).
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
EDMAQdmaGetPaRAMEntry
uint32_t EDMAQdmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMA_freeParam
int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param)
Function to free the Param.
EDMA_open
EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms)
This function opens a given EDMA instance.
EDMAGetMappedPaRAM
uint32_t EDMAGetMappedPaRAM(uint32_t baseAddr, uint32_t chNum, uint32_t chType, uint32_t *paramId)
Returns the PaRAM associated with the DMA/QDMA channel.
__attribute__
EDMA Parameter RAM Set in User Configurable format This is a mapping of the EDMA PaRAM set provided t...
Definition: edma/v0/edma.h:334
EDMA_Handle
void * EDMA_Handle
A handle that is returned from a EDMA_open() call.
Definition: edma/v0/edma.h:471
EDMAGetErrIntrStatus
uint32_t EDMAGetErrIntrStatus(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is less than 32.
EDMALinkChannel
void EDMALinkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2)
Link two channels.
EDMA_allocParam
int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param)
Function to allocate the TCC.
EDMA_deinit
void EDMA_deinit(void)
This function Deinitializes the EDMA driver object and controller.
EDMA_getHandle
EDMA_Handle EDMA_getHandle(uint32_t index)
This function returns the handle of an open EDMA Instance from the instance index.
EDMA_freeQdmaChannel
int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to free the Qdma Channel.
EDMA_Params
EDMA open parameters passed to EDMA_open() function.
Definition: edma/v0/edma.h:427
gEdmaConfig
EDMA_Config gEdmaConfig[]
Externally defined driver configuration array.
gEdmaInitParams
EDMA_InitParams gEdmaInitParams[]
Externally defined driver init parameters array.
EDMA_isInterruptEnabled
uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle)
Function to check if EDMA interrupt is enabled.
EDMASetEvtRegion
void EDMASetEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer...
EDMAGetIntrStatusRegion
uint32_t EDMAGetIntrStatusRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupts status of those events which is less than 32.
EDMAClrIntrRegion
void EDMAClrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value)
Enables the user to Clear an Interrupt.
EDMAQdmaSetPaRAMEntry
void EDMAQdmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_allocTcc
int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc)
Function to allocate the Qdma Channel.
EDMAClearErrorBitsRegion
void EDMAClearErrorBitsRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t evtQNum)
Clears Event Register and Error Register for a specific DMA channel and brings back EDMA to its initi...