gpmc.h File Reference

Introduction

GPMC Driver API/interface file.

Go to the source code of this file.

Data Structures
struct	GPMC_nandCmdParams
	Data structure to set NAND command parameters. More...
struct	GPMC_Transaction
	Data structure to set transaction type parameters. More...
struct	GPMC_Params
	GPMC driver instance parameters. More...
struct	GPMC_AddrRegion
	GPMC Address Region. More...
struct	GPMC_Object
	GPMC driver object. More...
struct	GPMC_timingParams
	GPMC timing parameters. More...
struct	GPMC_HwAttrs
	GPMC instance attributes. More...
struct	GPMC_Config
	GPMC Driver configuration structure. More...

Macros
#define	GPMC_CS_TIMING_CONFIG(CSWrOffTime, CSRdOffTime, CSExtDelayFlag, CSOnTime)
	This macro used to make the conf value which is used to configure the CS signal timing configuration. More...
#define	GPMC_ADV_TIMING_CONFIG(ADVAADMuxWrOffTime, ADVAADMuxRdOffTime, ADVWrOffTime, ADVRdOffTime, ADVExtDelayFlag, ADVAADMuxOnTime, ADVOnTime)
	This macro used to make the conf value which is used to configure the ADV# signal timing configuration. More...
#define	GPMC_WE_OE_TIMING_CONFIG(WEOffTime, WEExtDelayFlag, WEOnTime, OEAADMuxOffTime, OEOffTime, OEExtDelayFlag, OEAADMuxOnTime, OEOnTime)
	This macro used to make the conf value which is used to configure the WE# and OE# signal timing configuration. More...
#define	GPMC_RDACCESS_CYCLETIME_TIMING_CONFIG(rdCycleTime, wrCycleTime, rdAccessTime, pageBurstAccessTime)
	This macro used to make the conf value which is used to configure the read access and cycle time timing configuration. More...
#define	GPMC_CYCLE2CYCLE_BUSTURNAROUND_TIMING_CONFIG(cycle2CycleDelay, cycle2CycleDelaySameCSCfg, cycle2CycleDelayDiffCSCfg, busTAtime)
	This macro used to make the conf value which is used to configure the cycle to cycle and bus turn around time timing configuration. More...
#define	GPMC_DMA_COPY_LOWER_LIMIT   (512U)
	size in bytes More...
#define	GPMC_CS_BASE_ADDR_SHIFT   (24U)
	GPMC CHIP select base address shift value. More...
#define	GPMC_ECC_WRAP_MODE1   (1)
	GPMC ECC Wrap mode for ECC value computation. More...
#define	GPMC_CMD_INVALID   (0xFFFFFFFFU)
	Invalid value for params initialisation. More...
#define	GPMC_MEM_TYPE_NAND   (0)
#define	GPMC_MEM_TYPE_PSRAM   (1)
#define	GPMC_CHIP_SELECT_CS0   (0U)
#define	GPMC_CHIP_SELECT_CS1   (1U)
#define	GPMC_CHIP_SELECT_CS2   (2U)
#define	GPMC_CHIP_SELECT_CS3   (3U)
#define	GPMC_FIFOEVENT_STATUS   (0U)
#define	GPMC_TERMINALCOUNT_STATUS   (1U)
#define	GPMC_WAIT0EDGEDETECTION_STATUS   (2U)
#define	GPMC_WAIT1EDGEDETECTION_STATUS   (3U)
#define	GPMC_FIFOEVENT_INT   (0U)
#define	GPMC_TERMINALCOUNT_INT   (1U)
#define	GPMC_WAIT0EDGEDETECTION_INT   (2U)
#define	GPMC_WAIT1EDGEDETECTION_INT   (3U)
#define	GPMC_PREFETCH_ACCESSMODE_READ   (0U)
#define	GPMC_PREFETCH_ACCESSMODE_WRITE   (1U)
#define	GPMC_ECC_ALGORITHM_HAMMINGCODE   (0U)
#define	GPMC_ECC_ALGORITHM_BCH   (1U)
#define	GPMC_ECC_BCH_ERRCORRCAP_UPTO_4BITS   (0U)
#define	GPMC_ECC_BCH_ERRCORRCAP_UPTO_8BITS   (1U)
#define	GPMC_ECC_BCH_ERRCORRCAP_UPTO_16BITS   (2U)
#define	GPMC_ECCPOINTER_RESULT_1   (1U)
#define	GPMC_ECCPOINTER_RESULT_2   (2U)
#define	GPMC_ECCPOINTER_RESULT_3   (3U)
#define	GPMC_ECCPOINTER_RESULT_4   (4U)
#define	GPMC_ECCPOINTER_RESULT_5   (5U)
#define	GPMC_ECCPOINTER_RESULT_6   (6U)
#define	GPMC_ECCPOINTER_RESULT_7   (7U)
#define	GPMC_ECCPOINTER_RESULT_8   (8U)
#define	GPMC_ECCPOINTER_RESULT_9   (9U)
#define	GPMC_ECC_SIZE_0   (0U)
#define	GPMC_ECC_SIZE_1   (1U)
#define	GPMC_ECC_RESULT_1   (1U)
#define	GPMC_ECC_RESULT_2   (2U)
#define	GPMC_ECC_RESULT_3   (3U)
#define	GPMC_ECC_RESULT_4   (4U)
#define	GPMC_ECC_RESULT_5   (5U)
#define	GPMC_ECC_RESULT_6   (6U)
#define	GPMC_ECC_RESULT_7   (7U)
#define	GPMC_ECC_RESULT_8   (8U)
#define	GPMC_ECC_RESULT_9   (9U)
#define	GPMC_BCH_RESULT0   (0U)
#define	GPMC_BCH_RESULT1   (1U)
#define	GPMC_BCH_RESULT2   (2U)
#define	GPMC_BCH_RESULT3   (3U)
#define	GPMC_BCH_RESULT4   (4U)
#define	GPMC_BCH_RESULT5   (5U)
#define	GPMC_BCH_RESULT6   (6U)
#define	GPMC_CS_MASK_ADDR_SIZE_256MB   (0x00U)
#define	GPMC_CS_MASK_ADDR_SIZE_128MB   (0x08U)
#define	GPMC_CS_MASK_ADDR_SIZE_64MB   (0x0cU)
#define	GPMC_CS_MASK_ADDR_SIZE_32MB   (0x0eU)
#define	GPMC_CS_MASK_ADDR_SIZE_16MB   (0x0fU)
#define	GPMC_NAND_CS_ON_TIME   0U
	Chip select on time (FCLK periods) More...
#define	GPMC_NAND_WE_ON_TIME   0U
	Write enable on time (FCLK periods) More...
#define	GPMC_NAND_ADV_ON_TIME   0U
	Address valid on time (FCLK periods) More...
#define	GPMC_NAND_CS_WR_OFF_TIME   6U
	Chip select off time for write (FCLK periods) More...
#define	GPMC_NAND_WR_CYCLE_TIME   6U
	Write cycle time (FCLK periods) More...
#define	GPMC_NAND_ADV_WR_OFF_TIME   4U
	Address valid off time for write (FCLK periods) More...
#define	GPMC_NAND_CS_RD_OFF_TIME   6U
	Chip select off time for read (FCLK periods) More...
#define	GPMC_NAND_RD_CYCLE_TIME   6U
	Read cycle time (FCLK periods) More...
#define	GPMC_NAND_ADV_AADMUX_ON_TIME   0U
	Address valid on time when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_NAND_ADV_AADMUX_RD_OFF_TIME   0U
	Address valid on time for read when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_NAND_ADV_AADMUX_WR_OFF_TIME   0U
	Address valid on time for write when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_NAND_PAGEBURST_ACCESS_TIME   0U
	Delay between successive words in a multiple access. (FCLK periods) More...
#define	GPMC_NAND_OE_ON_TIME   1U
	Output enable on time (FCLK periods) More...
#define	GPMC_NAND_OE_OFF_TIME   4U
	Output enable off time (FCLK periods) More...
#define	GPMC_NAND_OE_AADMUX_ON_TIME   0U
	Output enable assertion time for the first address phase in an AAD-muxed protocol. (FCLK periods) More...
#define	GPMC_NAND_OE_AADMUX_OFF_TIME   0U
	Output enable deassertion time for the first address phase in an AAD-muxed protocol. (FCLK periods) More...
#define	GPMC_NAND_ADV_RD_OFF_TIME   4U
	Address valid off time for read (FCLK periods) More...
#define	GPMC_NAND_WE_OFF_TIME   3U
	Write enable off time (FCLK periods) More...
#define	GPMC_NAND_RD_ACCESS_TIME   4U
	Read access time (FCLK periods) More...
#define	GPMC_NAND_C2C_DELAY   0U
	CS high pulse delay (FCLK periods) More...
#define	GPMC_NAND_ADMUX_DATA_VALID   0U
	First data write cycle (FCLK) More...
#define	GPMC_NAND_WR_ACCESS_TIME   6U
	Write access time (FCLK periods) More...
#define	GPMC_NAND_BRST_TAROUND_TIME   0U
	Burst turnaround latency (FCLK periods) More...
#define	GPMC_PSRAM_CS_ON_TIME   3U
	Chip select on time (FCLK periods) More...
#define	GPMC_PSRAM_WE_ON_TIME   10U
	Write enable on time (FCLK periods) More...
#define	GPMC_PSRAM_ADV_ON_TIME   1U
	Address valid on time (FCLK periods) More...
#define	GPMC_PSRAM_CS_WR_OFF_TIME   21U
	Chip select off time for write (FCLK periods) More...
#define	GPMC_PSRAM_WR_CYCLE_TIME   23U
	Write cycle time (FCLK periods) More...
#define	GPMC_PSRAM_ADV_WR_OFF_TIME   3U
	Address valid off time for write (FCLK periods) More...
#define	GPMC_PSRAM_CS_RD_OFF_TIME   21U
	Chip select off time for read (FCLK periods) More...
#define	GPMC_PSRAM_RD_CYCLE_TIME   23U
	Read cycle time (FCLK periods) More...
#define	GPMC_PSRAM_ADV_AADMUX_ON_TIME   1U
	Address valid on time when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_PSRAM_ADV_AADMUX_RD_OFF_TIME   2U
	Address valid on time for read when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_PSRAM_ADV_AADMUX_WR_OFF_TIME   2U
	Address valid on time for write when using AAD- Muxed protocol. (FCLK periods) More...
#define	GPMC_PSRAM_PAGEBURST_ACCESS_TIME   3U
	Delay between successive words in a multiple access. (FCLK periods) More...
#define	GPMC_PSRAM_OE_ON_TIME   10U
	Output enable on time (FCLK periods) More...
#define	GPMC_PSRAM_OE_OFF_TIME   1U
	Output enable off time (FCLK periods) More...
#define	GPMC_PSRAM_OE_AADMUX_ON_TIME   1U
	Output enable assertion time for the first address phase in an AAD-muxed protocol. (FCLK periods) More...
#define	GPMC_PSRAM_OE_AADMUX_OFF_TIME   15U
	Output enable deassertion time for the first address phase in an AAD-muxed protocol. (FCLK periods) More...
#define	GPMC_PSRAM_ADV_RD_OFF_TIME   3U
	Address valid off time for read (FCLK periods) More...
#define	GPMC_PSRAM_WE_OFF_TIME   16U
	Write enable off time (FCLK periods) More...
#define	GPMC_PSRAM_RD_ACCESS_TIME   16U
	Read access time (FCLK periods) More...
#define	GPMC_PSRAM_C2C_DELAY   0U
	CS high pulse delay (FCLK periods) More...
#define	GPMC_PSRAM_ADMUX_DATA_VALID   0U
	First data write cycle (FCLK) More...
#define	GPMC_PSRAM_WR_ACCESS_TIME   8U
	Write access time (FCLK periods) More...
#define	GPMC_PSRAM_BRST_TAROUND_TIME   1U
	Burst turnaround latency (FCLK periods) More...

Typedefs
typedef void *	GPMC_Handle
	A handle that is returned from a GPMC_open() call. More...
typedef void(*	GPMC_CallbackFxn) (GPMC_Handle handle, GPMC_Transaction *transaction)
	The definition of a callback function used by the GPMC driver when used in GPMC_OPERATING_MODE_CALLBACK mode. More...

Enumerations
enum	GPMC_nandEccAlgo {   GPMC_NAND_ECC_ALGO_NONE = 0x00U, GPMC_NAND_ECC_ALGO_HAMMING_1BIT, GPMC_NAND_ECC_ALGO_BCH_4BIT, GPMC_NAND_ECC_ALGO_BCH_8BIT,   GPMC_NAND_ECC_ALGO_BCH_16BIT }
	GPMC ECC engine algoritms. More...
enum	GPMC_OperatingMode { GPMC_OPERATING_MODE_BLOCKING = 0, GPMC_OPERATING_MODE_CALLBACK, GPMC_OPERATING_MODE_POLLING }
	GPMC driver operating modes. More...
enum	GPMC_TransferMode { GPMC_TRANSFER_MODE_BLOCKING = 0, GPMC_TRANSFER_MODE_CALLBACK }
	GPMC data transfer modes. More...
enum	GPMC_TransactionType { GPMC_TRANSACTION_TYPE_READ = 0, GPMC_TRANSACTION_TYPE_WRITE, GPMC_TRANSACTION_TYPE_READ_CMDREG, GPMC_TRANSACTION_TYPE_WRITE_CMDREG }
	Type of the GPMC transaction for read and write. More...
enum	GPMC_TransactionStatus {   GPMC_TRANSFER_COMPLETED = 0, GPMC_TRANSFER_STARTED, GPMC_TRANSFER_CANCELED, GPMC_TRANSFER_FAILED,   GPMC_TRANSFER_CSN_DEASSERT, GPMC_TRANSFER_TIMEOUT }
	Transaction status codes that are set by the GPMC driver. More...

Functions
static void	GPMC_Params_init (GPMC_Params *params)
	Function to initialize the GPMC_Params struct to its defaults. More...
void	GPMC_init (void)
	This function initializes the GPMC module. More...
void	GPMC_deinit (void)
	This function de-initializes the GPMC module. More...
GPMC_Handle	GPMC_open (uint32_t index, const GPMC_Params *prms)
	This function opens a given GPMC peripheral. More...
void	GPMC_close (GPMC_Handle handle)
	Function to close a GPMC peripheral specified by the GPMC handle. More...
uint32_t	GPMC_getInputClk (GPMC_Handle handle)
	This function returns the input clk frequency GPMC was programmed at. More...
GPMC_Handle	GPMC_getHandle (uint32_t driverInstanceIndex)
	This function returns the handle of an open GPMC Instance from the instance index. More...
void	GPMC_writeNandCommandParamsInit (GPMC_nandCmdParams *cmdParams)
	Function to initialise GPMC_nandCmdParams structure to default values. More...
int32_t	GPMC_writeNandCommand (GPMC_Handle handle, GPMC_nandCmdParams *cmdParams)
	Function to write NAND command parameters. More...
void	GPMC_transactionInit (GPMC_Transaction *trans)
	Function to initialise GPMC_Transaction structure to default values. More...
int32_t	GPMC_nandReadData (GPMC_Handle handle, GPMC_Transaction *trans)
	Function to read data from NAND flash using DMA or CPU prefetch/post write engine. More...
int32_t	GPMC_nandWriteData (GPMC_Handle handle, GPMC_Transaction *trans)
	Function to write data to NANDflash using CPU prefetch/post write engine. More...
int32_t	GPMC_setDeviceSize (GPMC_Handle handle)
	Function to set device width for GPMC instance connected to external device. More...
int32_t	GPMC_setDeviceType (GPMC_Handle handle)
	Function to set device type (NANDLIKE OR NORLIKE) for GPMC instance connected to external device. More...
int32_t	GPMC_configureTimingParameters (GPMC_Handle handle)
	Function to configure GPMC timing parameters. More...
int32_t	GPMC_configureTimingParametersPsram (GPMC_Handle handle)
	Function to configure GPMC timing parameters for PSRAM/NOR Devices. More...
int32_t	GPMC_eccValueSizeSet (GPMC_Handle handle, uint32_t eccSize, uint32_t eccSizeVal)
	Function to set ECC used and unused bytes size in nibbles. More...
int32_t	GPMC_eccBchConfigureElm (GPMC_Handle handle, uint8_t numSectors)
	Function to configure ELM module for error correction. More...
int32_t	GPMC_eccEngineBCHConfig (GPMC_Handle handle, uint32_t eccSteps)
	Function to configure GPMC ECC engine for BCH algorithm. More...
int32_t	GPMC_eccEngineEnable (GPMC_Handle handle)
	Function to enable GPMC ECC engine. More...
void	GPMC_eccResultRegisterClear (GPMC_Handle handle)
	Function to clear GPMC ECC result register. More...
int32_t	GPMC_eccBchFillSyndromeValue (GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
	Function to fill BCH syndrome value per sector to ELM module. More...
int32_t	GPMC_eccBchStartErrorProcessing (GPMC_Handle handle, uint8_t sector)
	Function to start error processing for a sector by ELM module. More...
int32_t	GPMC_eccBchCheckErrorProcessingStatus (GPMC_Handle handle, uint32_t sector)
	Function to get error processing status for a sector by ELM module. More...
int32_t	GPMC_eccBchSectorGetError (GPMC_Handle handle, uint32_t sector, uint32_t *errCount, uint32_t *errLoc)
	Function to get number of errors per sector by ELM module. More...
int32_t	GPMC_eccCalculateBchSyndromePolynomial (GPMC_Handle handle, uint8_t *pEccdata, uint32_t sector)
	Function to compute BCH syndrome polynomial for NAND write operation. More...
int32_t	GPMC_eccGetBchSyndromePolynomial (GPMC_Handle handle, uint32_t sector, uint32_t *bchData)
	Function to get BCH syndrome polynomial per sector NAND read operation. More...
int32_t	GPMC_configurePrefetchPostWriteEngine (GPMC_Handle handle)
	Function to configure GPMC PREFETCH read and POST write engine. More...
int32_t	GPMC_disableFlashWriteProtect (GPMC_Handle handle)
	Function to disable WRITE protect line. More...
int32_t	GPMC_enableFlashWriteProtect (GPMC_Handle handle)
	Function to disable WRITE protect line. More...

Variables
GPMC_Config	gGpmcConfig []
	Externally defined driver configuration array. More...
uint32_t	gGpmcConfigNum
	Externally defined driver configuration array size. More...