4.2. PRU ICSS EthernetIP Release Notes

4.2.1. Overview

The PRU-ICSS Ethernet/IP package provides the foundation that facilitate application software development for Ethernet/IP Adapter on TI Sitara Embedded Processors with PRU-ICSS HW IP.

4.2.2. Licensing

Please refer to the software manifest, which outlines the licensing status for all packages included in this release. The manifest can be found on the SDK download page or in the installed directory. The directory structure is shown in the user guide here

4.2.3. Standard Compliance

Compliant to ODVA EtherNet IP Comformance Tests 15

4.2.4. Documentation

  • EtherNet IP Datasheet: Data sheet contains information about the capabilities of the solution, certification information (if applicable), memory and pin mux information. It can be found in the ‘docs’ folder in the installation directory. The directory structure is shown in the user guide here
  • Software Manifest: Provides license information on software included in the package. The manifest can be found on the SDK download page or in the installed directory. The directory structure is shown in the user guide here
  • EVM Quick Start Guide: Provides information on hardware setup and running the demonstration application that is loaded on flash. This document is provided as part of the EVM kit.

4.2.4.1. Release 01.00.03

Released November 2018

PRU-ICSS Ethernet/IP package download link : https://www.ti.com/tool/PRU-ICSS-INDUSTRIAL-SW

4.2.4.1.1. What’s New

  • Adding PTP support for K2G
  • Multicast filtering for host traffic
  • Compliance to Conformance Test Suite v15
  • Bug Fixes

4.2.4.1.2. Features supported

  • Ethernet/IP Capabilities
    • Explicit Messaging and Implicit Messaging
    • UCMM
    • Class 1 and Class 3 Connection
  • Object classes supported
    • Identity Object
    • Message Router Object
    • Assembly Object
    • Connection Manager Object
    • Ethernet Link Object
    • TCP/IP Interface Object
    • QOS Object
    • Device Level Ring Object
  • Supported Connections
    • Exclusive Owner Connection
    • Input Only Connection
    • Listen Only Connection
  • Total CIP connections : 9
    • IO Messaging : 6
    • Explicit Messaging : 3
  • PHY Configuration
    • Duplex : Half/Full/Auto
    • Speed : 10/100/Auto
  • Device Configuration : EDS File
  • QoS scheme : 3-bit VLAN PCP
    • No of levels supported : 8
    • Number of queues : 4. 2 QoS levels per queue
  • Statistics
    • Media counters supported per port
    • Interface counters supported per port
  • Conformance : CT 15 compliant
  • Min RPI supported : 1ms
  • Device Level Ring
    • Beacon Based
    • Min. beacon interval : 200 us
    • Min. beacon timeout : 400 us
    • Self configuring
  • PTP/1588
    • Supports Drives Profile : E2E clock.
    • PTP over UDP
    • Transparent Clock supported
    • Ordinary Clock supported
    • Single and Two step clock supported
  • Learning/FDB : Yes
    • 1024 entries per port
    • Learning table on DDR
  • Storm Prevention : Yes. Configurable per port
  • Support for Multicast Filtering
    • Supported on all SoCs
    • Hash Table for faster lookup
    • O(1) complexity

4.2.4.1.3. What is not supported

  • CIP Sync support in stack
  • IEEE 1588 Master support

4.2.4.1.4. PRU-ICSS Firmware Revision

Platform Build Firmware Header Location
AM57x 5.2.1 protocols\ethernetip_adapter\firmware\v1.0
AM3/AM4/AMIC110 5.2.1 protocols\ethernetip_adapter\firmware\v2.1

4.2.4.1.5. Fixed Issues

Record ID Platform Details
PINDSW-737 AM57x Cut through drop is observed in Ethernet/IP adapter application when packets of random sizes are sent at 960ns IPG
PINDSW-741 AM57x Drop in cut through packets over IXIA traffic at Line rate
PINDSW-1041 AM57x EtherNetIP not communicating at 10mbps on AM57xx
PINDSW-1050 Sitara, K2G Statistics enhancements for dropped frames caused by overflow/collision
PINDSW-1056 AM57x Am571x PRU-ICSS1 Port 2 not communicating in EIP
PINDSW-1180 Sitara, K2G Statistics not counted properly for data on both ports
PINDSW-1259 Sitara, K2G DLR Error: Didn’t receive valid Learning_Update Frame from DUT within 100 milliseconds
PINDSW-1735 AM57x Sync0 output for AM57x board should align with start of second
PINDSW-1742 K2G PTP sync disabled on K2G platform
PINDSW-1745 K2G LinkISR doesnt update status properly when application starts with both ports up
PINDSW-1781 K2G EIP application on K2G is crashing
PINDSW-1791 AM57x Ring setup with 2 AM57x boards generates 2 ring faults overnight
PINDSW-1794 AM57x AM571x application crashes when PRU-ICSS 1 is enabled
PINDSW-1953 AM57x Bridge Delay correction not done correctly for 2-step Sync
PINDSW-2069 AM437x No IP Taken after the Board does Type 0 Reset
PINDSW-2141 Sitara, K2G DLR frames with VLAN tag stripped are not being processed correctly
PINDSW-2163 Sitara, K2G Incorrect Source IP for PTP
PINDSW-2356 AM3, AM4 Increased collisions and re-transmissions seen in 2.1.6 EIP firmware
PINDSW-2513 Sitara, K2G Minimum IPG of 9600ns for 10Mbps is not maintained
PINDSW-2640 Sitara, K2G Adding Ethernet/IP media counters
PINDSW-2811 Sitara, K2G EIP PTP jitter is high as bridge delay not getting computed correctly

4.2.4.1.6. Known Issues

This section contains the list of known Issues at the time of making the release.

Record ID Platform Details Workaround
PINDSW-3032 Sitara, K2G Incorrect init of stack causing app to crash for EDITT 12.4 test case Check for successful malloc of structure members

4.2.4.2. Additional Notes

Details of key interface changes in the package from the previous release

NEW OLD Notes/Impact
PTP Design has significantly changed, uses standard Rx queues for synchronization Old design required special interrupts for triggering synchronization Migration guide and design changes are documented in PTP developer guide