1. Overview

• 1.1. Industrial Protocol Package Getting Started Guide
  • 1.1.1. Introduction
  • 1.1.2. Package Installation
    • 1.1.2.1. Processor SDK Patching and Rebuilding
    • 1.1.2.2. Setting up the patching tool
    • 1.1.2.3. Locating the patch files in PRU-ICSS industrial protocol package
    • 1.1.2.4. Applying the patch
    • 1.1.2.5. Rebuilding the Processor SDK LLDs
  • 1.1.3. Running Pre-Built Applications
  • 1.1.4. Running Application from SD card/QSPI Flash
  • 1.1.5. Setup CCS for EVM and Processor SDK RTOS
  • 1.1.6. Building and Running Sample Application
    • 1.1.6.1. Importing and Building Sample Project in CCS
    • 1.1.6.2. Creating Debug Configuration to Integrate CCS GEL and DMSC Firmware Initialization
    • 1.1.6.3. Launching and Debugging application in CCS
• 1.2. Frequently Asked Questions for Sitara Industrial
  • 1.2.1. General Development Questions
    • 1.2.1.1. Processor SDK Training Series
    • 1.2.1.2. PRU-ICSS Industrial Overview
    • 1.2.1.3. Where to find information on porting industrial applications from a TI Sitara EVM to a custom board
    • 1.2.1.4. PRU-ICSS/PRU_ICSSG migration guide
  • 1.2.2. Industrial Communications Protocol
    • 1.2.2.1. What EVMS Support Industrial Protocols
    • 1.2.2.2. Where to find additional information on TI’s Profinet solutions on Sitara processors
    • 1.2.2.3. Where to find information on TI’s High-availability Seamless Redundancy (HSR) Ethernet solutions on TI Sitara Processors
    • 1.2.2.4. Where to find information on TI’s Parallel Redundancy Protocol (PRP) Ethernet solutions on TI Sitara Processors
    • 1.2.2.5. Where to find information on TI’s Packet Processing Engine for IEC61850 GOOSE Forwarding on TI Sitara Processors
    • 1.2.2.6. Where to find information on TI’s Multi-Protocol Industrial Ethernet Detection w/PRU-ICSS solutions on TI Sitara Processors
    • 1.2.2.7. Where to find information on Fast Startup for Industrial Ethernet Applications on TI Sitara Processors
    • 1.2.2.8. Where to find additional information on TI’s EtherCAT Master / Slave Solutions on Sitara processors
    • 1.2.2.9. Where to find additional information on TI’s Sitara processor EtherCAT Slave Implementation
    • 1.2.2.10. Are there other EtherCAT stack partners for Sitara devices
    • 1.2.2.11. EtherCAT slave DDR-less on AMIC110
    • 1.2.2.12. Where to find additional information on TI’s Sercos-III solutions on Sitara processors?
    • 1.2.2.13. Where to find additional information on TI’s EthernetIP solutions on Sitara processors
    • 1.2.2.14. When trying to use Industrial SDK ethernetip_adapter example, the code can only be used for one hour only. Why? What is required to get the full version?
    • 1.2.2.15. Where to find additional information on TI’s PROFIBUS solutions on Sitara processors?
    • 1.2.2.16. Looking for an industrial Ethernet slave design which supports several industrial ethernet protocols. Where to find additional information on multi- protocol industrial ethernet solutions for Sitara processors?
    • 1.2.2.17. Can an ICSS support more than one Industrial Ethernet slave at the same time?
    • 1.2.2.18. In developing a multi-protocol industrial Ethernet slave, which slave industrial Ethernet interfaces can run without using an ICSS?
    • 1.2.2.19. Where to find information on using the ICSS EMAC LLD
    • 1.2.2.20. How many PRU cores are required for running EtherCAT slave in AM335x/AM437x devices?
    • 1.2.2.21. Can we use the MII2 (from the CPSW) as the MAC for industrial Ethernet?
    • 1.2.2.22. Can we use any AM335x to support EtherCAT slave
    • 1.2.2.23. Is there an example that demonstrates a two MAC interface?
    • 1.2.2.24. Is there an example that demonstrates a standard Ethernet switch?
    • 1.2.2.25. How to test a Profinet system?
    • 1.2.2.26. How are the MAC address set for the PRU-ICSS (Since there is no EMAC present in PRU-ICSS)
    • 1.2.2.27. Can we access PRU firmware sources for Industrial Ethernet protocols?
    • 1.2.2.28. Ethernet PHY Configuration Using MDIO for Industrial Applications
    • 1.2.2.29. Can we use PHY for EtherCAT which does not provide high speed output indication?
    • 1.2.2.30. How to upgrade EtherCAT slave application using FoE?
  • 1.2.3. General Topics
    • 1.2.3.1. How to get notified when there is a software update
    • 1.2.3.2. Where to find the PRU-ICSS Frequently Asked Questions
      • 1.2.3.2.1. Where to find information on porting industrial applications from a TI Sitara EVM to a custom board
      • 1.2.3.2.2. UART messages were working with my IDK board but suddenly I am not getting any message, how to fix it?
      • 1.2.3.2.3. Is it possible to use FIQs Interrupts with AM335x?
      • 1.2.3.2.4. The PRU-ICSS Industrial AM3359 examples fails on ICE_AM3359 EVM with no output in UART terminal
• 1.3. PRU-ICSS FAQ
  • 1.3.1. Introduction
  • 1.3.2. PRU Applications & Support questions
    • 1.3.2.1. Q: What is the difference between the PRU subsystem and ICSS?
    • 1.3.2.2. Q: Is TI providing libraries for the PRU?
    • 1.3.2.3. Q: Can I develop my own industrial protocols on the PRU-ICSS?
    • 1.3.2.4. Q: What differences exist between the PRU-ICSS in difference devices?
    • 1.3.2.5. Q: Where can I find more information about the PRU?
    • 1.3.2.6. Q: Can the PRU run a High Level Operating System?
    • 1.3.2.7. Q: My processor has a PRU. Is the PRU supported in the Linux Processor SDK?
  • 1.3.3. PRU Memory Access questions
    • 1.3.3.1. Q: Why does my PRU firmware hang when reading or writing to an address external to the PRU Subsystem?
    • 1.3.3.2. Q: In AM437x, why can PRU-ICSS0 not access memories outside of the ARM?
    • 1.3.3.3. Q: Why can the PRU not edit pinmux settings?
  • 1.3.4. PRU GPI/O questions
    • 1.3.4.1. PRU GPO direct output mode
      • 1.3.4.1.1. Q: What is the maximum speed for toggling PRU GPO pins via PRU software?
    • 1.3.4.2. PRU GPI 28-bit shift in
      • 1.3.4.2.1. Q: When does the PRU start capturing from the input pins?
      • 1.3.4.2.2. Q: Can the module be modified so that the GPI start bit is a zero instead of a one?
      • 1.3.4.2.3. Q: What happens after 28 bit shifts?
    • 1.3.4.3. PRU GPO shift out
      • 1.3.4.3.1. Q: Can data be pre-loaded into shadow registers prior to configuring the PRU GPO mode to shift out mode?
      • 1.3.4.3.2. Q: When does PRU_CLOCKOUT start running?
      • 1.3.4.3.3. Q: When does the PRU start shifting data in the shadow registers?
      • 1.3.4.3.4. Q: The shadow registers are loaded by writing to PRU_R30 [0:15]. Does this change the state of the corresponding device-level pins?
      • 1.3.4.3.5. Q: When the PRU_ENABLE_SHIFT bit is cleared, does the PRU immediately stop shifting PRU_DATAOUT?
      • 1.3.4.3.6. Q: Does the PRU shift data out LSB or MSB first?
      • 1.3.4.3.7. Q: What happens to the content stored in R30 when the PRU changes to a different GPO mode?
  • 1.3.5. PRU INTC and System Event questions
    • 1.3.5.1. Q: How can a PRU core interrupt the ARM? How can the ARM interrupt a PRU core?
    • 1.3.5.2. Q: On devices with multiple PRU-ICSSs, how can one PRU-ICSS interrupt the other?
  • 1.3.6. PRU Debugger questions
    • 1.3.6.1. Q: When using the XDS510 USB emulator, why does the PRU Program Counter not increment correctly when stepping through PRU Disassembly code?
    • 1.3.6.2. Q: Why are no MMRs outside the PRU subsystem visible from the PRU perspective memory browser window in CCS?
  • 1.3.7. PRU Linux Driver questions
    • 1.3.7.1. Q: How can I load (and run) firmware on AM437x PRUSS0 using the remote_proc linux driver?