|
void | SOC_rcmCoreApllConfig (SOC_RcmPllFoutFreqId outFreqId, SOC_RcmPllHsDivOutConfig *hsDivCfg) |
| Configure CORE PLL. More...
|
|
uint32_t | SOC_rcmCoreApllRelockPreRequisite (void) |
| Pre-requisite sequence to Re-configure CORE PLL. More...
|
|
void | SOC_rcmSetR5ClockSource (uint32_t r5ClkSrc) |
| Set R5 clock source. More...
|
|
void | SOC_rcmCoreApllHSDivConfig (SOC_RcmPllFoutFreqId outFreqId, SOC_RcmPllHsDivOutConfig *hsDivCfg) |
| Configure CORE PLL HSDIVIDERS. More...
|
|
void | SOC_rcmPerApllConfig (SOC_RcmPllFoutFreqId outFreqId, SOC_RcmPllHsDivOutConfig *hsDivCfg) |
| Configure PER PLL. More...
|
|
void | SOC_rcmsetR5SysClock (uint32_t cr5FreqHz, uint32_t sysClkFreqHz, uint32_t cpuId) |
| Set R5FSS and Sysclk frequency (Root clock configuration) More...
|
|
void | SOC_rcmsetTraceClock (uint32_t traceFreqHz) |
| Set Trace clock frequency. More...
|
|
void | SOC_rcmsetClkoutClock (uint32_t clkout0FreqHz, uint32_t clkout1FreqHz) |
| Set CLKOUT clock frequency. More...
|
|
int32_t | SOC_rcmSetPeripheralClock (SOC_RcmPeripheralId periphId, SOC_RcmPeripheralClockSource clkSource, uint32_t freqHz) |
| Set module clock (IP clock configuration) More...
|
|
void | SOC_rcmSetCPSWResetBit () |
| Set CPSW hard reset bit. More...
|
|
void | SOC_rcmClearCPSWResetBit () |
| Clear CPSW hard reset bit. More...
|
|
SOC_RcmResetCause | SOC_rcmGetResetCause (SOC_Rcmr5fssNum r5fssNum) |
| Get R5FSS reset cause. More...
|
|
int32_t | SOC_rcmEnablePeripheralClock (SOC_RcmPeripheralId periphId, uint32_t enable) |
| Enable/disable module clock (IP clock configuration) More...
|
|
int32_t | SOC_rcmSetR5Clock (uint32_t r5FreqHz, uint32_t sysClkFreqHz, uint32_t cpuId) |
| Set R5SS0/R5SS1 and SysClk frequency. More...
|
|
uint32_t | SOC_rcmGetR5Clock (uint32_t cpuId) |
| Get R5SS0/1 frequency. More...
|
|
void | SOC_rcmR5ConfigLockStep (uint32_t cpuId) |
| Configure R5 in lock step mode. More...
|
|
void | SOC_rcmR5ConfigDualCore (uint32_t cpuId) |
| Configure R5 in dual core mode. More...
|
|
void | SOC_rcmR5SS0TriggerReset (void) |
| Trigger R5 core reset. More...
|
|
void | SOC_rcmCoreR5FUnhalt (uint32_t cpuId) |
| Unhalt R5 cores. More...
|
|
void | SOC_rcmStartMemInitTCMA (uint32_t cpuId) |
| Start memory initialization for R5 TCMA. More...
|
|
void | SOC_rcmWaitMemInitTCMA (uint32_t cpuId) |
| Wait memory initialization to complete for R5 TCMA. More...
|
|
void | SOC_rcmStartMemInitTCMB (uint32_t cpuId) |
| Start memory initialization for R5 TCMB. More...
|
|
void | SOC_rcmWaitMemInitTCMB (uint32_t cpuId) |
| Wait memory initialization to complete for R5 TCMB. More...
|
|
void | SOC_rcmMemInitMailboxMemory (void) |
| Wait memory initialization to complete for Mailbox memory. More...
|
|
void | SOC_rcmMemInitL2Memory (void) |
| Wait memory initialization to complete for L2 Bank2 and Bank3 memory. More...
|
|
void | SOC_rcmR5SS0PowerOnReset (void) |
| Reset R5SS0 Core. More...
|
|
void | SOC_rcmR5SS1TriggerReset (void) |
| Trigger R5SS1 core reset. More...
|
|
void | SOC_rcmR5SS1PowerOnReset (void) |
| Reset R5SS1 Core. More...
|
|
uint32_t | SOC_rcmIsR5FInLockStepMode (uint32_t r5fClusterGroupId) |
| Return R5SS status operating in lockstep or dual core mode. More...
|
|
void | SOC_generateSwWarmReset (void) |
| Generate SW WARM reset. More...
|
|
void | SOC_configureWarmResetSource (uint32_t source) |
| Configure WARM reset source. More...
|
|
SOC_WarmResetCause | SOC_getWarmResetCause (void) |
| Returns cause of WARM reset. More...
|
|
void | SOC_clearWarmResetCause (void) |
| Clear Reset Cause register. More...
|
|
void | SOC_configureWarmResetOutputDelay (uint16_t opDelayValue) |
| Program output delay on warm reset Pad 1. More...
|
|
void | SOC_configureWarmResetInputRiseDelay (uint16_t inpRiseDelayValue) |
| Program input rise delay on warm reset Pad 2. More...
|
|
void | SOC_configureWarmResetInputFallDelay (uint16_t inpFallDelayValue) |
| Program output delay on warm reset Pad 3. More...
|
|