Software PLL Library Test

Table of Contents

• Files and directory structure
• Supported Combinations
• Steps to Run the Example
  • Sample Output

This example demonstrates capability of SPLL_1ph_sogi library. In this ramp generator is used to create ramp signal and with sine function, a sine wave of 50Hz frequency is generated. Generated Sine wave is provided as input with amplitude multiplication to SPLL_1ph_SOGI block. To test the output of SPLL block is inphase with input, power measurement library is used which will calculate power factor and it is displayed on console.

Files and directory structure

Folder/Files	Description
spll_main.c	Main function for testing SPLL
power_meas_sine_analyzer.h	power measurement library header file
rampgen.h	rampgen library header file
spll_1ph_sogi.h	SPLL library header file
spll.syscfg	DAC configuration as per test usage

Supported Combinations

Parameter	Value
CPU + OS	r5fss0-0 nortos
	r5fss0-0 freertos
Toolchain	ti-arm-clang
Boards	am263x-cc
Example folder	examples/spll

Steps to Run the Example

• When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects ).
• When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles ).
• Launch a CCS debug session and run the executable, see CCS Launch, Load and Run

Sample Output

Shown below is a sample output when the application is run: Input sine wave of 50Hz provided for SPLL block can be observed in DAC port as shown in figure and power factor is calculated between input and output of SPLL block which should be close to 1 as it need to be inphase:

Input of SPLL block observed from logic analyzer

- Phase difference between input and output of SPLL block - Calculating Power factor
- Power factor = 0.999605