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MCUSW
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This file contains generated configuration for ETH MCAL driver.
Go to the source code of this file.
#define | EthConf_EthCtrlConfig_EthConfig_0 (0U) |
Eth controller ID Configured controller ID(s) | |
#define | ETH_CTRL_ID_0 (0U) |
#define | ETH_PRE_COMPILE_VARIANT (STD_ON) |
Eth configuration variant. | |
#define | ETH_LINK_TIME_VARIANT (STD_OFF) |
#define | ETH_POST_BUILD_VARIANT (STD_OFF) |
#define | ETH_CTRL_ID_MAX (1U) |
Eth max controller ID. | |
#define | NOP1 asm (" NOP ") |
NOP Macros Macros to insert "NOP" assembly instructions. | |
#define | NOP5 NOP1; NOP1; NOP1; NOP1; NOP1 |
#define | NOP10 NOP5; NOP5 |
#define | NOP20 NOP10; NOP10 |
#define | NOP30 NOP20; NOP10 |
#define | NOP40 NOP30; NOP10 |
#define | NOP50 NOP40; NOP10 |
#define | NOP100 NOP50; NOP50 |
#define | NOP200 NOP100; NOP100 |
#define | NOP300 NOP200; NOP100 |
#define | NOP400 NOP300; NOP100 |
#define | NOP500 NOP400; NOP100 |
#define | ETH_DMA_IR_SUPPORT (STD_ON) |
Eth DMA feature flag support. | |
#define | ETH_DMA_CQ_RING_SUPPORT (STD_ON) |
#define | ETH_DMA_TEARDOWN_SUPPORT (STD_ON) |
#define | ETH_DMA_PROXY_SUPPORT (STD_ON) |
#define | ETH_DMA_RX_CH_SPERATE (STD_OFF) |
#define | UDMA_DEVICE_ID_RING (235U) |
Eth DMA devices ID. | |
#define | UDMA_DEVICE_ID_UDMA (236U) |
#define | UDMA_DEVICE_ID_PSIL (232U) |
#define | UDMA_DEVICE_ID_IA (233U) |
#define | UDMA_DEVICE_ID_IR (237U) |
#define | UDMA_DEVICE_ID_CORE (250U) |
#define | UDMA_DEVICE_ID_PROXY (234U) |
#define | UDMA_TX_CHANNEL_PEER_OFFSET (0xf000U) |
Eth DMA peer and thread offset. | |
#define | UDMA_RX_CHANNEL_PEER_OFFSET (0x7000U) |
#define | UDMA_SOURCE_THREAD_OFFSET (0x6000U) |
#define | UDMA_DEST_THREAD_OFFSET (0xe000U) |
#define | ETH_DMA_TX_BASE_REG (0x2aa00000U) |
Eth DMA base register address. | |
#define | ETH_DMA_RX_BASE_REG (0x2a800000U) |
#define | ETH_DMA_RINGRT_BASE (0x2b800000U) |
#define | ETH_DMA_RINGCFG_BASE (0x28440000U) |
#define | ETH_DMA_INTAGGR_INTR_BASE (0x2a700000U) |
#define | ETH_DMA_TXCRT_CHAN_CTL(CHAN) |
Eth DMA macro to calculate register address for DMA register address. | |
#define | ETH_DMA_TXCRT_CHAN_PEER8(CHAN) |
#define | ETH_DMA_RXCRT_CHAN_CTL(CHAN) |
#define | ETH_DMA_RXCRT_CHAN_PEER8(CHAN) |
#define | ETH_DMA_RINGRT_RING_FDB(RING) |
#define | ETH_DMA_RINGRT_RING_FOCC(RING) |
#define | ETH_DMA_RINGRT_RING_RDB(RING) |
#define | ETH_DMA_RINGRT_RING_ROCC(RING) |
#define | ETH_DMA_RINGRT_RING_HWOCC(RING) |
#define | ETH_DMA_RINGCFG_RING_SIZE(RING) |
#define | ETH_DMA_INTAGGR_INTR_VINT_ENABLE_SET(VINT) |
#define | ETH_DMA_INTAGGR_INTR_VINT_ENABLE_CLEAR(VINT) |
#define | ETH_DMA_INTAGGR_INTR_VINT_STATUS_SET(VINT) |
#define | ETH_DMA_INTAGGR_INTR_VINT_STATUS_CLEAR(VINT) |
#define | ETH_DMA_INTAGGR_INTR_VINT_STATUSM(VINT) |
#define | Eth_GetRingFDBReg(RingNum) |
#define | Eth_GetRingFOCCReg(RingNum) |
#define | Eth_GetRingRDBReg(RingNum) |
#define | Eth_GetRingROCCReg(RingNum) |
#define | Eth_GetRingHWOCCReg(RingNum) |
#define | Eth_GetRingSizeReg(RingNum) |
#define | Eth_GetTxChannelCtlRegAddress(ChanId) |
#define | Eth_GetTxChannelPeer8RegAddress(ChanId) |
#define | Eth_GetRxChannelCtlRegAddress(ChanId) |
#define | Eth_GetRxChannelPeer8RegAddress(ChanId) |
#define | ETH_CSL_PROXY0_TARGET0_DATA_BASE (0x2a500000U) |
#define | ETH_CSL_PROXY_TARGET0_PROXY_CTL(PROXY) |
#define | ETH_CSL_PROXY_TARGET0_PROXY_DATA_FIELD(PROXY) |
#define | UDMA_WAIT_TEARDOWN_COUNTER (10000u) |
Eth DMA max teardown timeout. | |
#define | ETH_DEM_EVENT_SUPPORT (STD_OFF) |
ETH support DEM event feature. | |
#define | ETH_RX_MTU_HOST_PORT_LENGTH (1522U) |
Eth max MTU for host port in bytes This value need to equal max MTU for all ingress fifo buffer size. | |
#define | Eth_Cpsw_GetPhyMacRegAddr() |
Eth function like macro to access Eth general configuration. | |
#define | Eth_Cpsw_GetAleRegAddr() |
#define | Eth_Cpsw_GetCptsRegAddr() |
#define | Eth_Cpsw_GetMdioRegAddr() |
#define | Eth_Cpsw_GetCtrlRegAddr() |
#define | Eth_Cpsw_GetCppiClockFreq() |
#define | Eth_Cpsw_GetCptsRefClockFreq() |
#define | Eth_Cpsw_GetMdioBusClockFreq() |
#define | Eth_Cpsw_GetMdioOpMode() |
#define | Eth_Cpsw_GetMdioEnableInterrupt() |
#define | Eth_GetDem_E_HARDWARE_ERROR(CtrlIndex) |
ETH DEM Error codes to report. | |
#define | Eth_GetDem_E_LATECOLLISION(CtrlIndex) |
#define | Eth_GetDem_E_MULTIPLECOLLISION(CtrlIndex) |
#define | Eth_GetDem_E_SINGLECOLLISION(CtrlIndex) |
#define | Eth_GetDem_E_ALIGNMENT(CtrlIndex) |
#define | Eth_GetDem_E_OVERSIZEFRAME(CtrlIndex) |
#define | Eth_GetDem_E_UNDERSIZEFRAME(CtrlIndex) |
#define | Eth_GetDem_E_CRC(CtrlIndex) |
#define | Eth_GetDem_E_RX_FRAMES_LOST(CtrlIndex) |
#define | Eth_GetDem_E_ACCESS(CtrlIndex) |
#define | Eth_GetDem_E_TX_INTERNAL(CtrlIndex) |
#define | Eth_IsVirtualMacModeEnable(CtrlIndex) |
Eth function like macro to access controler configuration. | |
#define | Eth_GetTxChannelThreadOffset(CtrlIndex) |
#define | Eth_VirtMacGetEthFwRpcComChannelId(CtrlIndex) |
#define | Eth_VirtMacGetEthPollRecvMsgInEthMain(CtrlIndex) |
#define | Eth_VirtMacGetRpcCmdCompleteFuncPtr(CtrlIndex) |
#define | Eth_VirtMacGetFwRegisterFuncPtr(CtrlIndex) |
#define | Eth_VirtMacGetRemoteVirtPort(CtrlIndex) |
#define | Eth_VirtMacGetDmaTxChannelPairAll(CtrlIdx) |
#define | Eth_VirtMacGetDmaTxChannelUnpairAll(CtrlIdx) |
#define | Eth_VirtMacGetDmaFlowCfgAll(CtrlIdx) |
#define | Eth_VirtMacGetDmaFlowResetAll(CtrlIdx) |
#define | Eth_GetTxEnableInterrupt(CtrlIndex) |
#define | Eth_GetRxEnableInterrupt(CtrlIndex) |
#define | Eth_GetEnetType(CtrlIndex) |
#define | Eth_GetMacPortNum(CtrlIndex) |
#define | Eth_GetMacAddressHigh(CtrlIndex) |
#define | Eth_GetMacAddressLow(CtrlIndex) |
#define | Eth_UseDefaultMacAddress(CtrlIndex) |
#define | Eth_GetMiiConnectionType(CtrlIndex) |
#define | Eth_GetLoopBackMode(CtrlIndex) |
#define | Eth_GetHardwareLoopTimeout(CtrlIndex) |
#define | Eth_IsPacketMemCacheable(CtrlIndex) |
#define | Eth_IsRingMemCacheable(CtrlIndex) |
#define | Eth_IsDescMemCacheable(CtrlIndex) |
#define | Eth_GetRxMtuLength(CtrlIndex) |
#define | Eth_GetTxChanStartNum(CtrlIndex) |
#define | Eth_GetRxChanStartNum(CtrlIndex) |
#define | Eth_GetEgressFifoTotalNum(CtrlIndex) |
#define | Eth_GetIngressFifoTotalNum(CtrlIndex) |
#define | Eth_GetRingTotalNum(CtrlIndex) |
#define | Eth_GetTxChanTotalNum(CtrlIndex) |
#define | Eth_GetRxChanTotalNum(CtrlIndex) |
#define | Eth_GetFlowTotalNumber(CtrlIndex) |
#define | Eth_GetEventTotalNum(CtrlIndex) |
#define | Eth_GetRingEventTotalNum(CtrlIndex) |
#define | Eth_GetTxDmaThresholdNum(CtrlIndex) |
#define | Eth_GetRxDmaThresholdNum(CtrlIndex) |
#define | Eth_GetEgressFifoPacketNum(CtrlIndex, FifoIdx) |
#define | Eth_GetEgressFifoPacketSize(CtrlIndex, FifoIdx) |
#define | Eth_GetIngressFifoPacketNum(CtrlIndex, FifoIdx) |
#define | Eth_GetIngressFifoPacketSize(CtrlIndex, FifoIdx) |
#define | Eth_GetEgressFifoPriorityAsignment(CtrlIndex, Prio) |
#define | Eth_GetIngressFifoPriorirtyAsignment(CtrlIndex, Prio) |
#define | Eth_GetEgressFifoDescAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetEgressFifoDescUserInfoAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetEgressFifoBufferDataAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetEgressFifoQueueAddress(CtrlIndex, FifoIdx) |
#define | Eth_GetEgressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx) |
#define | Eth_SetEgressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx, Val) |
#define | Eth_GetIngressFifoDescAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetIngressFifoDescUserInfoAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetIngressFifoBufferDataAddress(CtrlIndex, FifoIdx, DescIdx) |
#define | Eth_GetIngressFifoQueueAddress(CtrlIndex, FifoIdx) |
#define | Eth_GetIngressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx) |
#define | Eth_SetIngressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx, Val) |
#define | Eth_GetEgressFifoCqIdx(CtrlIndex, FifoIdx) |
#define | Eth_GetEgressFifoFqIdx(CtrlIndex, FifoIdx) |
#define | Eth_GetIngressFifoCqIdx(CtrlIndex, FifoIdx) |
#define | Eth_GetIngressFifoFqIdx(CtrlIndex, FifoIdx) |
#define | Eth_GetTxChanId(CtrlIndex, ChIdx) |
#define | Eth_GetTxChanTdCqRingIdx(CtrlIndex, ChIdx) |
#define | Eth_GetTxChanDepth(CtrlIndex, ChIdx) |
#define | Eth_GetRxChanId(CtrlIndex, ChIdx) |
#define | Eth_GetRxChanTdCqRingIdx(CtrlIndex, ChIdx) |
#define | Eth_GetRxChanFlowTotalNum(CtrlIndex, ChIdx) |
#define | Eth_GetRxChanFlowStartNum(CtrlIndex, ChIdx) |
#define | Eth_GetFlowId(CtrlIndex, FlowIdx) |
#define | Eth_GetFlowCqRingIdx(CtrlIndex, FlowIdx) |
#define | Eth_GetFlowFqRingIdx(CtrlIndex, FlowIdx) |
#define | Eth_GetDynRingElemAddress(CtrlIndex, RingIdx) |
#define | Eth_GetRingHwId(CtrlIndex, RingIdx) |
#define | Eth_GetRingTotalElemNum(CtrlIndex, RingIdx) |
#define | Eth_GetRingPriority(CtrlIndex, RingIdx) |
#define | Eth_GetRingMemBaseAddress(CtrlIndex, RingIdx) |
#define | Eth_GetRingEventRingIdx(CtrlIndex, RingEvtIdx) |
#define | Eth_GetRingEventGlobalEventNum(CtrlIndex, RingEvtIdx) |
#define | Eth_GetRingEventVirtBitNum(CtrlIndex, RingEvtIdx) |
#define | Eth_GetRingEventEventIdx(CtrlIndex, RingEvtIdx) |
#define | Eth_GetRingEventSrcOffsetNum(CtrlIndex, RingEvtIdx) |
#define | Eth_GetEventCoreIntrNum(CtrlIndex, EvtIdx) |
#define | Eth_GetEventVirtIntrNum(CtrlIndex, EvtIdx) |
#define | Eth_GetEventIrIntrNum(CtrlIndex, EvtIdx) |
#define | Eth_GetTxEventCoreIntrNum(CtrlIndex) |
#define | Eth_GetRxEventCoreIntrNum(CtrlIndex) |
#define | Eth_GetHwTimerTotalNum(CtrlIndex) |
#define | Eth_GetHwTimerId(CtrlIndex, Index) |
#define | Eth_GetHwTimerCounter(CtrlIndex, Index) |
#define | Eth_GetHwTimerBaseAddr(CtrlIndex, Index) |
#define | Eth_GetHwTimerDynRunningState(CtrlIndex, Index) |
#define | Eth_SetHwTimerDynRunningState(CtrlIndex, Index, Val) |
#define | Eth_GetRxIrqPacingEnable(CtrlIndex) |
#define | Eth_GetTxIrqPacingEnable(CtrlIndex) |
#define | Eth_GetRxHwTimerIdx(CtrlIndex) |
#define | Eth_GetTxHwTimerIdx(CtrlIndex) |
#define | Eth_GetIrqPacingEnable(CtrlIndex) |
#define | Eth_GetProxyTotalNum(CtrlIndex) |
#define | Eth_GetProxyThreadNum(CtrlIndex, ProxyIdx) |
#define | Eth_GetProxyTargetRingNum(CtrlIndex, ProxyIdx) |
#define | Eth_GetRingProxyIdx(CtrlIndex, RingIdx) |
#define | Eth_GetRingMode(CtrlIndex, RingIdx) |
#define | Eth_GetDmaRingCfg(CtrlIdx) |
#define | ETH_START_SEC_CONST_UNSPECIFIED |
#define | ETH_STOP_SEC_CONST_UNSPECIFIED |
#define | ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED_128 |
#define | ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED_128 |
#define | ETH_START_SEC_VAR_NO_INIT_8 |
#define | ETH_STOP_SEC_VAR_NO_INIT_8 |
#define | ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED |
#define | ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED |
#define | ETH_START_SEC_CODE |
Ring configure via SciClient function. | |
#define | ETH_STOP_SEC_CODE |
#define | Eth_GetMdioWriteLowBaseNsec() |
DelayNs (default value) in NOOP function/function like macro. | |
#define | Eth_GetMdioWriteHighBaseNsec() |
#define | Eth_GetMdioReadLowBaseNsec() |
#define | Eth_GetMdioReadHighBaseNsec() |
#define | Eth_GetMdioWriteLowDelayNsec(CtrlIdx) |
DelayNs (generate by user input) in NOOP function/function like macro. | |
#define | Eth_GetMdioWriteHighDelayNsec(CtrlIdx) |
#define | Eth_GetMdioReadLowDelayNsec(CtrlIdx) |
#define | Eth_GetMdioReadHighDelayNsec(CtrlIdx) |
enum | Eth_PortType { ETH_PORT_HOST_PORT = 0x00U , ETH_MAC_PORT_FIRST = 0x01U , ETH_PORT_MAC_PORT_1 = 0x01U , ETH_PORT_MAC_PORT_2 = 0x02U , ETH_PORT_MAC_PORT_3 = 0x03U , ETH_PORT_MAC_PORT_4 = 0x04U , ETH_PORT_MAC_PORT_5 = 0x05U , ETH_PORT_MAC_PORT_6 = 0x06U , ETH_PORT_MAC_PORT_7 = 0x07U , ETH_PORT_MAC_PORT_8 = 0x08U , ETH_PORT_MAC_PORT_LAST = ETH_PORT_MAC_PORT_8 } |
Port identifier. More... | |
enum | Eth_MacConnectionType { ETH_MAC_CONN_TYPE_RMII_10 = 0x01U , ETH_MAC_CONN_TYPE_RMII_100 = 0x02U , ETH_MAC_CONN_TYPE_RGMII_FORCE_100_HALF = 0x03U , ETH_MAC_CONN_TYPE_RGMII_FORCE_100_FULL = 0x04U , ETH_MAC_CONN_TYPE_RGMII_FORCE_1000_FULL = 0x05U , ETH_MAC_CONN_TYPE_RGMII_DETECT_INBAND = 0x06U } |
Type/Speed/Duplex connection type. More... | |
enum | Eth_EnetType { ETH_ENETTYPE_CPSW2G = 0x00U , ETH_ENETTYPE_CPSW9G = 0x01U , ETH_ENETTYPE_CPSW5G = 0x02U , ETH_ENETTYPE_CPSW3G = 0x03U , ETH_ENETTYPE_CPSWLAST } |
Enet Cpsw Type identifier. More... | |
enum | Eth_MdioOperModeType { ETH_MDIO_OPMODE_NORMAL = 0x00U , ETH_MDIO_OPMODE_MANUAL = 0x01U } |
MDIO operating mode. More... | |
typedef void(* | Eth_RpcCmdComplete) (uint8 CtrlIdx, uint8 sid, sint32 status) |
Application callback to indicate Rpc dispatch command completion. | |
typedef void(* | Eth_RpcFwRegistered) (uint8 CtrlIdx) |
Application callback to indicate Ethernet firmware registered with the Eth RPC client. | |
typedef Std_ReturnType(* | Eth_DmaRingCfg) (uint8 ctrlIdx, uint8 ringIdx) |
Mdio delay in nsec function pointer. | |
typedef void(* | Eth_MdioDelayNsecFunc) (void) |
Pair PSIL TX channel function pointer. | |
typedef Std_ReturnType(* | EthVirtMacDmaTxChannelPair) (uint8 ctrlIdx) |
Unpair PSIL TX channel function pointer. | |
typedef Std_ReturnType(* | EthVirtMacDmaTxChannelUnPair) (uint8 ctrlIdx) |
Flow config function pointer. | |
typedef Std_ReturnType(* | EthVirtMacDmaFLowCfg) (uint8 ctrlIdx) |
Flow reset function pointer. | |
typedef Std_ReturnType(* | EthVirtMacDmaFLowReset) (uint8 ctrlIdx) |
const Eth_Udma_RingCfgType | Eth_Udma_RingCfg_0 [6U] |
const Eth_Udma_EventCfgType | Eth_EventCfg_Ctrl_0 [2U] |
const Eth_Udma_RingEventCfgType | Eth_RingEventCfg_Ctrl_0 [2U] |
VAR (uint8, ETH_VAR_NO_INIT_128) Eth_Ctrl_0_Egress_BufferMem_0[24576U] | |
VAR (Eth_DescType, ETH_VAR_NO_INIT_128) Eth_Ctrl_0_Egress_Descriptor_0[16U] | |
VAR (uint8, ETH_VAR_NO_INIT) Eth_Ctrl_0_Egress_BufferState_0[16U] | |
VAR (Eth_QueueType, ETH_VAR_NO_INIT) Eth_Ctrl_0_Egress_Queue_0[1U] | |
VAR (Eth_Udma_RingDynType, ETH_VAR_NO_INIT) Eth_RingDyn_Ctrl_0[6U] | |
Std_ReturnType | AppUtils_EthRingCfg (uint8 ctrlIdx, uint8 Id) |
Data Structures | |
struct | Eth_CpswConfigType |
Eth Cpsw Configurations type Configuration related to Cpsw data. More... | |
struct | Eth_Udma_RingCfgType |
Eth Udma ring Configurations type Configuration related to Udma ring. More... | |
struct | Eth_Udma_ProxyCfgType |
Eth Udma Proxy Configurations type Configuration related to Udma proxy. More... | |
struct | Eth_Udma_EventCfgType |
Eth Udma event Configurations type Configuration related to Udma event. More... | |
struct | Eth_Udma_RingEventCfgType |
Eth ring event configuration type Configuration related to ring event. More... | |
struct | Eth_FifoRingMapCfgType |
Eth Fifo ring map configuration type Configuration related to fifo map to ring. More... | |
struct | Eth_ChannelCfgType |
Eth channel configuration type Configuration related to channel. More... | |
struct | Eth_FlowCfgType |
Eth flow configuration type Configuration related to flow. More... | |
struct | Eth_ChannelFlowCfgType |
Eth channel flow configuration type Configuration related to channel flow. More... | |
struct | Eth_FifoHandleType |
Eth Fifo configuration type Configuration related to Fifo. More... | |
struct | Eth_Udma_CfgType |
Eth Udma configuration type Configuration related to Udma. More... | |
struct | Eth_VirtualMacConfigType |
Eth driver virtual mac configuration data Configuration related to virtual MAC configuration. More... | |
struct | Eth_HwTimerConfigType |
Eth driver hardware timer configuration data Configuration related to hardware timer. More... | |
struct | Eth_ControlerConfigType |
Eth controller configuration type Configuration related to Eth controller configuration. More... | |
struct | Eth_ConfigType |
Eth configuration type Configuration data of all controller. More... | |
Macros | |
#define | ETH_VERSION_INFO_API (STD_ON) |
Enable/disable SPI get version info API. | |
#define | ETH_GLOBALTIMESUPPORT_API (STD_ON) |
Enable/disable Eth time sync related API | |
#define | ETH_DEV_ERROR_DETECT (STD_ON) |
Enable/disable Development Error Detection. | |
#define | ETH_GET_COUNTER_VALUES_API (STD_ON) |
Enable/disable Eth get counter values API | |
#define | ETH_GET_RX_STATS_API (STD_ON) |
Enable/disable Eth get RX stats count API | |
#define | ETH_GET_TX_STATS_API (STD_ON) |
Enable/disable Eth get TX stats count API | |
#define | ETH_GET_TX_ERROR_COUNTERSVALUES_API (STD_ON) |
Enable/disable Eth get TX error stats count API | |
#define | ETH_ZERO_COPY_API (STD_OFF) |
Enable/disable Eth Zero-Copy support related APIs | |
#define | ETH_HEADER_ACCESS_API (STD_OFF) |
Enable/disable Eth Tx/Rx Header Access related APIs | |
#define | ETH_TRAFFIC_SHAPING_API (STD_OFF) |
Enable/disable Eth Traffic Shaping related APIs | |
#define | ETH_GET_COUNTER_STATE_API (STD_OFF) |
Enable/disable Eth get Counter state API | |
#define | ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_ICMP (STD_OFF) |
Enable/disable Hardware Offloading for ICMP checksums. | |
#define | ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_IPV4 (STD_OFF) |
Enable/disable Hardware offloading for IPv4 Header checksums. | |
#define | ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_TCP (STD_OFF) |
Enable/disable Hardware offloading for TCP checksums. | |
#define | ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_UDP (STD_OFF) |
Enable/disable Hardware offloading for UDP checksums. | |
#define | ETH_REGISTER_READBACK_API (STD_ON) |
Enable/disable optional API Eth_RegisterReadback. | |
#define | ETH_TIMESTAMP_VIA_CPTS_EVENT_FIFO (STD_ON) |
Enable/disable Eth CPTS event FIFO. | |
#define | ETH_PHY_FAULT_DETECTION_ENABLE (STD_ON) |
Enable/disable Eth Phy fault detection. | |
#define | ETH_ENABLE_MII_API (STD_ON) |
Enable/disable Eth MII related API | |
#define | ETH_UPDATE_PHYS_ADDR_FILTER_API (STD_ON) |
Enable/disable optional API Eth_UpdatePhysAddrFilter. | |
#define | ETH_ENABLE_IRQ_PACING (STD_OFF) |
Enable/disable IRQ pacing feature. | |
#define | ETH_VIRTUALMAC_NOTIFYMSGRECEIVED_API (STD_OFF) |
Enable/disable optional API Eth_NotifyVirtmacMsgReceived. | |
#define | ETH_VIRTUALMAC_SUBSCRIBEALLTRAFFIC_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacSubscribeAllTraffic. | |
#define | ETH_VIRTUALMAC_UNSUBSCRIBEALLTRAFFIC_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacUnsubscribeAllTraffic. | |
#define | ETH_VIRTUALMAC_SUBSCRIBEDSTMAC_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacSubscribeDstMac. | |
#define | ETH_VIRTUALMAC_UNSUBSCRIBEDSTMAC_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacUnsubscribeDstMac. | |
#define | ETH_VIRTUALMAC_ASSOCIATEIPV4MACADDR_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacAssociateIPv4Macaddr. | |
#define | ETH_VIRTUALMAC_DISASSOCIATEIPV4MACADDR_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacDisassociateIPv4Macaddr. | |
#define | ETH_VIRTUALMAC_ADD_MCAST_MACADDR_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacAddMcastAddr. | |
#define | ETH_VIRTUALMAC_DEL_MACADDR_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacDelAddr. | |
#define | ETH_VIRTUALMAC_ADD_VLAN_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacAddVlan. | |
#define | ETH_VIRTUALMAC_DEL_VLAN_API (STD_OFF) |
Enable/disable optional API Eth_DispatchVirtmacDelVlan. | |
#define | ETH_ETHIF_CBK_HEADER "EthIf_Cbk.h" |
EthIf Callback Header File to include inside the Eth driver. | |
#define | ETH_ISR_TYPE (ETH_ISR_CAT2) |
ISR type. | |
#define | ETH_OS_COUNTER_ID ((CounterType)OsCounter_0) |
Counter ID for counter used to count wait ticks. | |
#define | ETH_OS_COUNTER_FREQ (1000000000U) |
Frequency in Hz of the counter specified in ETH_OS_COUNTER_ID. | |
#define | ETH_INVALID_RING_ID (0xFFFFU) |
Eth Invalid Ring Id value. | |
#define | ETH_INVALID_EVENT_ID (0xFFFFU) |
Eth Invalid Event Id value. | |
#define | ETH_INVALID_CHAN_ID (0xFFFFU) |
Eth Invalid channel Id. | |
#define | ETH_INVALID_FLOW_ID (0xFFFFU) |
Eth Invalid Flow Id. | |
#define | ETH_INVALID_IRQ_ID (0xFFFFU) |
Eth Invalid IRQ value. | |
#define | ETH_DEM_NO_EVENT (0xFFFFU) |
Eth invalid DEM event ID | |
#define | ETH_VIRTUALMAC_SUPPORT (STD_OFF) |
Enable/disable Virtual MAC support. | |
#define | ETH_VIRTUALMAC_FWINFO_TIMEOUT (0U) |
Timeout value for Firmware Attach msg received from server. | |