Eth_Cfg.h File Reference

Introduction

This file contains generated configuration for ETH MCAL driver.

Go to the source code of this file.

Data Structures
struct	Eth_CpswConfigType
	Eth Cpsw Configurations type Configuration related to Cpsw data. More...
struct	Eth_Udma_RingCfgType
	Eth Udma ring Configurations type Configuration related to Udma ring. More...
struct	Eth_Udma_ProxyCfgType
	Eth Udma Proxy Configurations type Configuration related to Udma proxy. More...
struct	Eth_Udma_EventCfgType
	Eth Udma event Configurations type Configuration related to Udma event. More...
struct	Eth_Udma_RingEventCfgType
	Eth ring event configuration type Configuration related to ring event. More...
struct	Eth_FifoRingMapCfgType
	Eth Fifo ring map configuration type Configuration related to fifo map to ring. More...
struct	Eth_ChannelCfgType
	Eth channel configuration type Configuration related to channel. More...
struct	Eth_FlowCfgType
	Eth flow configuration type Configuration related to flow. More...
struct	Eth_ChannelFlowCfgType
	Eth channel flow configuration type Configuration related to channel flow. More...
struct	Eth_FifoHandleType
	Eth Fifo configuration type Configuration related to Fifo. More...
struct	Eth_Udma_CfgType
	Eth Udma configuration type Configuration related to Udma. More...
struct	Eth_VirtualMacConfigType
	Eth driver virtual mac configuration data Configuration related to virtual MAC configuration. More...
struct	Eth_HwTimerConfigType
	Eth driver hardware timer configuration data Configuration related to hardware timer. More...
struct	Eth_ControlerConfigType
	Eth controller configuration type Configuration related to Eth controller configuration. More...
struct	Eth_ConfigType
	Eth configuration type Configuration data of all controller. More...

Macros
#define	ETH_VERSION_INFO_API   (STD_ON)
	Enable/disable SPI get version info API. More...
#define	ETH_GLOBALTIMESUPPORT_API   (STD_ON)
	Enable/disable Eth time sync related API. More...
#define	ETH_DEV_ERROR_DETECT   (STD_ON)
	Enable/disable Development Error Detection. More...
#define	ETH_GET_COUNTER_VALUES_API   (STD_ON)
	Enable/disable Eth get counter values API. More...
#define	ETH_GET_RX_STATS_API   (STD_ON)
	Enable/disable Eth get RX stats count API. More...
#define	ETH_GET_TX_STATS_API   (STD_ON)
	Enable/disable Eth get TX stats count API. More...
#define	ETH_GET_TX_ERROR_COUNTERSVALUES_API   (STD_ON)
	Enable/disable Eth get TX error stats count API. More...
#define	ETH_ZERO_COPY_API   (STD_OFF)
	Enable/disable Eth Zero-Copy support related APIs. More...
#define	ETH_HEADER_ACCESS_API   (STD_OFF)
	Enable/disable Eth Tx/Rx Header Access related APIs. More...
#define	ETH_TRAFFIC_SHAPING_API   (STD_OFF)
	Enable/disable Eth Traffic Shaping related APIs. More...
#define	ETH_GET_COUNTER_STATE_API   (STD_OFF)
	Enable/disable Eth get Counter state API. More...
#define	ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_ICMP   (STD_OFF)
	Enable/disable Hardware Offloading for ICMP checksums. More...
#define	ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_IPV4   (STD_OFF)
	Enable/disable Hardware offloading for IPv4 Header checksums. More...
#define	ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_TCP   (STD_OFF)
	Enable/disable Hardware offloading for TCP checksums. More...
#define	ETH_CTRL_ENABLE_OFFLOAD_CHECKSUM_UDP   (STD_OFF)
	Enable/disable Hardware offloading for UDP checksums. More...
#define	ETH_REGISTER_READBACK_API   (STD_ON)
	Enable/disable optional API Eth_RegisterReadback. More...
#define	ETH_ENABLE_MII_API   (STD_ON)
	Enable/disable Eth MII related API. More...
#define	ETH_UPDATE_PHYS_ADDR_FILTER_API   (STD_ON)
	Enable/disable optional API Eth_UpdatePhysAddrFilter. More...
#define	ETH_VIRTUALMAC_NOTIFYMSGRECEIVED_API   (STD_OFF)
	Enable/disable optional API Eth_NotifyVirtmacMsgReceived. More...
#define	ETH_VIRTUALMAC_SUBSCRIBEALLTRAFFIC_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacSubscribeAllTraffic. More...
#define	ETH_VIRTUALMAC_UNSUBSCRIBEALLTRAFFIC_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacUnsubscribeAllTraffic. More...
#define	ETH_VIRTUALMAC_SUBSCRIBEDSTMAC_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacSubscribeDstMac. More...
#define	ETH_VIRTUALMAC_UNSUBSCRIBEDSTMAC_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacUnsubscribeDstMac. More...
#define	ETH_VIRTUALMAC_ASSOCIATEIPV4MACADDR_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacAssociateIPv4Macaddr. More...
#define	ETH_VIRTUALMAC_DISASSOCIATEIPV4MACADDR_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacDisassociateIPv4Macaddr. More...
#define	ETH_VIRTUALMAC_ADD_UNICAST_MACADDR_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacAddUnicastAddr. More...
#define	ETH_VIRTUALMAC_ADD_MCAST_MACADDR_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacAddMcastAddr. More...
#define	ETH_VIRTUALMAC_DEL_MACADDR_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacDelAddr. More...
#define	ETH_VIRTUALMAC_ADD_VLAN_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacAddVlan. More...
#define	ETH_VIRTUALMAC_DEL_VLAN_API   (STD_OFF)
	Enable/disable optional API Eth_DispatchVirtmacDelVlan. More...
#define	ETH_ETHIF_CBK_HEADER   "EthIf_Cbk.h"
	EthIf Callback Header File to include inside the Eth driver. More...
#define	ETH_ISR_TYPE   (ETH_ISR_CAT2)
	ISR type. More...
#define	ETH_OS_COUNTER_ID   ((CounterType)OsCounter_0)
	Counter ID for counter used to count wait ticks. More...
#define	ETH_OS_COUNTER_FREQ   (1000000000U)
	Frequency in Hz of the counter specified in ETH_OS_COUNTER_ID. More...
#define	ETH_INVALID_RING_ID   (0xFFFFU)
	Eth Invalid Ring Id value. More...
#define	ETH_INVALID_EVENT_ID   (0xFFFFU)
	Eth Invalid Event Id value. More...
#define	ETH_INVALID_CHAN_ID   (0xFFFFU)
	Eth Invalid channel Id. More...
#define	ETH_INVALID_FLOW_ID   (0xFFFFU)
	Eth Invalid Flow Id. More...
#define	ETH_INVALID_IRQ_ID   (0xFFFFU)
	Eth Invalid IRQ value. More...
#define	ETH_DEM_NO_EVENT   (0xFFFFU)
	Eth invalid DEM event ID. More...
#define	ETH_VIRTUALMAC_SUPPORT   (STD_OFF)
	Enable/disable Virtual MAC support. More...
#define	ETH_VIRTUALMAC_FWINFO_TIMEOUT   (0U)
	Timeout value for Firmware Attach msg received from server. More...
#define	ETH_CTRL_ID_MAX   (1U)
	Eth max controller ID. More...
#define	UDMA_WAIT_TEARDOWN_COUNTER   (10000u)
	Eth DMA max teardown timeout. More...
#define	ETH_RX_MTU_HOST_PORT_LENGTH   (1522U)
	Eth max MTU for host port in bytes This value need to equal max MTU for all ingress fifo buffer size. More...
#define	ETH_START_SEC_CONST_UNSPECIFIED
#define	ETH_STOP_SEC_CONST_UNSPECIFIED
#define	ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED_128
#define	ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED_128
#define	ETH_START_SEC_VAR_NO_INIT_8
#define	ETH_STOP_SEC_VAR_NO_INIT_8
#define	ETH_START_SEC_VAR_NO_INIT_UNSPECIFIED
#define	ETH_STOP_SEC_VAR_NO_INIT_UNSPECIFIED
#define	ETH_START_SEC_CODE
	Ring configure via SciClient function. More...
#define	ETH_STOP_SEC_CODE
#define	EthConf_EthCtrlConfig_EthConfig_0   (0U)
	Eth controller ID Configured controller ID(s) More...
#define	ETH_CTRL_ID_0   (0U)
#define	ETH_PRE_COMPILE_VARIANT   (STD_ON)
	Eth configuration variant. More...
#define	ETH_LINK_TIME_VARIANT   (STD_OFF)
#define	ETH_POST_BUILD_VARIANT   (STD_OFF)
#define	NOP1   asm (" NOP ")
	NOP Macros Macros to insert "NOP" assembly instructions. More...
#define	NOP5   NOP1; NOP1; NOP1; NOP1; NOP1
#define	NOP10   NOP5; NOP5
#define	NOP20   NOP10; NOP10
#define	NOP30   NOP20; NOP10
#define	NOP40   NOP30; NOP10
#define	NOP50   NOP40; NOP10
#define	NOP100   NOP50; NOP50
#define	NOP200   NOP100; NOP100
#define	NOP300   NOP200; NOP100
#define	NOP400   NOP300; NOP100
#define	NOP500   NOP400; NOP100
#define	ETH_DMA_IR_SUPPORT   (STD_ON)
	Eth DMA feature flag support. More...
#define	ETH_DMA_CQ_RING_SUPPORT   (STD_ON)
#define	ETH_DMA_TEARDOWN_SUPPORT   (STD_ON)
#define	ETH_DMA_PROXY_SUPPORT   (STD_ON)
#define	ETH_DMA_RX_CH_SPERATE   (STD_OFF)
#define	UDMA_DEVICE_ID_RING   (235U)
	Eth DMA devices ID. More...
#define	UDMA_DEVICE_ID_UDMA   (236U)
#define	UDMA_DEVICE_ID_PSIL   (232U)
#define	UDMA_DEVICE_ID_IA   (233U)
#define	UDMA_DEVICE_ID_IR   (237U)
#define	UDMA_DEVICE_ID_CORE   (250U)
#define	UDMA_DEVICE_ID_PROXY   (234U)
#define	UDMA_TX_CHANNEL_PEER_OFFSET   (0xf000U)
	Eth DMA peer and thread offset. More...
#define	UDMA_RX_CHANNEL_PEER_OFFSET   (0x7000U)
#define	UDMA_SOURCE_THREAD_OFFSET   (0x6000U)
#define	UDMA_DEST_THREAD_OFFSET   (0xe000U)
#define	ETH_DMA_TX_BASE_REG   (0x2aa00000U)
	Eth DMA base register address. More...
#define	ETH_DMA_RX_BASE_REG   (0x2a800000U)
#define	ETH_DMA_RINGRT_BASE   (0x2b800000U)
#define	ETH_DMA_RINGCFG_BASE   (0x28440000U)
#define	ETH_DMA_INTAGGR_INTR_BASE   (0x2a700000U)
#define	ETH_DMA_TXCRT_CHAN_CTL(CHAN)   (0x00000000U + ((CHAN) * 0x1000U))
	Eth DMA macro to calculate register address for DMA register address. More...
#define	ETH_DMA_TXCRT_CHAN_PEER8(CHAN)   (0x00000220U + ((CHAN) * 0x1000U))
#define	ETH_DMA_RXCRT_CHAN_CTL(CHAN)   (0x00000000U + ((CHAN) * 0x1000U))
#define	ETH_DMA_RXCRT_CHAN_PEER8(CHAN)   (0x00000220U + ((CHAN) * 0x1000U))
#define	ETH_DMA_RINGRT_RING_FDB(RING)   (0x00000010U + ((RING) * 0x1000U))
#define	ETH_DMA_RINGRT_RING_FOCC(RING)   (0x00000018U + ((RING) * 0x1000U))
#define	ETH_DMA_RINGRT_RING_RDB(RING)   (0x00000010U + ((RING) * 0x1000U))
#define	ETH_DMA_RINGRT_RING_ROCC(RING)   (0x00000018U + ((RING) * 0x1000U))
#define	ETH_DMA_RINGRT_RING_HWOCC(RING)   (0x00000020U + ((RING) * 0x1000U))
#define	ETH_DMA_RINGCFG_RING_SIZE(RING)   (0x00000048U + ((RING) * 0x100U))
#define	ETH_DMA_INTAGGR_INTR_VINT_ENABLE_SET(VINT)   (ETH_DMA_INTAGGR_INTR_BASE + 0x00000000U + ((VINT) * 0x1000U))
#define	ETH_DMA_INTAGGR_INTR_VINT_ENABLE_CLEAR(VINT)   (ETH_DMA_INTAGGR_INTR_BASE + 0x00000008U + ((VINT) * 0x1000U))
#define	ETH_DMA_INTAGGR_INTR_VINT_STATUS_SET(VINT)   (ETH_DMA_INTAGGR_INTR_BASE + 0x00000010U + ((VINT) * 0x1000U))
#define	ETH_DMA_INTAGGR_INTR_VINT_STATUS_CLEAR(VINT)   (ETH_DMA_INTAGGR_INTR_BASE + 0x00000018U + ((VINT) * 0x1000U))
#define	ETH_DMA_INTAGGR_INTR_VINT_STATUSM(VINT)   (ETH_DMA_INTAGGR_INTR_BASE + 0x00000020U + ((VINT) * 0x1000U))
#define	Eth_GetRingFDBReg(RingNum)   (ETH_DMA_RINGRT_BASE + ETH_DMA_RINGRT_RING_FDB((RingNum)))
#define	Eth_GetRingFOCCReg(RingNum)   (ETH_DMA_RINGRT_BASE + ETH_DMA_RINGRT_RING_FOCC((RingNum)))
#define	Eth_GetRingRDBReg(RingNum)   (ETH_DMA_RINGRT_BASE + ETH_DMA_RINGRT_RING_RDB((RingNum)))
#define	Eth_GetRingROCCReg(RingNum)   (ETH_DMA_RINGRT_BASE + ETH_DMA_RINGRT_RING_ROCC((RingNum)))
#define	Eth_GetRingHWOCCReg(RingNum)   (ETH_DMA_RINGRT_BASE + ETH_DMA_RINGRT_RING_HWOCC((RingNum)))
#define	Eth_GetRingSizeReg(RingNum)   (ETH_DMA_RINGCFG_BASE + ETH_DMA_RINGCFG_RING_SIZE((RingNum)))
#define	Eth_GetTxChannelCtlRegAddress(ChanId)   (ETH_DMA_TX_BASE_REG + ETH_DMA_TXCRT_CHAN_CTL((ChanId)))
#define	Eth_GetTxChannelPeer8RegAddress(ChanId)   (ETH_DMA_TX_BASE_REG + ETH_DMA_TXCRT_CHAN_PEER8((ChanId)))
#define	Eth_GetRxChannelCtlRegAddress(ChanId)   (ETH_DMA_RX_BASE_REG + ETH_DMA_RXCRT_CHAN_CTL((ChanId)))
#define	Eth_GetRxChannelPeer8RegAddress(ChanId)   (ETH_DMA_RX_BASE_REG + ETH_DMA_RXCRT_CHAN_PEER8((ChanId)))
#define	CSL_PROXY0_TARGET0_DATA_BASE   (0x2a500000U)
#define	CSL_PROXY_TARGET0_PROXY_CTL(PROXY)   (CSL_PROXY0_TARGET0_DATA_BASE + 0x00000000U + ((PROXY)*0x1000U))
#define	CSL_PROXY_TARGET0_PROXY_DATA_FIELD(PROXY)   (CSL_PROXY0_TARGET0_DATA_BASE + 0x00000200U + ((PROXY)*0x1000U))
#define	Eth_Cpsw_GetPhyMacRegAddr()   ( 0x40f00200U )
	Eth function like macro to access Eth general configuration. More...
#define	Eth_Cpsw_GetAleRegAddr()   ( 0x4603e000U )
#define	Eth_Cpsw_GetCptsRegAddr()   ( 0x4603d000U )
#define	Eth_Cpsw_GetMdioRegAddr()   ( 0x46000f00U )
#define	Eth_Cpsw_GetCtrlRegAddr()   ( 0x46020000U )
#define	Eth_Cpsw_GetCppiClockFreq()   ( 333333333U )
#define	Eth_Cpsw_GetCptsRefClockFreq()   ( 1U )
#define	Eth_Cpsw_GetMdioBusClockFreq()   ( 2200000U )
#define	Eth_Cpsw_GetMdioOpMode()   ( ETH_MDIO_OPMODE_MANUAL )
#define	Eth_Cpsw_GetMdioEnableInterrupt()   ( TRUE )
#define	Eth_GetDem_E_HARDWARE_ERROR(CtrlIndex)   ( ETH_DEM_NO_EVENT )
	ETH DEM Error codes to report. More...
#define	Eth_GetDem_E_LATECOLLISION(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_MULTIPLECOLLISION(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_SINGLECOLLISION(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_ALIGNMENT(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_OVERSIZEFRAME(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_UNDERSIZEFRAME(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_CRC(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_RX_FRAMES_LOST(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_ACCESS(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_GetDem_E_TX_INTERNAL(CtrlIndex)   ( ETH_DEM_NO_EVENT )
#define	Eth_IsVirtualMacModeEnable(CtrlIndex)   ( FALSE )
	Eth function like macro to access controler configuration. More...
#define	Eth_GetTxChannelThreadOffset(CtrlIndex)   ( 0xf000U )
#define	Eth_VirtMacGetEthFwRpcComChannelId(CtrlIndex)   ( 0xFFFFU )
#define	Eth_VirtMacGetEthPollRecvMsgInEthMain(CtrlIndex)   ( FALSE )
#define	Eth_VirtMacGetRpcCmdCompleteFuncPtr(CtrlIndex)   ( (Eth_RpcCmdComplete)NULL_PTR )
#define	Eth_VirtMacGetFwRegisterFuncPtr(CtrlIndex)   ( (Eth_RpcFwRegistered)NULL_PTR )
#define	Eth_VirtMacGetRemoteVirtPort(CtrlIndex)   ( ETHREMOTECFG_SWITCH_PORT_1 )
#define	Eth_VirtMacGetDmaTxChannelPairAll(CtrlIdx)   ( (EthVirtMacDmaTxChannelPair)NULL_PTR )
#define	Eth_VirtMacGetDmaTxChannelUnpairAll(CtrlIdx)   ( (EthVirtMacDmaTxChannelUnpair)NULL_PTR )
#define	Eth_VirtMacGetDmaFlowCfgAll(CtrlIdx)   ( (EthVirtMacDmaFLowCfg)NULL_PTR )
#define	Eth_VirtMacGetDmaFlowResetAll(CtrlIdx)   ( (EthVirtMacDmaFLowReset)NULL_PTR )
#define	Eth_GetTxEnableInterrupt(CtrlIndex)   ( TRUE )
#define	Eth_GetRxEnableInterrupt(CtrlIndex)   ( TRUE )
#define	Eth_GetEnetType(CtrlIndex)   ( ETH_ENETTYPE_CPSW2G )
#define	Eth_GetMacPortNum(CtrlIndex)   ( ETH_PORT_MAC_PORT_1 )
#define	Eth_GetMacAddressHigh(CtrlIndex)   ( 0xaabbccddU )
#define	Eth_GetMacAddressLow(CtrlIndex)   ( 0xeeffU )
#define	Eth_UseDefaultMacAddress(CtrlIndex)   ( TRUE )
#define	Eth_GetMiiConnectionType(CtrlIndex)   ( ETH_MAC_CONN_TYPE_RGMII_DETECT_INBAND )
#define	Eth_GetLoopBackMode(CtrlIndex)   ( FALSE )
#define	Eth_GetHardwareLoopTimeout(CtrlIndex)   ( 32000U )
#define	Eth_IsPacketMemCacheable(CtrlIndex)   ( TRUE )
#define	Eth_IsRingMemCacheable(CtrlIndex)   ( TRUE )
#define	Eth_IsDescMemCacheable(CtrlIndex)   ( TRUE )
#define	Eth_GetRxMtuLength(CtrlIndex)   ( 1522U )
#define	Eth_GetTxChanStartNum(CtrlIndex)   ( 30U )
#define	Eth_GetRxChanStartNum(CtrlIndex)   ( 30U )
#define	Eth_GetEgressFifoTotalNum(CtrlIndex)   ( 1U )
#define	Eth_GetIngressFifoTotalNum(CtrlIndex)   ( 1U )
#define	Eth_GetRingTotalNum(CtrlIndex)   ( 6U )
#define	Eth_GetTxChanTotalNum(CtrlIndex)   ( 1U )
#define	Eth_GetRxChanTotalNum(CtrlIndex)   ( 1U )
#define	Eth_GetFlowTotalNumber(CtrlIndex)   ( 1U )
#define	Eth_GetEventTotalNum(CtrlIndex)   ( 2U )
#define	Eth_GetRingEventTotalNum(CtrlIndex)   ( 2U )
#define	Eth_GetTxDmaThresholdNum(CtrlIndex)   ( 1U )
#define	Eth_GetRxDmaThresholdNum(CtrlIndex)   ( 1U )
#define	Eth_GetEgressFifoPacketNum(CtrlIndex, FifoIdx)   ( 16U )
#define	Eth_GetEgressFifoPacketSize(CtrlIndex, FifoIdx)   ( 1522U )
#define	Eth_GetIngressFifoPacketNum(CtrlIndex, FifoIdx)   ( 16U )
#define	Eth_GetIngressFifoPacketSize(CtrlIndex, FifoIdx)   ( 1522U )
#define	Eth_GetEgressFifoPriorityAsignment(CtrlIndex, Prio)   ( 0U )
#define	Eth_GetIngressFifoPriorirtyAsignment(CtrlIndex, Prio)   ( 0U )
#define	Eth_GetEgressFifoDescAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Egress_Descriptor_0[(DescIdx)] )
#define	Eth_GetEgressFifoDescUserInfoAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Egress_Descriptor_0[(DescIdx)].bufferInfo )
#define	Eth_GetEgressFifoBufferDataAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Egress_BufferMem_0[(DescIdx) * 1536U] )
#define	Eth_GetEgressFifoQueueAddress(CtrlIndex, FifoIdx)   ( Eth_Ctrl_0_Egress_Queue_0 )
#define	Eth_GetEgressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx)   ( Eth_Ctrl_0_Egress_BufferState_0[BufferIdx] )
#define	Eth_SetEgressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx, Val)   ( Eth_Ctrl_0_Egress_BufferState_0[BufferIdx] = Val )
#define	Eth_GetIngressFifoDescAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Ingress_Descriptor_0[(DescIdx)] )
#define	Eth_GetIngressFifoDescUserInfoAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Ingress_Descriptor_0[(DescIdx)].bufferInfo )
#define	Eth_GetIngressFifoBufferDataAddress(CtrlIndex, FifoIdx, DescIdx)   (&Eth_Ctrl_0_Ingress_BufferMem_0[(DescIdx) * 1536U] )
#define	Eth_GetIngressFifoQueueAddress(CtrlIndex, FifoIdx)   ( Eth_Ctrl_0_Ingress_Queue_0 )
#define	Eth_GetIngressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx)   ( Eth_Ctrl_0_Ingress_BufferState_0[(BufferIdx)] )
#define	Eth_SetIngressFifoBufferState(CtrlIndex, FifoIdx, BufferIdx, Val)   ( Eth_Ctrl_0_Ingress_BufferState_0[(BufferIdx)] = Val )
#define	Eth_GetEgressFifoCqIdx(CtrlIndex, FifoIdx)   ( 0U )
#define	Eth_GetEgressFifoFqIdx(CtrlIndex, FifoIdx)   ( 2U )
#define	Eth_GetIngressFifoCqIdx(CtrlIndex, FifoIdx)   ( 1U )
#define	Eth_GetIngressFifoFqIdx(CtrlIndex, FifoIdx)   ( 3U )
#define	Eth_GetTxChanId(CtrlIndex, ChIdx)   ( 30U )
#define	Eth_GetTxChanTdCqRingIdx(CtrlIndex, ChIdx)   ( 4U )
#define	Eth_GetTxChanDepth(CtrlIndex, ChIdx)   ( 128U )
#define	Eth_GetRxChanId(CtrlIndex, ChIdx)   ( 30U )
#define	Eth_GetRxChanTdCqRingIdx(CtrlIndex, ChIdx)   ( 5U )
#define	Eth_GetRxChanFlowTotalNum(CtrlIndex, ChIdx)   ( 1U )
#define	Eth_GetRxChanFlowStartNum(CtrlIndex, ChIdx)   ( 60U )
#define	Eth_GetFlowId(CtrlIndex, FlowIdx)   ( 60U )
#define	Eth_GetFlowCqRingIdx(CtrlIndex, FlowIdx)   ( 1U )
#define	Eth_GetFlowFqRingIdx(CtrlIndex, FlowIdx)   ( 3U )
#define	Eth_GetDynRingElemAddress(CtrlIndex, RingIdx)   ( &Eth_RingDyn_Ctrl_0[(RingIdx)] )
#define	Eth_GetRingHwId(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].hwId )
#define	Eth_GetRingTotalElemNum(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].size )
#define	Eth_GetRingPriority(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].priority )
#define	Eth_GetRingMemBaseAddress(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].memPtr )
#define	Eth_GetRingEventRingIdx(CtrlIndex, RingEvtIdx)   ( Eth_RingEventCfg_Ctrl_0[(RingEvtIdx)].ringIdx )
#define	Eth_GetRingEventGlobalEventNum(CtrlIndex, RingEvtIdx)   ( Eth_RingEventCfg_Ctrl_0[(RingEvtIdx)].globalEvent )
#define	Eth_GetRingEventVirtBitNum(CtrlIndex, RingEvtIdx)   ( Eth_RingEventCfg_Ctrl_0[(RingEvtIdx)].virtBitNum )
#define	Eth_GetRingEventEventIdx(CtrlIndex, RingEvtIdx)   ( Eth_RingEventCfg_Ctrl_0[(RingEvtIdx)].eventIdx )
#define	Eth_GetRingEventSrcOffsetNum(CtrlIndex, RingEvtIdx)   ( Eth_RingEventCfg_Ctrl_0[(RingEvtIdx)].srcOffset )
#define	Eth_GetEventCoreIntrNum(CtrlIndex, EvtIdx)   ( Eth_EventCfg_Ctrl_0[(EvtIdx)].coreIntrNum )
#define	Eth_GetEventVirtIntrNum(CtrlIndex, EvtIdx)   ( Eth_EventCfg_Ctrl_0[(EvtIdx)].virtIntrNum )
#define	Eth_GetEventIrIntrNum(CtrlIndex, EvtIdx)   ( Eth_EventCfg_Ctrl_0[(EvtIdx)].IrIntrNum )
#define	Eth_GetTxEventCoreIntrNum(CtrlIndex)   ( 80U )
#define	Eth_GetRxEventCoreIntrNum(CtrlIndex)   ( 81U )
#define	Eth_GetHwTimerTotalNum(CtrlIndex)   ( 0U )
#define	Eth_GetHwTimerId(CtrlIndex, Index)   ( 0xFFU )
#define	Eth_GetHwTimerCounter(CtrlIndex, Index)   ( 0xFFU )
#define	Eth_GetHwTimerBaseAddr(CtrlIndex, Index)   ( 0xFFFFFFFFU )
#define	Eth_GetHwTimerDynRunningState(CtrlIndex, Index)   ( FALSE )
#define	Eth_SetHwTimerDynRunningState(CtrlIndex, Index, Val)   ( (void)(CtrlIndex) )
#define	Eth_GetRxIrqPacingEnable(CtrlIndex)   ( FALSE )
#define	Eth_GetTxIrqPacingEnable(CtrlIndex)   ( FALSE )
#define	Eth_GetRxHwTimerIdx(CtrlIndex)   ( 255U )
#define	Eth_GetTxHwTimerIdx(CtrlIndex)   ( 255U )
#define	Eth_GetIrqPacingEnable(CtrlIndex)   ( (Eth_GetTxIrqPacingEnable(CtrlIndex) == TRUE) || (Eth_GetRxIrqPacingEnable(CtrlIndex) == TRUE) )
#define	Eth_GetProxyTotalNum(CtrlIndex)   ( 1U )
#define	Eth_GetProxyThreadNum(CtrlIndex, ProxyIdx)   ( 9U )
#define	Eth_GetProxyTargetRingNum(CtrlIndex, ProxyIdx)   ( 0U )
#define	Eth_GetRingProxyIdx(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].proxyIdx )
#define	Eth_GetRingMode(CtrlIndex, RingIdx)   ( Eth_Udma_RingCfg_0[(RingIdx)].ringMode )
#define	Eth_GetDmaRingCfg(CtrlIdx)   ( (Eth_DmaRingCfg)&AppUtils_EthRingCfg )
#define	Eth_GetMdioWriteLowBaseNsec()
	DelayNs (default value) in NOOP function/function like macro. More...
#define	Eth_GetMdioWriteHighBaseNsec()
#define	Eth_GetMdioReadLowBaseNsec()
#define	Eth_GetMdioReadHighBaseNsec()
#define	Eth_GetMdioWriteLowDelayNsec(CtrlIdx)
	DelayNs (generate by user input) in NOOP function/function like macro. More...
#define	Eth_GetMdioWriteHighDelayNsec(CtrlIdx)
#define	Eth_GetMdioReadLowDelayNsec(CtrlIdx)
#define	Eth_GetMdioReadHighDelayNsec(CtrlIdx)

Typedefs
typedef void(*	Eth_RpcCmdComplete) (uint8 CtrlIdx, uint8 sid, sint32 status)
	Application callback to indicate Rpc dispatch command completion. More...
typedef void(*	Eth_RpcFwRegistered) (uint8 CtrlIdx)
	Application callback to indicate Ethernet firmware registered with the Eth RPC client. More...
typedef Std_ReturnType(*	Eth_DmaRingCfg) (uint8 ctrlIdx, uint8 ringIdx)
	Mdio delay in nsec function pointer. More...
typedef void(*	Eth_MdioDelayNsecFunc) (void)
	Pair PSIL TX channel function pointer. More...
typedef Std_ReturnType(*	EthVirtMacDmaTxChannelPair) (uint8 ctrlIdx)
	Unpair PSIL TX channel function pointer. More...
typedef Std_ReturnType(*	EthVirtMacDmaTxChannelUnPair) (uint8 ctrlIdx)
	Flow config function pointer. More...
typedef Std_ReturnType(*	EthVirtMacDmaFLowCfg) (uint8 ctrlIdx)
	Flow reset function pointer. More...
typedef Std_ReturnType(*	EthVirtMacDmaFLowReset) (uint8 ctrlIdx)

Enumerations
enum	Eth_PortType {   ETH_PORT_HOST_PORT = 0x00U, ETH_MAC_PORT_FIRST = 0x01U, ETH_PORT_MAC_PORT_1 = 0x01U, ETH_PORT_MAC_PORT_2 = 0x02U,   ETH_PORT_MAC_PORT_3 = 0x03U, ETH_PORT_MAC_PORT_4 = 0x04U, ETH_PORT_MAC_PORT_5 = 0x05U, ETH_PORT_MAC_PORT_6 = 0x06U,   ETH_PORT_MAC_PORT_7 = 0x07U, ETH_PORT_MAC_PORT_8 = 0x08U, ETH_PORT_MAC_PORT_LAST = ETH_PORT_MAC_PORT_8 }
	Port identifier. More...
enum	EthRemoteCfg_VirtPort {   ETHREMOTECFG_SWITCH_PORT_0, ETHREMOTECFG_SWITCH_PORT_1, ETHREMOTECFG_SWITCH_PORT_2, ETHREMOTECFG_SWITCH_PORT_3,   ETHREMOTECFG_SWITCH_PORT_LAST = ETHREMOTECFG_SWITCH_PORT_3, ETHREMOTECFG_MAC_PORT_1, ETHREMOTECFG_MAC_PORT_2, ETHREMOTECFG_MAC_PORT_3,   ETHREMOTECFG_MAC_PORT_4, ETHREMOTECFG_MAC_PORT_5, ETHREMOTECFG_MAC_PORT_6, ETHREMOTECFG_MAC_PORT_7,   ETHREMOTECFG_MAC_PORT_8, ETHREMOTECFG_MAC_PORT_LAST = ETHREMOTECFG_MAC_PORT_8 }
	Virtual port id. More...
enum	Eth_MacConnectionType {   ETH_MAC_CONN_TYPE_RMII_10 = 0x01U, ETH_MAC_CONN_TYPE_RMII_100 = 0x02U, ETH_MAC_CONN_TYPE_RGMII_FORCE_100_HALF = 0x03U, ETH_MAC_CONN_TYPE_RGMII_FORCE_100_FULL = 0x04U,   ETH_MAC_CONN_TYPE_RGMII_FORCE_1000_FULL = 0x05U, ETH_MAC_CONN_TYPE_RGMII_DETECT_INBAND = 0x06U }
	Type/Speed/Duplex connection type. More...
enum	Eth_EnetType {   ETH_ENETTYPE_CPSW2G = 0x00U, ETH_ENETTYPE_CPSW9G = 0x01U, ETH_ENETTYPE_CPSW5G = 0x02U, ETH_ENETTYPE_CPSW3G = 0x03U,   ETH_ENETTYPE_CPSWLAST }
	Enet Cpsw Type identifier. More...
enum	Eth_MdioOperModeType { ETH_MDIO_OPMODE_NORMAL = 0x00U, ETH_MDIO_OPMODE_MANUAL = 0x01U }
	MDIO operating mode. More...

Functions
	VAR (uint8, ETH_VAR_NO_INIT_128) Eth_Ctrl_0_Egress_BufferMem_0[24576U]
	VAR (Eth_DescType, ETH_VAR_NO_INIT_128) Eth_Ctrl_0_Egress_Descriptor_0[16U]
	VAR (uint8, ETH_VAR_NO_INIT) Eth_Ctrl_0_Egress_BufferState_0[16U]
	VAR (Eth_QueueType, ETH_VAR_NO_INIT) Eth_Ctrl_0_Egress_Queue_0[1U]
	VAR (Eth_Udma_RingDynType, ETH_VAR_NO_INIT) Eth_RingDyn_Ctrl_0[6U]
Std_ReturnType	AppUtils_EthRingCfg (uint8 ctrlIdx, uint8 Id)

Variables
const Eth_Udma_RingCfgType	Eth_Udma_RingCfg_0 [6U]
const Eth_Udma_EventCfgType	Eth_EventCfg_Ctrl_0 [2U]
const Eth_Udma_RingEventCfgType	Eth_RingEventCfg_Ctrl_0 [2U]