4.19. PORT Module

4.19.1. Acronyms and Definitions

Abbreviation/Term

Explanation

AUTOSAR

Automotive Open System Architecture

RTE

Runtime Environment

BSW

Basic Software

GPIO

General Purpose Input Output

ADC

Analogue Digital Converter

MCU

Micro Controller Unit

OS

Operating System

API

Application Programming Interface

HW

Hardware

SW

Software

4.19.2. Introduction

This document describes MCAL PORT Driver functionality, its application interfaces and configuration details as per AUTOSAR version 4.3.1

Supported AUTOSAR Release

4.3.1

Supported Configuration Variants

Pre-Compile, Post-build

Vendor ID

PORT_VENDOR_ID (44)

Module ID

PORT_MODULE_ID (124)

Supported Platform

AM263x

4.19.3. Functional Overview

The Port driver module is an I/O driver in AUTOSAR Basic Software (BSW) layer. PORT driver provide the services for initializing the whole PORT structure of the microcontroller. It is used to assign various functionalities to Port and port pins (e.g. GPIOs, ADC, SPI and other peripheral modes)

4.19.3.1. PORT Driver Architecture

The following figure shows where the PORT is located in the AUTOSAR architecture

PORT in AUTOSAR architecture

Fig. 4.83 PORT in AUTOSAR architecture

4.19.3.2. Initialization

Port_Init API initializes the PORT driver and does pin configuration of specified PORT PIN Id’s. Port_Init also enables all pins for specified module selected in the config structure passed to Port_Init.

4.19.3.3. States

No state is maintained in the PORT driver.

4.19.3.4. Assumptions

None

4.19.3.5. Limitations

The Pins which are configured as GPIO, the parameter “PortInputOverrideCtrl” and “PortOutputOverrideCtrl” should be as disabled.

Configuration settings

Fig. 4.84 Configuration settings

4.19.3.6. Design overview

Please refer SITARA MCU MCAL Architecture Document and AM26x MCAL: PORT Detailed Design Document provided as part of CSP.

4.19.4. Hardware Features

4.19.4.1. IP Supported Features

  • Configuring the pins for rising and/or falling edge, specified for each GPIO pin.

  • Configuring the GPIO signal conditioning chain

    1. Invert/Non-invert

    2. Signal Qualification:

    • Asynchronous input

    • Synchronize to SYSCLK

    • Qualification using sampling window

  • Enabling all pins of specified peripheral for given mode of operation. This option provides a way configuring all pins for a peripheral for required mode of operation.

  • GPIO Channel/Bank Interrupt notification is supported for Rising, Falling and Both edge interrupts.

4.19.4.2. AUTOSAR Supported Features

  • The PORT Driver module shall initialize the whole port structure of the microcontroller.

  • The PORT Driver module shall allow the configuration of different functionality for each port and port pin. e.g. ADC, SPI, DIO etc.

  • The PORT Driver module shall provide additional configurations for the MCU port/port pins:

    1. Pin direction (input/output)

    2. Pin level initial value

    3. Pin direction changeable during runtime (yes/no)

    4. Port mode changeable during runtime

  • The PORT Driver module shall provide a number of optional configurations for the MCU ports and port pins (if supported by hardware):

    1. Slew rate control

    2. Activation of internal pull-ups

    3. Type of Readback support (pin level,output register value)

4.19.4.3. Not Supported Features

None

4.19.5. Source files

Description of static files is provided below:

📦AM263x
┣ 📂build
┣ 📂mcal
┃ ┣ 📂Port
┃ ┃ ┣ 📂include
┃ ┃ ┃ ┗ 📜Port.h : Contains the API’s of the PORT driver to be used by upper layers
┃ ┃ ┣ 📂src
┃ ┃ ┃ ┗ 📜Port.c : Contains the implementation of the API’s for PORT driver
┃ ┃ ┣ 📂V0
┃ ┃ ┃ ┣ 📜Port_Irq.h : Contains ISR function declaration
┃ ┃ ┃ ┣ 📜Port_Irq.c : Contains ISR function definitions
┃ ┃ ┃ ┣ 📜Port_Priv.c : Contains Internal functions definition of PORT driver
┃ ┃ ┃ ┗ 📜Port_Priv.h : Contains Internal functions declaration of PORT driver
┃ ┃ ┗ 📜Makefile
┣ 📂mcal_config
┣ 📂mcal_docs
┗ 📜README.txt

Description of generated files is provided below:

Plugin Files

Descriptions

Port_Cfg.h

Contains the Precompile switches, Symbolic names of PortPin

Port_PBcfg.c

Contains all pins Post-Build Configured parameters

Port_Cfg.c

Contains all pins Pre-Compile Configured parameters

PORT header file include structure

Fig. 4.85 PORT header file include structure

4.19.6. Module requirements

Please refer Software Product Specification document provided as part of CSP.

4.19.6.1. Memory Mapping

Memory Mapping Sections

PORT_CODE

PORT_VAR_ZERO_INIT

PORT_PBCFG

PORT_START_SEC_VAR_INIT_UNSPECIFIED (.data)

x

PORT_STOP_SEC_VAR_INIT_UNSPECIFIED

x

PORT_START_SEC_CODE (.bss)

x

PORT_STOP_SEC_CODE

x

PORT_START_SEC_CONFIG_DATA (.data)

x

PORT_STOP_SEC_CONFIG_DATA

x

PORT_START_SEC_ISR_CODE (.bss)

x

PORT_STOP_SEC_ISR_CODE

x

4.19.6.2. Scheduling

There is no scheduling functions in PORT.

4.19.6.3. Error handling

4.19.6.3.1. Development Error Reporting

The module PORT depends on the DET (by default) in order to report development errors. Detection and reporting of development errors can be enabled or disabled by the switch PORT_DEV_ERROR_DETECT = STD_ON in the Port_Cfg.h

AUTOSAR requires that API functions shall check the validity of their respective parameters. These checks are for development error reporting and can be enabled or disabled.

4.19.6.4. Error Code

4.19.6.4.1. Development Errors

The errors reported to DET module are described in the following table:

Type of Error

Related Error code

Value (Hex)

Invalid Port Pin ID requested.

PORT_E_PARAM_PIN

0x0A

Port Pin not configured as changeable.

PORT_E_DIRECTION_UNCHANGEABLE

0x0B

API Port_Init service called with wrong parameter.

PORT_E_INIT_FAILED

0x0C

API Port_SetPinMode service called when mode is unchangeable.Invalid Mode Passed

PORT_E_PARAM_INVALID_MODE

0x0D

API Port_SetPinMode service called when mode is unchangeable

PORT_E_MODE_UNCHANGEABLE

0x0E

API service called without module initialization.

PORT_E_UNINIT

0x0F

API called with a Null Pointer.

PORT_E_PARAM_POINTER

0x10

4.19.6.4.2. DEM Errors

The extended production errors reported to DEM module are described in the following table:

Error Code

Description

Assigned by DEM

PORT_E_HARDWARE_ERROR

This error is raised when register write failure occurs.(Hardware Failure)

4.19.7. Used resources

4.19.7.1. Interrupt Handling

4.19.7.1.1. GPIO Interrupts

Individual channel Interrupt can be configured with particular channel and it’s being used to detect the rising/falling/both edge occurred on configured channel.

../_images/port_image6.jpg

Bank channel Interrupt are the interrupt that can be configured with particular bank and it’s being used to detect the rising/falling/both edge occurred on all channels in configured bank.

../_images/port_image7.jpg

Below are the four GPIO XBAR interrupts available.

GPIO Interrupt

GPIO XBAROUT14 INTR

GPIO XBAROUT15 INTR

GPIO XBAROUT16 INTR

GPIO XBAROUT17 INTR

The above mentioned 4 GPIO XBAR interrupts should be mapped to Software ISR’s mentioned below:

For Individual Channel Interrupt: Port_Ch<n>Isr , here <n> is between 0 to 138.

For Bank Interrupt: Port_Bnk<m>Isr , here <m> is between 0 to 8.

These all four GPIO cross bar interrupt source can be configured either Individual channel Interrupt or Bank interrupt.

Each GPIO pin is interrupt capable and can be configured in PortDioConfig container in PORT Plugins as shown below.

../_images/port_image5.jpg

The PORT module depends on MCU module for the configuration of Channel/Bank Interrupt. All above 4 GPIO interrupts should be configured by MCU driver before usage. McuGpioXbarIntrConfiguration container from MCU plugins can be used to do to the same.

../_images/port_image4.jpg

GPIO interrupt API’s:

APIs

Description

Port_PinEnableIntrNotification

This function is Non- Autosar based and is used to enable bank/channel GPIO Interrupts for particular channel

Port_PinDisableIntrNotification

This function is Non- Autosar based and is used to disable bank/channel GPIO Interrupts for particular channel

Port_GetInterruptStatus

This function is Non- Autosar based and is used to collect interrupt register value for each GPIO bank

Port_ClearInterruptStatus

This function is Non- Autosar based and is used to clear interrupt register for each GPIO bank

Note

Mcu Plugins should be added with Port Plugins while Port configuration files generation.

Each used channel in PortDioConfig container should be configured as a GPIO with INPUT direction.

Please refer PORT Example Application to know more about GPIO Interrupt feature configuration and its usage.

4.19.7.1.2. Hardware - Software - ISR API name mapping

For interrupt notification, ISR is provided in PORT driver. The following interrupt is generated by PORT module. The supported ISR is a part of the Port_Irq.h file.

Following are PORT module ISR’s:

For Individual Channel Interrupt: Port_Ch<\n>Isr , here <n> is between 0 to 138.

For Bank Interrupt: Port_Bnk<m>Isr , here <m> is between 0 to 8.

4.19.7.2. Hardware-Software Mapping

4.19.7.2.1. GPIO Channels Mapping

AM263x have total 139 GPIO pins available​ which allocated from Bank A(Bank 0) to Bank I(Bank 8). Each Bank contains 16 channels except Bank I​(Bank 8).

Bank I​ contains the 11 channels.

GPIO Banks

GPIO Channels

BankA / Bank0

Channel 0 to channel 15

BankB / Bank1

Channel 16 to channel 31

BankC / Bank2

Channel 32 to channel 47

BankD / Bank3

Channel 48 to channel 63

BankE / Bank4

Channel 64 to channel 79

BankF / Bank5

Channel 80 to channel 95

BankG / Bank6

Channel 96 to channel 111

BankH / Bank7

Channel 112 to channel 127

BankI / Bank8

Channel 128 to channel 138

4.19.8. Integration description

4.19.8.1. Dependent modules

4.19.8.1.1. DET

This implementation depends on the DET in order to report development errors. The detection of development errors is configurable (ON / OFF). The switch PORT_DEV_ERROR_DETECT will activate or deactivate the detection of all development errors.

4.19.8.1.2. DEM

Note

Dem Event is enable only if $(Module_Name)DemEventParameterRefs is enabled.

4.19.8.1.3. SchM

If multiple AUTOSAR runnables have access to the same Data Store Memory block, the exported AUTOSAR specification enforces data consistency by using an AUTOSAR exclusive area. With this specification, the runnables have mutually exclusive access to the per-instance memory global data, which prevents data corruption. Beside the OS, the BSW Scheduler provides functions that PORT module calls at begin and end of critical sections. This implementation requires 1 level of exclusive access to guard critical sections.

The data consistency mechanism that has to be applied to an ExclusiveArea might be domain, ECU or even project specific. The decision which mechanism has to be applied by RTE / Basic Software Scheduler is taken during ECU integration by setting the Exclusive Area configuration parameter RteExclusiveAreaImplMechanism. This parameter is an input for RTE generator.

For PORT Module, data consistency and exclusive access to critical sections are required for the following sections as shown in the table below:

Exclusive Area Functions used

PORT Function calling Exclusive Area

Need for Exclusive Area

Recommended Exclusive Area Mapping

PORT_EXCLUSIVE_AREA_0

Port_SetPinDirection
Port_SetPinMode

To protect against multiple access for shared resources

ALL_INTERRUPT_BLOCKING : All interrupts should be blocked as this API’s can be called in the interrupts

4.19.8.1.4. Callback Notification

Notifications:

As it is a configurable interface, the PORT defines notifications that can be mapped to callback functions provided by other modules. The mapping is not statically defined by the PORT but can be performed at configuration time. The function prototypes that can be used for the configuration have to match the appropriate function prototype signatures, described below:

PortDioInterruptNotification:

This is of type Port_IsrNotificationType which is defined in Port_Cfg.h file. This is called to notify the group about the completion of the requested conversion and availability of the conversion results.

4.19.8.2. Multi-core support

Not Supported

4.19.9. Configuration

4.19.9.1. PortConfigSet

This container contains the multiple configuration set and sub containers of the AUTOSAR Port module

4.19.9.1.1. PortContainer

Container collecting the PortPins.

4.19.9.1.1.1. PortNumberOfPortPins

Item

Name

PortNumberOfPortPins

Description

The number of specified PortPins in this PortContainer.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

147

Max-value

65535

Min-value

1

4.19.9.1.2. PortPin

Configuration of the individual port pins.

4.19.9.1.2.1. PortPinPeripheral

Item

Name

PortPinPeripheral

Description

Select peripheral of interest to narron down list of pins of interest

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Range

CPTS0
EPWM0
EPWM1
EPWM2
EPWM3
EPWM4
EPWM5
EPWM6
EPWM7
EPWM8
EPWM9
EPWM10
EPWM11
EPWM12
EPWM13
EPWM14
EPWM15
EPWM16
EPWM17
EPWM18
EPWM19
EPWM20
EPWM21
EPWM22
EPWM23
EPWM24
EPWM25
EPWM26
EPWM27
EPWM28
EPWM29
EPWM30
EPWM31
EQEP0
EQEP1
EQEP2
FSIRX0
FSIRX1
FSIRX2
FSIRX3
FSITX0
FSITX1
FSITX2
FSITX3
GPMC0
I2C0
I2C1
I2C2
I2C3
MDIO0
ECAP0
PR0_MDIO0
PRU0_GIO
PRU1_GIO
PR0_IEP0
PR0_UART0
UART0
UART1
UART2
UART3
UART4
UART5
JTAG
LIN0
LIN1
LIN2
LIN3
LIN4
MCAN0
MCAN1
MCAN2
MCAN3
MII
MMC0
XBAROUT
QSPI0
RMII1
RMII2
RGMII1
RGMII2
SDFM0
SDFM1
SPI0
SPI1
SPI2
SPI3
SPI4
CLKOUT
EXT_REFCLK
GPIOAB
GPIOCD
GPIOEF
GPIOGH
GPIOI
TRC

4.19.9.1.2.2. PortPinPeripheralSignal

Item

Name

PortPinPeripheralSignal

Description

Select specific peripheral signal pin of interest

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Range

CPTS0_TS_SYNC
EPWM0_A
EPWM0_B
EPWM1_A
EPWM1_B
EPWM2_A
EPWM2_B
EPWM3_A
EPWM3_B
EPWM4_A
EPWM4_B
EPWM5_A
EPWM5_B
EPWM6_A
EPWM6_B
EPWM7_A
EPWM7_B
EPWM8_A
EPWM8_B
EPWM9_A
EPWM9_B
EPWM10_A
EPWM10_B
EPWM11_A
EPWM11_B
EPWM12_A
EPWM12_B
EPWM13_A
EPWM13_B
EPWM14_A
EPWM14_B
EPWM15_A
EPWM15_B
EPWM16_A
EPWM16_B
EPWM17_A
EPWM17_B
EPWM18_A
EPWM18_B
EPWM19_A
EPWM19_B
EPWM20_A
EPWM20_B
EPWM21_A
EPWM21_B
EPWM22_A
EPWM22_B
EPWM23_A
EPWM23_B
EPWM24_A
EPWM24_B
EPWM25_A
EPWM25_B
EPWM26_A
EPWM26_B
EPWM27_A
EPWM27_B
EPWM28_A
EPWM28_B
EPWM29_A
EPWM29_B
EPWM30_A
EPWM30_B
EPWM31_A
EPWM31_B
EQEP0_A
EQEP0_B
EQEP0_I
EQEP0_S
EQEP1_A
EQEP1_B
EQEP1_I
EQEP1_S
EQEP2_A
EQEP2_B
EQEP2_I
EQEP2_S
FSIRX0_CLK
FSIRX0_DATA0
FSIRX0_DATA1
FSIRX1_CLK
FSIRX1_DATA0
FSIRX1_DATA1
FSIRX2_CLK
FSIRX2_DATA0
FSIRX2_DATA1
FSIRX3_CLK
FSIRX3_DATA0
FSIRX3_DATA1
FSITX0_CLK
FSITX0_DATA0
FSITX0_DATA1
FSITX1_CLK
FSITX1_DATA0
FSITX1_DATA1
FSITX2_CLK
FSITX2_DATA0
FSITX2_DATA1
FSITX3_CLK
FSITX3_DATA0
FSITX3_DATA1
GPMC0_A0
GPMC0_A1
GPMC0_A10
GPMC0_A11
GPMC0_A12
GPMC0_A13
GPMC0_A14
GPMC0_A15
GPMC0_A16
GPMC0_A17
GPMC0_A18
GPMC0_A19
GPMC0_A2
GPMC0_A20
GPMC0_A21
GPMC0_A3
GPMC0_A4
GPMC0_A5
GPMC0_A6
GPMC0_A7
GPMC0_A8
GPMC0_A9
GPMC0_AD0
GPMC0_AD1
GPMC0_AD10
GPMC0_AD11
GPMC0_AD12
GPMC0_AD13
GPMC0_AD14
GPMC0_AD15
GPMC0_AD2
GPMC0_AD3
GPMC0_AD4
GPMC0_AD5
GPMC0_AD6
GPMC0_AD7
GPMC0_AD8
GPMC0_AD9
GPMC0_ADVn_ALE
GPMC0_BE0n_CLE
GPMC0_BE1n
GPMC0_CLK
GPMC0_CLKLB
GPMC0_CSn0
GPMC0_CSn1
GPMC0_CSn2
GPMC0_CSn3
GPMC0_DIR
GPMC0_OEn_REn
GPMC0_WAIT0
GPMC0_WAIT1
GPMC0_WEn
GPMC0_WPn
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
I2C2_SCL
I2C2_SDA
I2C3_SCL
I2C3_SDA
ECAP0_APWM_OUT
MDIO0_MDC
MDIO0_MDIO
PR0_MDIO0_MDC
PR0_MDIO0_MDIO
PRU0_GIO0
PRU0_GIO1
PRU0_GIO10
PRU0_GIO11
PRU0_GIO12
PRU0_GIO13
PRU0_GIO14
PRU0_GIO15
PRU0_GIO16
PRU0_GIO2
PRU0_GIO3
PRU0_GIO4
PRU0_GIO5
PRU0_GIO6
PRU0_GIO8
PRU0_GIO9
PRU1_GIO0
PRU1_GIO1
PRU1_GIO10
PRU1_GIO11
PRU1_GIO12
PRU1_GIO13
PRU1_GIO14
PRU1_GIO15
PRU1_GIO16
PRU1_GIO17
PRU1_GIO18
PRU1_GIO19
PRU1_GIO2
PRU1_GIO3
PRU1_GIO4
PRU1_GIO5
PRU1_GIO6
PRU1_GIO7
PRU1_GIO8
PRU1_GIO9
PR0_IEP0_EDC_SYNC_OUT0
PR0_IEP0_EDC_SYNC_OUT1
PR0_IEP0_EDIO_DATA_IN_OUT30
PR0_IEP0_EDIO_DATA_IN_OUT31
PR0_UART0_CTSn
PR0_UART0_RTSn
PR0_UART0_RXD
PR0_UART0_TXD
UART0_CTSn
UART0_RTSn
UART0_RXD
UART0_TXD
UART1_CTSn
UART1_DCDn
UART1_DSRn
UART1_DTRn
UART1_RIn
UART1_RTSn
UART1_RXD
UART1_TXD
UART2_CTSn
UART2_RTSn
UART2_RXD
UART2_TXD
UART3_CTSn
UART3_RTSn
UART3_RXD
UART3_TXD
UART4_CTSn
UART4_RTSn
UART4_RXD
UART4_TXD
UART5_CTSn
UART5_RTSn
UART5_RXD
UART5_TXD
TCK
TDI
TDO
TMS
LIN0_RXD
LIN0_TXD
LIN1_RXD
LIN1_TXD
LIN2_RXD
LIN2_TXD
LIN3_RXD
LIN3_TXD
LIN4_RXD
LIN4_TXD
MCAN0_RX
MCAN0_TX
MCAN1_RX
MCAN1_TX
MCAN2_RX
MCAN2_TX
MCAN3_RX
MCAN3_TX
MII1_COL
MII1_CRS
MII1_RX_ER
MII1_RXCLK
MII1_RXD0
MII1_RXD1
MII1_RXD2
MII1_RXD3
MII1_RXDV
MII1_TX_EN
MII1_TXCLK
MII1_TXD0
MII1_TXD1
MII1_TXD2
MII1_TXD3
MII2_COL
MII2_CRS
MII2_RX_ER
MII2_RXCLK
MII2_RXD0
MII2_RXD1
MII2_RXD2
MII2_RXD3
MII2_RXDV
MII2_TX_EN
MII2_TXCLK
MII2_TXD0
MII2_TXD1
MII2_TXD2
MII2_TXD3
MMC0_CD
MMC0_CLK
MMC0_CMD
MMC0_D0
MMC0_D1
MMC0_D2
MMC0_D3
MMC0_WP
XBAROUT0
XBAROUT1
XBAROUT10
XBAROUT11
XBAROUT12
XBAROUT13
XBAROUT14
XBAROUT15
XBAROUT2
XBAROUT3
XBAROUT4
XBAROUT5
XBAROUT6
XBAROUT7
XBAROUT8
XBAROUT9
QSPI0_CLK
QSPI0_CLKLB
QSPI0_CSn0
QSPI0_CSn1
QSPI0_D0
QSPI0_D1
QSPI0_D2
QSPI0_D3
RGMII1_RD0
RGMII1_RD1
RGMII1_RD2
RGMII1_RD3
RGMII1_RX_CTL
RGMII1_RXC
RGMII1_TD0
RGMII1_TD1
RGMII1_TD2
RGMII1_TD3
RGMII1_TX_CTL
RGMII1_TXC
RGMII2_RD0
RGMII2_RD1
RGMII2_RD2
RGMII2_RD3
RGMII2_RX_CTL
RGMII2_RXC
RGMII2_TD0
RGMII2_TD1
RGMII2_TD2
RGMII2_TD3
RGMII2_TX_CTL
RGMII2_TXC
RMII1_CRS_DV
RMII1_REF_CLK
RMII1_RX_ER
RMII1_RXD0
RMII1_RXD1
RMII1_TX_EN
RMII1_TXD0
RMII1_TXD1
RMII2_CRS_DV
RMII2_REF_CLK
RMII2_RX_ER
RMII2_RXD0
RMII2_RXD1
RMII2_TX_EN
RMII2_TXD0
RMII2_TXD1
SDFM0_CLK0
SDFM0_CLK1
SDFM0_CLK2
SDFM0_CLK3
SDFM0_D0
SDFM0_D1
SDFM0_D2
SDFM0_D3
SDFM1_CLK0
SDFM1_CLK1
SDFM1_CLK2
SDFM1_CLK3
SDFM1_D0
SDFM1_D1
SDFM1_D2
SDFM1_D3
SPI0_CLK
SPI0_CS0
SPI0_CS1
SPI0_D0
SPI0_D1
SPI1_CLK
SPI1_CS0
SPI1_D0
SPI1_D1
SPI2_CLK
SPI2_CS0
SPI2_D0
SPI2_D1
SPI3_CLK
SPI3_CS0
SPI3_D0
SPI3_D1
SPI4_CLK
SPI4_CS0
SPI4_CS1
SPI4_D0
SPI4_D1
CLKOUT0
CLKOUT1
EXT_REFCLK0
GPIOAB_0
GPIOAB_1
GPIOAB_10
GPIOAB_11
GPIOAB_12
GPIOAB_13
GPIOAB_14
GPIOAB_15
GPIOAB_16
GPIOAB_17
GPIOAB_18
GPIOAB_19
GPIOAB_2
GPIOAB_20
GPIOAB_21
GPIOAB_22
GPIOAB_23
GPIOAB_24
GPIOAB_25
GPIOAB_26
GPIOAB_27
GPIOAB_28
GPIOAB_29
GPIOAB_3
GPIOAB_30
GPIOAB_31
GPIOAB_4
GPIOAB_5
GPIOAB_6
GPIOAB_7
GPIOAB_8
GPIOAB_9
GPIOCD_32
GPIOCD_33
GPIOCD_34
GPIOCD_35
GPIOCD_36
GPIOCD_37
GPIOCD_38
GPIOCD_39
GPIOCD_40
GPIOCD_41
GPIOCD_42
GPIOCD_43
GPIOCD_44
GPIOCD_45
GPIOCD_46
GPIOCD_47
GPIOCD_48
GPIOCD_49
GPIOCD_50
GPIOCD_51
GPIOCD_52
GPIOCD_53
GPIOCD_54
GPIOCD_55
GPIOCD_56
GPIOCD_57
GPIOCD_58
GPIOCD_59
GPIOCD_60
GPIOCD_61
GPIOCD_62
GPIOCD_63
GPIOEF_64
GPIOEF_65
GPIOEF_66
GPIOEF_67
GPIOEF_68
GPIOEF_69
GPIOEF_70
GPIOEF_71
GPIOEF_72
GPIOEF_73
GPIOEF_74
GPIOEF_75
GPIOEF_76
GPIOEF_77
GPIOEF_78
GPIOEF_79
GPIOEF_80
GPIOEF_81
GPIOEF_82
GPIOEF_83
GPIOEF_84
GPIOEF_85
GPIOEF_86
GPIOEF_87
GPIOEF_88
GPIOEF_89
GPIOEF_90
GPIOEF_91
GPIOEF_92
GPIOEF_93
GPIOEF_94
GPIOEF_95
GPIOGH_100
GPIOGH_101
GPIOGH_102
GPIOGH_103
GPIOGH_104
GPIOGH_105
GPIOGH_106
GPIOGH_107
GPIOGH_108
GPIOGH_109
GPIOGH_110
GPIOGH_111
GPIOGH_112
GPIOGH_113
GPIOGH_114
GPIOGH_115
GPIOGH_116
GPIOGH_117
GPIOGH_118
GPIOGH_119
GPIOGH_120
GPIOGH_121
GPIOGH_122
GPIOGH_123
GPIOGH_124
GPIOGH_125
GPIOGH_126
GPIOGH_127
GPIOGH_96
GPIOGH_97
GPIOGH_98
GPIOGH_99
GPIOI_128
GPIOI_129
GPIOI_130
GPIOI_131
GPIOI_132
GPIOI_133
GPIOI_134
GPIOI_135
GPIOI_136
GPIOI_137
GPIOI_138
TRC_CLK
TRC_CTL
TRC_DATA0
TRC_DATA1
TRC_DATA10
TRC_DATA11
TRC_DATA12
TRC_DATA13
TRC_DATA14
TRC_DATA15
TRC_DATA2
TRC_DATA3
TRC_DATA4
TRC_DATA5
TRC_DATA6
TRC_DATA7
TRC_DATA8
TRC_DATA9

4.19.9.1.2.3. PortPinName

Item

Name

PortPinName

Description

PAD IO name of the selected pin

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Range

PIN_A10
PIN_A11
PIN_A12
PIN_A13
PIN_A14
PIN_A15
PIN_A16
PIN_A17
PIN_A2
PIN_A3
PIN_A4
PIN_A5
PIN_A6
PIN_A7
PIN_A8
PIN_A9
PIN_B1
PIN_B10
PIN_B11
PIN_B12
PIN_B13
PIN_B14
PIN_B15
PIN_B16
PIN_B17
PIN_B18
PIN_B2
PIN_B3
PIN_B4
PIN_B5
PIN_B6
PIN_B7
PIN_B8
PIN_B9
PIN_C1
PIN_C10
PIN_C11
PIN_C12
PIN_C13
PIN_C14
PIN_C15
PIN_C16
PIN_C17
PIN_C18
PIN_C2
PIN_C4
PIN_C5
PIN_C6
PIN_C7
PIN_C8
PIN_C9
PIN_D1
PIN_D11
PIN_D13
PIN_D14
PIN_D15
PIN_D16
PIN_D17
PIN_D18
PIN_D2
PIN_D3
PIN_D5
PIN_D7
PIN_D9
PIN_E1
PIN_E16
PIN_E17
PIN_E18
PIN_E2
PIN_E3
PIN_E4
PIN_F1
PIN_F15
PIN_F16
PIN_F17
PIN_F18
PIN_F2
PIN_F3
PIN_F4
PIN_G1
PIN_G15
PIN_G16
PIN_G17
PIN_G18
PIN_G2
PIN_G3
PIN_G4
PIN_H1
PIN_H16
PIN_H17
PIN_H18
PIN_H2
PIN_J1
PIN_J17
PIN_J18
PIN_J2
PIN_J3
PIN_J4
PIN_K1
PIN_K15
PIN_K16
PIN_K17
PIN_K18
PIN_K2
PIN_K3
PIN_K4
PIN_L1
PIN_L16
PIN_L17
PIN_L18
PIN_L2
PIN_L3
PIN_LB
PIN_M1
PIN_M15
PIN_M16
PIN_M17
PIN_M18
PIN_M2
PIN_M3
PIN_M4
PIN_N1
PIN_N16
PIN_N17
PIN_N18
PIN_N2
PIN_N4
PIN_P1
PIN_P15
PIN_P16
PIN_P17
PIN_P18
PIN_P2
PIN_P3
PIN_R16
PIN_R17
PIN_R18
PIN_R3
PIN_T16
PIN_T17
PIN_T18
PIN_U17
PIN_U18
PIN_V17

4.19.9.1.2.4. PortPinId

Item

Name

PortPinId

Description

Pin Id of the port pin. This value will be assigned to the symbolic name derived from the port pin container short name.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1

4.19.9.1.2.5. PortPinIdAddr

Item

Name

PortPinIdAddr

Description

Pin Id of the port pin. This value will be assigned to the symbolic name derived from the port pin container short name.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

1

4.19.9.1.2.6. PortPinDirection

Item

Name

PortPinDirection

Description

The initial direction of the pin (IN or OUT). If the direction is not changeable, the value configured here is fixed.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_PIN_DEFAULT

Range

PORT_PIN_IN
PORT_PIN_OUT
PORT_PIN_DEFAULT

4.19.9.1.2.7. PortPinDirectionChangeable

Item

Name

PortPinDirectionChangeable

Description

Parameter to indicate if the direction is changeable on a port pin during runtime.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.19.9.1.2.8. PortPinInitialMode

Item

Name

PortPinInitialMode

Description

Port pin mode from mode list for use with Port_Init() function.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

CPTS0

Range

CPTS0
EPWM0
EPWM1
EPWM2
EPWM3
EPWM4
EPWM5
EPWM6
EPWM7
EPWM8
EPWM9
EPWM10
EPWM11
EPWM12
EPWM13
EPWM14
EPWM15
EPWM16
EPWM17
EPWM18
EPWM19
EPWM20
EPWM21
EPWM22
EPWM23
EPWM24
EPWM25
EPWM26
EPWM27
EPWM28
EPWM29
EPWM30
EPWM31
EQEP0
EQEP1
EQEP2
FSIRX0
FSIRX1
FSIRX2
FSIRX3
FSITX0
FSITX1
FSITX2
FSITX3
GPMC0
I2C0
I2C1
I2C2
I2C3
MDIO0
ECAP0
PR0_MDIO0
PRU0_GIO
PRU1_GIO
PR0_IEP0
PR0_UART0
UART0
UART1
UART2
UART3
UART4
UART5
JTAG
LIN0
LIN1
LIN2
LIN3
LIN4
MCAN0
MCAN1
MCAN2
MCAN3
MII
MMC0
XBAROUT
QSPI0
RMII1
RMII2
RGMII1
RGMII2
SDFM0
SDFM1
SPI0
SPI1
SPI2
SPI3
SPI4
CLKOUT
EXT_REFCLK
GPIOAB
GPIOCD
GPIOEF
GPIOGH
GPIOI
TRC

4.19.9.1.2.9. PortPinLevelValue

Item

Name

PortPinLevelValue

Description

Port Pin Level value from Port pin list.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_PIN_LEVEL_HIGH

Range

PORT_PIN_LEVEL_HIGH
PORT_PIN_LEVEL_LOW

4.19.9.1.2.10. PortPinMode

Item

Name

PortPinMode

Description

Port pin mode from mode list.

Multiplicity-Configuration-Class

Post-Build Time

VARIANT-POST-BUILD

Pre-Compile Time

VARIANT-PRE-COMPILE

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

TCK_MUXMODE_0

Range

TCK_MUXMODE_0
TMS_MUXMODE_0
CPTS0_TS_SYNC_MUXMODE_1
EPWM0_A_MUXMODE_0
EPWM0_B_MUXMODE_0
EPWM1_A_MUXMODE_0
EPWM1_B_MUXMODE_0
EPWM10_A_MUXMODE_0
EPWM10_B_MUXMODE_0
EPWM11_A_MUXMODE_0
EPWM11_B_MUXMODE_0
EPWM12_A_MUXMODE_0
EPWM12_B_MUXMODE_0
CLKOUT0_MUXMODE_0
EPWM13_A_MUXMODE_0
EPWM13_B_MUXMODE_0
EPWM14_A_MUXMODE_0
EPWM14_B_MUXMODE_0
EPWM15_A_MUXMODE_0
EPWM15_B_MUXMODE_0
EPWM16_A_MUXMODE_5
EPWM16_B_MUXMODE_5
EPWM17_A_MUXMODE_5
EPWM17_B_MUXMODE_5
EPWM18_A_MUXMODE_5
EPWM18_B_MUXMODE_5
EPWM19_A_MUXMODE_5
EPWM19_B_MUXMODE_5
EPWM2_A_MUXMODE_0
EPWM2_B_MUXMODE_0
EPWM20_A_MUXMODE_5
EPWM20_B_MUXMODE_5
EPWM21_A_MUXMODE_5
EPWM21_B_MUXMODE_5
EPWM22_A_MUXMODE_5
EPWM22_B_MUXMODE_5
EPWM23_A_MUXMODE_5
EPWM23_B_MUXMODE_5
EPWM3_A_MUXMODE_0
EPWM3_B_MUXMODE_0
EPWM4_A_MUXMODE_0
EPWM4_B_MUXMODE_0
EPWM5_A_MUXMODE_0
EPWM5_B_MUXMODE_0
EPWM6_A_MUXMODE_0
EPWM6_B_MUXMODE_0
EPWM7_A_MUXMODE_0
EPWM7_B_MUXMODE_0
EPWM8_A_MUXMODE_0
EPWM8_B_MUXMODE_0
EPWM9_A_MUXMODE_0
EPWM9_B_MUXMODE_0
EQEP0_A_MUXMODE_8
EQEP0_B_MUXMODE_8
MII1_RXD0_MUXMODE_2
MII1_TXD3_MUXMODE_2
MII1_TXCLK_MUXMODE_2
MII1_RXD2_MUXMODE_2
EQEP0_I_MUXMODE_8
EQEP0_S_MUXMODE_8
EQEP1_A_MUXMODE_8
EQEP1_A_MUXMODE_9
EQEP1_B_MUXMODE_8
EQEP1_B_MUXMODE_9
EQEP1_I_MUXMODE_8
MII1_TX_EN_MUXMODE_2
EQEP1_I_MUXMODE_9
MII1_TXD1_MUXMODE_2
MII1_TXD2_MUXMODE_2
EQEP1_S_MUXMODE_8
EQEP1_S_MUXMODE_9
EQEP2_A_MUXMODE_8
EQEP2_B_MUXMODE_8
EQEP2_I_MUXMODE_8
EQEP2_S_MUXMODE_8
MII1_CRS_MUXMODE_2
MII1_RXCLK_MUXMODE_2
MII1_RX_ER_MUXMODE_2
MII1_RXD3_MUXMODE_2
MII1_RXD1_MUXMODE_2
MII1_RXDV_MUXMODE_2
PR0_IEP0_EDIO_DATA_IN_OUT31_MUXMODE_3
LIN4_RXD_MUXMODE_2
FSIRX0_CLK_MUXMODE_6
FSIRX0_DATA0_MUXMODE_6
FSIRX0_DATA1_MUXMODE_6
FSIRX1_CLK_MUXMODE_6
FSIRX1_DATA0_MUXMODE_6
FSIRX1_DATA1_MUXMODE_6
FSIRX2_CLK_MUXMODE_3
FSIRX2_CLK_MUXMODE_6
FSIRX2_DATA0_MUXMODE_3
FSIRX2_DATA0_MUXMODE_6
FSIRX2_DATA1_MUXMODE_3
FSIRX2_DATA1_MUXMODE_6
FSIRX3_CLK_MUXMODE_3
FSIRX3_DATA0_MUXMODE_3
FSIRX3_DATA1_MUXMODE_3
FSITX0_CLK_MUXMODE_6
FSITX0_DATA0_MUXMODE_6
FSITX0_DATA1_MUXMODE_6
FSITX1_CLK_MUXMODE_6
FSITX1_DATA0_MUXMODE_6
FSITX1_DATA1_MUXMODE_6
FSITX2_CLK_MUXMODE_3
FSITX2_CLK_MUXMODE_6
FSITX2_DATA0_MUXMODE_3
FSITX2_DATA0_MUXMODE_6
FSITX2_DATA1_MUXMODE_3
FSITX2_DATA1_MUXMODE_6
FSITX3_CLK_MUXMODE_3
FSITX3_DATA0_MUXMODE_3
FSITX3_DATA1_MUXMODE_3
LIN4_TXD_MUXMODE_2
GPIOAB_0_MUXMODE_7
GPIOAB_1_MUXMODE_7
GPIOAB_10_MUXMODE_7
GPIOAB_11_MUXMODE_7
GPIOAB_12_MUXMODE_7
GPIOAB_13_MUXMODE_7
GPIOAB_14_MUXMODE_7
GPIOAB_15_MUXMODE_7
GPIOAB_16_MUXMODE_7
GPIOAB_17_MUXMODE_7
GPIOAB_18_MUXMODE_7
GPIOAB_19_MUXMODE_7
GPIOAB_2_MUXMODE_7
GPIOAB_20_MUXMODE_7
GPIOAB_21_MUXMODE_7
GPIOAB_22_MUXMODE_7
GPIOAB_23_MUXMODE_7
GPIOAB_24_MUXMODE_7
GPIOAB_25_MUXMODE_7
GPIOAB_26_MUXMODE_7
GPIOAB_27_MUXMODE_7
GPIOAB_28_MUXMODE_7
GPIOAB_29_MUXMODE_7
GPIOAB_3_MUXMODE_7
GPIOAB_30_MUXMODE_7
GPIOAB_31_MUXMODE_7
GPIOAB_4_MUXMODE_7
EPWM28_B_MUXMODE_5
EPWM28_A_MUXMODE_5
GPIOAB_5_MUXMODE_7
GPIOAB_6_MUXMODE_7
GPIOAB_7_MUXMODE_7
GPIOAB_8_MUXMODE_7
GPIOAB_9_MUXMODE_7
GPIOCD_32_MUXMODE_7
GPIOCD_33_MUXMODE_7
GPIOCD_34_MUXMODE_7
GPIOCD_35_MUXMODE_7
GPIOCD_36_MUXMODE_7
GPIOCD_37_MUXMODE_7
GPIOCD_38_MUXMODE_7
GPIOCD_39_MUXMODE_7
GPIOCD_40_MUXMODE_7
GPIOCD_41_MUXMODE_7
GPIOCD_42_MUXMODE_7
GPIOCD_43_MUXMODE_7
GPIOCD_44_MUXMODE_7
GPIOCD_45_MUXMODE_7
GPIOCD_46_MUXMODE_7
GPIOCD_47_MUXMODE_7
GPIOCD_48_MUXMODE_7
GPIOCD_49_MUXMODE_7
GPIOCD_50_MUXMODE_7
GPIOCD_51_MUXMODE_7
GPIOCD_52_MUXMODE_7
GPIOCD_53_MUXMODE_7
GPIOCD_54_MUXMODE_7
GPIOCD_55_MUXMODE_7
GPIOCD_56_MUXMODE_7
GPIOCD_57_MUXMODE_7
GPIOCD_58_MUXMODE_7
GPIOCD_59_MUXMODE_7
GPIOCD_60_MUXMODE_7
GPIOCD_61_MUXMODE_7
GPIOCD_62_MUXMODE_7
GPIOCD_63_MUXMODE_7
GPIOEF_64_MUXMODE_7
GPIOEF_65_MUXMODE_7
GPIOEF_66_MUXMODE_7
GPIOEF_67_MUXMODE_7
GPIOEF_68_MUXMODE_7
GPIOEF_69_MUXMODE_7
GPIOEF_70_MUXMODE_7
GPIOEF_71_MUXMODE_7
GPIOEF_72_MUXMODE_7
GPIOEF_73_MUXMODE_7
GPIOEF_74_MUXMODE_7
GPIOEF_75_MUXMODE_7
GPIOEF_76_MUXMODE_7
GPIOEF_77_MUXMODE_7
GPIOEF_78_MUXMODE_7
GPIOEF_79_MUXMODE_7
MII1_COL_MUXMODE_2
MII2_RX_ER_MUXMODE_4
RMII2_RX_ER_MUXMODE_2
GPIOEF_80_MUXMODE_7
GPIOEF_81_MUXMODE_7
GPIOEF_82_MUXMODE_7
GPIOEF_83_MUXMODE_7
GPIOEF_84_MUXMODE_7
GPIOEF_85_MUXMODE_7
RMII2_CRS_DV_MUXMODE_2
MII2_CRS_MUXMODE_4
GPIOEF_86_MUXMODE_7
MII2_COL_MUXMODE_4
GPIOEF_87_MUXMODE_7
RMII2_RXD0_MUXMODE_2
RMII2_RXD1_MUXMODE_2
MII2_RXD0_MUXMODE_4
MII2_RXD1_MUXMODE_4
GPIOEF_88_MUXMODE_7
GPIOEF_89_MUXMODE_7
GPIOEF_90_MUXMODE_7
GPIOEF_91_MUXMODE_7
GPIOEF_92_MUXMODE_7
GPIOEF_93_MUXMODE_7
GPIOEF_94_MUXMODE_7
MII2_TXD2_MUXMODE_4
MII2_TXCLK_MUXMODE_4
MII2_TXD3_MUXMODE_4
GPIOEF_95_MUXMODE_7
GPIOGH_100_MUXMODE_7
GPIOGH_101_MUXMODE_7
GPIOGH_102_MUXMODE_7
GPIOGH_103_MUXMODE_7
GPIOGH_104_MUXMODE_7
GPIOGH_105_MUXMODE_7
GPIOGH_106_MUXMODE_7
GPIOGH_107_MUXMODE_7
GPIOGH_108_MUXMODE_7
GPIOGH_109_MUXMODE_7
GPIOGH_110_MUXMODE_7
GPIOGH_111_MUXMODE_7
GPIOGH_112_MUXMODE_7
GPIOGH_113_MUXMODE_7
GPIOGH_114_MUXMODE_7
GPIOGH_115_MUXMODE_7
GPIOGH_116_MUXMODE_7
GPIOGH_117_MUXMODE_7
GPIOGH_118_MUXMODE_7
GPIOGH_119_MUXMODE_7
GPIOGH_120_MUXMODE_7
GPIOGH_121_MUXMODE_7
GPIOGH_122_MUXMODE_7
GPIOGH_123_MUXMODE_7
GPIOGH_124_MUXMODE_7
GPIOGH_125_MUXMODE_7
MII2_RXD3_MUXMODE_4
MII2_RXD2_MUXMODE_4
MII2_TXD1_MUXMODE_4
GPIOGH_126_MUXMODE_7
GPIOGH_127_MUXMODE_7
GPIOGH_96_MUXMODE_7
GPIOGH_97_MUXMODE_7
MII2_TX_EN_MUXMODE_4
GPIOGH_98_MUXMODE_7
GPIOGH_99_MUXMODE_7
RMII2_TX_EN_MUXMODE_2
GPIOI_128_MUXMODE_7
GPIOI_130_MUXMODE_7
GPIOI_131_MUXMODE_7
GPIOI_132_MUXMODE_7
GPIOI_133_MUXMODE_7
GPIOI_134_MUXMODE_7
GPIOI_135_MUXMODE_7
GPIOI_136_MUXMODE_7
GPIOI_137_MUXMODE_7
GPIOI_138_MUXMODE_7
MII2_TXD0_MUXMODE_4
RMII2_TXD1_MUXMODE_2
RMII2_TXD0_MUXMODE_2
TDO_MUXMODE_0
TDI_MUXMODE_0
GPMC0_A0_MUXMODE_6
GPMC0_A1_MUXMODE_6
GPMC0_A10_MUXMODE_6
GPMC0_A11_MUXMODE_6
GPMC0_A12_MUXMODE_6
GPMC0_A13_MUXMODE_6
GPMC0_A14_MUXMODE_6
GPMC0_A15_MUXMODE_6
GPMC0_A16_MUXMODE_6
GPMC0_A17_MUXMODE_6
GPMC0_A18_MUXMODE_6
GPMC0_A19_MUXMODE_6
GPMC0_A2_MUXMODE_6
GPMC0_A20_MUXMODE_6
GPMC0_A21_MUXMODE_6
GPMC0_A3_MUXMODE_6
GPMC0_A4_MUXMODE_6
GPMC0_A5_MUXMODE_6
GPMC0_A6_MUXMODE_6
GPMC0_A7_MUXMODE_6
GPMC0_A8_MUXMODE_6
GPMC0_A9_MUXMODE_6
GPMC0_AD0_MUXMODE_6
GPMC0_AD1_MUXMODE_6
GPMC0_AD10_MUXMODE_6
GPMC0_AD11_MUXMODE_6
GPMC0_AD12_MUXMODE_6
GPMC0_AD13_MUXMODE_6
GPMC0_AD14_MUXMODE_6
GPMC0_AD15_MUXMODE_6
GPMC0_AD2_MUXMODE_6
GPMC0_AD3_MUXMODE_6
GPMC0_AD4_MUXMODE_6
GPMC0_AD5_MUXMODE_6
GPMC0_AD6_MUXMODE_6
GPMC0_AD7_MUXMODE_6
GPMC0_AD8_MUXMODE_6
GPMC0_AD9_MUXMODE_6
GPMC0_ADVn_ALE_MUXMODE_6
GPMC0_BE0n_CLE_MUXMODE_6
GPMC0_BE1n_MUXMODE_6
GPMC0_CLK_MUXMODE_6
GPMC0_CLKLB_MUXMODE_6
GPMC0_CSn0_MUXMODE_6
GPMC0_CSn1_MUXMODE_6
GPMC0_CSn2_MUXMODE_6
GPMC0_CSn3_MUXMODE_6
GPMC0_DIR_MUXMODE_6
GPMC0_OEn_REn_MUXMODE_6
GPMC0_WAIT0_MUXMODE_6
GPMC0_WAIT1_MUXMODE_6
GPMC0_WEn_MUXMODE_6
GPMC0_WPn_MUXMODE_6
I2C0_SCL_MUXMODE_0
I2C0_SDA_MUXMODE_0
I2C1_SCL_MUXMODE_0
I2C1_SCL_MUXMODE_2
I2C1_SDA_MUXMODE_0
I2C1_SDA_MUXMODE_2
I2C2_SCL_MUXMODE_1
I2C2_SCL_MUXMODE_2
I2C2_SDA_MUXMODE_1
I2C2_SDA_MUXMODE_2
I2C3_SCL_MUXMODE_2
I2C3_SCL_MUXMODE_5
I2C3_SDA_MUXMODE_2
I2C3_SDA_MUXMODE_5
LIN0_RXD_MUXMODE_1
LIN0_RXD_MUXMODE_2
LIN0_TXD_MUXMODE_1
LIN0_TXD_MUXMODE_2
LIN1_RXD_MUXMODE_0
LIN1_RXD_MUXMODE_1
LIN1_TXD_MUXMODE_0
LIN1_TXD_MUXMODE_1
LIN2_RXD_MUXMODE_0
LIN2_TXD_MUXMODE_0
LIN3_RXD_MUXMODE_2
LIN3_TXD_MUXMODE_2
MCAN0_RX_MUXMODE_0
MCAN0_TX_MUXMODE_0
MCAN1_RX_MUXMODE_0
MCAN1_TX_MUXMODE_0
MCAN2_RX_MUXMODE_0
MCAN2_TX_MUXMODE_0
MCAN3_RX_MUXMODE_0
MCAN3_RX_MUXMODE_3
MCAN3_TX_MUXMODE_0
MCAN3_TX_MUXMODE_3
MMC0_CD_MUXMODE_0
MMC0_CLK_MUXMODE_0
MMC0_CMD_MUXMODE_0
MMC0_D0_MUXMODE_0
MMC0_D1_MUXMODE_0
MMC0_D2_MUXMODE_0
MMC0_D3_MUXMODE_0
MMC0_WP_MUXMODE_0
EPWM30_B_MUXMODE_5
ECAP0_APWM_OUT_MUXMODE_0
TRC_CLK_MUXMODE_4
XBAROUT13_MUXMODE_5
PR0_IEP0_EDC_SYNC_OUT0_MUXMODE_3
PR0_IEP0_EDC_SYNC_OUT1_MUXMODE_3
PR0_MDIO0_MDC_MUXMODE_0
PR0_MDIO0_MDIO_MUXMODE_0
PR0_UART0_CTSn_MUXMODE_3
PR0_UART0_RTSn_MUXMODE_3
PR0_UART0_RXD_MUXMODE_3
PR0_UART0_TXD_MUXMODE_3
EPWM29_A_MUXMODE_5
EPWM27_A_MUXMODE_5
EPWM29_B_MUXMODE_5
EPWM31_A_MUXMODE_5
PRU0_GIO0_MUXMODE_0
PRU0_GIO1_MUXMODE_0
PRU0_GIO10_MUXMODE_0
PRU0_GIO11_MUXMODE_0
PRU0_GIO12_MUXMODE_0
EPWM27_B_MUXMODE_5
PRU0_GIO13_MUXMODE_0
PRU0_GIO14_MUXMODE_0
PRU0_GIO15_MUXMODE_0
PRU0_GIO16_MUXMODE_0
PRU0_GIO2_MUXMODE_0
EPWM26_B_MUXMODE_5
PRU0_GIO3_MUXMODE_0
PRU0_GIO4_MUXMODE_0
PRU0_GIO5_MUXMODE_0
PRU0_GIO6_MUXMODE_0
PRU0_GIO8_MUXMODE_0
PRU0_GIO9_MUXMODE_0
PRU1_GIO0_MUXMODE_0
PRU1_GIO1_MUXMODE_0
PRU1_GIO10_MUXMODE_0
PRU1_GIO11_MUXMODE_0
PRU1_GIO12_MUXMODE_0
EPWM30_A_MUXMODE_5
PRU1_GIO13_MUXMODE_0
PRU1_GIO14_MUXMODE_0
PRU1_GIO15_MUXMODE_0
PRU1_GIO16_MUXMODE_0
PRU1_GIO17_MUXMODE_0
PRU1_GIO18_MUXMODE_0
PRU1_GIO19_MUXMODE_0
PRU1_GIO2_MUXMODE_0
PRU1_GIO3_MUXMODE_0
PRU1_GIO4_MUXMODE_0
PRU1_GIO5_MUXMODE_0
EPWM31_B_MUXMODE_5
PRU1_GIO6_MUXMODE_0
PRU1_GIO7_MUXMODE_0
PRU1_GIO8_MUXMODE_0
PRU1_GIO9_MUXMODE_0
QSPI0_CLK_MUXMODE_0
QSPI0_CLKLB_MUXMODE_0
QSPI0_CSn0_MUXMODE_0
QSPI0_CSn1_MUXMODE_0
QSPI0_D0_MUXMODE_0
QSPI0_D1_MUXMODE_0
QSPI0_D2_MUXMODE_0
QSPI0_D3_MUXMODE_0
RGMII1_RD0_MUXMODE_0
RGMII1_RD1_MUXMODE_0
RGMII1_RD2_MUXMODE_0
RGMII1_RD3_MUXMODE_0
EPWM25_A_MUXMODE_5
EPWM25_B_MUXMODE_5
RGMII1_RX_CTL_MUXMODE_0
RGMII1_RXC_MUXMODE_0
RGMII1_TD0_MUXMODE_0
RGMII1_TD1_MUXMODE_0
RGMII1_TD2_MUXMODE_0
RGMII1_TD3_MUXMODE_0
EPWM24_B_MUXMODE_5
EPWM24_A_MUXMODE_5
RMII2_REF_CLK_MUXMODE_2
MII2_RXCLK_MUXMODE_4
MII2_RXDV_MUXMODE_4
RGMII1_TX_CTL_MUXMODE_0
RGMII1_TXC_MUXMODE_0
RGMII2_RD0_MUXMODE_3
EPWM26_A_MUXMODE_5
RGMII2_RD1_MUXMODE_3
RGMII2_RD2_MUXMODE_3
RGMII2_RD3_MUXMODE_3
RGMII2_RX_CTL_MUXMODE_3
RGMII2_RXC_MUXMODE_3
RGMII2_TD0_MUXMODE_3
RGMII2_TD1_MUXMODE_3
RGMII2_TD2_MUXMODE_3
RGMII2_TD3_MUXMODE_3
RGMII2_TX_CTL_MUXMODE_3
RGMII2_TXC_MUXMODE_3
RMII1_CRS_DV_MUXMODE_1
RMII1_REF_CLK_MUXMODE_1
RMII1_RX_ER_MUXMODE_1
RMII1_RXD0_MUXMODE_1
RMII1_RXD1_MUXMODE_1
RMII1_TX_EN_MUXMODE_1
RMII1_TXD0_MUXMODE_1
RMII1_TXD1_MUXMODE_1
SDFM0_CLK0_MUXMODE_8
SDFM0_CLK1_MUXMODE_8
LIN4_TXD_MUXMODE_1
PR0_IEP0_EDIO_DATA_IN_OUT30_MUXMODE_3
SDFM0_CLK2_MUXMODE_8
CLKOUT1_MUXMODE_0
SDFM0_CLK3_MUXMODE_8
SDFM0_D0_MUXMODE_8
GPIOI_129_MUXMODE_7
SDFM0_D1_MUXMODE_8
SDFM0_D2_MUXMODE_8
SDFM0_D3_MUXMODE_8
SDFM1_CLK0_MUXMODE_8
SDFM1_CLK0_MUXMODE_9
SDFM1_CLK1_MUXMODE_8
SDFM1_CLK1_MUXMODE_9
SDFM1_CLK2_MUXMODE_8
SDFM1_CLK2_MUXMODE_9
SDFM1_CLK3_MUXMODE_8
SDFM1_CLK3_MUXMODE_9
SDFM1_D0_MUXMODE_8
LIN4_RXD_MUXMODE_1
SDFM1_D0_MUXMODE_9
SDFM1_D1_MUXMODE_8
SDFM1_D1_MUXMODE_9
SDFM1_D2_MUXMODE_8
SDFM1_D2_MUXMODE_9
SDFM1_D3_MUXMODE_8
SDFM1_D3_MUXMODE_9
SPI0_CLK_MUXMODE_0
SPI0_CS0_MUXMODE_0
SPI0_CS1_MUXMODE_4
SPI0_D0_MUXMODE_0
SPI0_D1_MUXMODE_0
SPI1_CLK_MUXMODE_0
SPI1_CS0_MUXMODE_0
SPI1_D0_MUXMODE_0
SPI1_D1_MUXMODE_0
SPI2_CLK_MUXMODE_2
SPI2_CS0_MUXMODE_2
SPI2_D0_MUXMODE_2
SPI2_D1_MUXMODE_2
SPI3_CLK_MUXMODE_2
SPI3_CS0_MUXMODE_2
SPI3_D0_MUXMODE_2
SPI3_D1_MUXMODE_2
SPI4_CLK_MUXMODE_1
SPI4_CLK_MUXMODE_3
SPI4_CS0_MUXMODE_1
SPI4_CS0_MUXMODE_3
SPI4_CS1_MUXMODE_2
SPI4_D0_MUXMODE_1
SPI4_D0_MUXMODE_3
SPI4_D1_MUXMODE_1
SPI4_D1_MUXMODE_3
TRC_CTL_MUXMODE_4
TRC_DATA0_MUXMODE_4
TRC_DATA1_MUXMODE_4
TRC_DATA10_MUXMODE_4
TRC_DATA11_MUXMODE_4
TRC_DATA12_MUXMODE_4
TRC_DATA13_MUXMODE_4
TRC_DATA14_MUXMODE_4
TRC_DATA15_MUXMODE_4
TRC_DATA2_MUXMODE_4
TRC_DATA3_MUXMODE_4
TRC_DATA4_MUXMODE_4
TRC_DATA5_MUXMODE_4
TRC_DATA6_MUXMODE_4
TRC_DATA7_MUXMODE_4
TRC_DATA8_MUXMODE_4
TRC_DATA9_MUXMODE_4
UART0_CTSn_MUXMODE_0
UART0_CTSn_MUXMODE_1
UART0_RTSn_MUXMODE_0
UART0_RTSn_MUXMODE_1
UART0_RXD_MUXMODE_0
UART0_RXD_MUXMODE_1
EXT_REFCLK0_MUXMODE_0
UART0_TXD_MUXMODE_0
UART0_TXD_MUXMODE_1
UART1_CTSn_MUXMODE_1
UART1_DCDn_MUXMODE_1
UART1_DSRn_MUXMODE_1
UART1_DTRn_MUXMODE_1
UART1_RIn_MUXMODE_1
UART1_RTSn_MUXMODE_1
UART1_RXD_MUXMODE_0
UART1_RXD_MUXMODE_1
UART1_TXD_MUXMODE_0
UART1_TXD_MUXMODE_1
UART2_CTSn_MUXMODE_1
UART2_RTSn_MUXMODE_1
UART2_RXD_MUXMODE_1
UART2_TXD_MUXMODE_1
UART3_CTSn_MUXMODE_1
UART3_RTSn_MUXMODE_1
UART3_RXD_MUXMODE_1
UART3_RXD_MUXMODE_2
UART3_TXD_MUXMODE_1
UART3_TXD_MUXMODE_2
UART4_CTSn_MUXMODE_0
UART4_RTSn_MUXMODE_0
UART4_RXD_MUXMODE_0
UART4_RXD_MUXMODE_1
UART4_TXD_MUXMODE_0
UART4_TXD_MUXMODE_1
UART5_CTSn_MUXMODE_2
UART5_RTSn_MUXMODE_2
UART5_RXD_MUXMODE_0
UART5_RXD_MUXMODE_1
UART5_TXD_MUXMODE_0
UART5_TXD_MUXMODE_1
XBAROUT0_MUXMODE_5
XBAROUT1_MUXMODE_5
XBAROUT10_MUXMODE_5
XBAROUT11_MUXMODE_5
XBAROUT12_MUXMODE_5
XBAROUT14_MUXMODE_5
XBAROUT15_MUXMODE_5
XBAROUT2_MUXMODE_5
XBAROUT3_MUXMODE_5
XBAROUT4_MUXMODE_5
XBAROUT5_MUXMODE_5
XBAROUT6_MUXMODE_5
XBAROUT7_MUXMODE_5
XBAROUT8_MUXMODE_5
XBAROUT9_MUXMODE_5
MII1_TXD0_MUXMODE_2
MDIO0_MDC_MUXMODE_0
MDIO0_MDIO_MUXMODE_0

4.19.9.1.2.11. PortPinModeChangeable

Item

Name

PortPinModeChangeable

Description

Parameter to indicate if the mode is changeable on a port pin during runtime. True: Port Pin mode changeable allowed. False: Port Pin mode changeable not permitted.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.19.9.1.2.12. PortPinInhibitEnable

Item

Name

PortPinInhibitEnable

Description

The port pin inhibit enable.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_PIN_PULL_INHIBIT_DISABLE

Range

PORT_PIN_PULL_INHIBIT_ENABLE
PORT_PIN_PULL_INHIBIT_DISABLE
PORT_PIN_PULL_INHIBIT_DEFAULT

4.19.9.1.2.13. PortPullTypeSelect

Item

Name

PortPullTypeSelect

Description

Type of PULL U/D selection

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_PIN_PULLTYPE_PULLDOWN

Range

PORT_PIN_PULLTYPE_PULLDOWN
PORT_PIN_PULLTYPE_PULLUP
PORT_PIN_PULLTYPE_DEFAULT

4.19.9.1.2.14. PortPinHSmasterEnable

Item

Name

PortPinHSmasterEnable

Description

Parameter to enable HSMASTER

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.19.9.1.2.15. PortPinHSmodeEnable

Item

Name

PortPinHSmodeEnable

Description

Parameter to enable HSMODE

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

false

4.19.9.1.2.16. PortInputInversionSelect

Item

Name

PortInputInversionSelect

Description

Parameter to select port pin inversion (select value for chosing inverted version of PAD input for chip)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_INVTYPE_DEFAULT

Range

PORT_INV
PORT_NONINV
PORT_INVTYPE_DEFAULT

4.19.9.1.2.17. PortQualifierTypeSelect

Item

Name

PortQualifierTypeSelect

Description

Parameter to select port Qualifier Type (select value for chosing input qualifer type for PAD.)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_QUALTYPE_DEFAULT

Range

PORT_SYNC_QUAL
PORT_THREE_SAMPLE_QUAL
PORT_SIX_SAMPLE_QUAL
PORT_ASYNC_QUAL
PORT_QUALTYPE_DEFAULT

4.19.9.1.2.18. PortSlewControlSelect

Item

Name

PortSlewControlSelect

Description

Slew control configuration

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_PIN_SLEWCONTROL_FAST_SLEW

Range

PORT_PIN_SLEWCONTROL_FAST_SLEW
PORT_PIN_SLEWCONTROL_SLOW_SLEW
PORT_PIN_SLEWCONTROL_DEFAULT

4.19.9.1.2.19. PortInputOverrideCtrl

Item

Name

PortInputOverrideCtrl

Description

Port inputOverride control (Keep these value as PORT_PIN_DISABLE_INPUT_OVERRIDE while configuring pin as a GPIO)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Post-Build-Time

VARIANT-POST-BUILD

Default-value

PORT_PIN_INPUT_RETAIN_HW_CTRL

Range

PORT_PIN_DISABLE_INPUT_OVERRIDE
PORT_PIN_ENABLE_INPUT_OVERRIDE
PORT_PIN_INPUT_RETAIN_HW_CTRL

4.19.9.1.2.20. PortOutputOverrideCtrl

Item

Name

PortOutputOverrideCtrl

Description

Port OutputOverride control (Keep these value as PORT_PIN_DISABLE_OUTPUT_OVERRIDE while configuring pin as a GPIO)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Post-Build-Time

VARIANT-POST-BUILD

Default-value

PORT_PIN_OUTPUT_RETAIN_HW_CTRL

Range

PORT_PIN_DISABLE_OUTPUT_OVERRIDE
PORT_PIN_ENABLE_OUTPUT_OVERRIDE
PORT_PIN_OUTPUT_RETAIN_HW_CTRL

4.19.9.1.2.21. PortGpioOwnerCore

Item

Name

PortGpioOwnerCore

Description

PIN ownership of GPIO. 0 - R5FSS0 Core0, 1 - R5FSS0 Core1, 2 - R5FSS1 Core0, 3 - R5FSS1 Core1

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

0

Max-value

3

Min-value

0

4.19.9.1.3. PortDioConfig

Structure for GPIO Interrupt configuration

4.19.9.1.3.1. PortDioPinNumber

Item

Name

PortDioPinNumber

Description

Port GPIO Pin Numbers (0 to 138)

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Pre-Compile-Time

VARIANT-PRE-COMPILE

Post-Build-Time

VARIANT-POST-BUILD

Default-value

0

Max-value

9223372036854775807

Min-value

-9223372036854775808

4.19.9.1.3.2. PortPinSelectEdgeTrigger

Item

Name

PortPinSelectEdgeTrigger

Description

Type of EdgeTrigger selection

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_RISING_EDGE

Range

PORT_RISING_EDGE
PORT_FALLING_EDGE
PORT_BOTH_EDGE

4.19.9.1.3.3. PortPinSelectInterruptType

Item

Name

PortPinSelectInterruptType

Description

Select Interrupt type

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_BANK_INTR

Range

PORT_CHANNEL_INTR
PORT_BANK_INTR

4.19.9.1.3.4. PortDioInterruptNotification

Item

Name

PortDioInterruptNotification

Description

Definition of the Callback function.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

NULL_PTR

4.19.9.1.3.5. PortMcuGpioXbarReference

Item

Name

PortMcuGpioXbarReference

Description

Reference to the McuGpioXbarIntrConfiguration container

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

4.19.9.2. PortGeneral

Module wide configuration parameters of the PORT driver.

4.19.9.2.1. PortDevErrorDetect

Item

Name

PortDevErrorDetect

Description

Switches the Development Error Detection and Notification on or off.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.2. PortDeviceVariant

Item

Name

PortDeviceVariant

Description

Select SOC variant .This parameter shall be used by driver to impose device specific constraints. The user guide shall detail the device specific constraints

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

AM263x

Range

TPR12
AM263x

4.19.9.2.3. PortSetPinDirectionApi

Item

Name

PortSetPinDirectionApi

Description

Pre-processor switch to enable / disable the use of the function Port_SetPinDirection().

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.4. PortSetPinModeApi

Item

Name

PortSetPinModeApi

Description

Pre-processor switch to enable / disable the use of the function Port_SetPinMode().

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.5. PortVersionInfoApi

Item

Name

PortVersionInfoApi

Description

Pre-processor switch to enable / disable the API to read out the modules version information.

Origin

AUTOSAR_ECUC

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.6. PortRefreshPortDirectionApi

Item

Name

PortRefreshPortDirectionApi

Description

Pre-processor switch to enable / disable the API to refresh the port direction.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Default-value

true

4.19.9.2.7. PortDefaultOSCounterId

Item

Name

PortDefaultOSCounterId

Description

Default Os Counter Id if node reference to OsCounter ref PortOsCounterRef is not set

Multiplicity-Configuration-Class

Post-Build Time

VARIANT-POST-BUILD

Pre-Compile Time

VARIANT-PRE-COMPILE

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

0

Max-value

16

Min-value

0

4.19.9.2.8. PortSafeTIApi

Item

Name

PortSafeTIApi

Description

Enable/Disable SAFETI Configuration register readback.

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.9. PortEnableIntrApi

Item

Name

PortEnableIntrApi

Description

Pre-processor switch to enable / disable the use of Interrupt Functionality

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.10. PortGetIntrStatusApi

Item

Name

PortGetIntrStatusApi

Description

Pre-processor switch to enable / disable the use of Port_GetInterruptStatus API

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.11. PortClearIntrStatusApi

Item

Name

PortClearIntrStatusApi

Description

Pre-processor switch to enable / disable the use of Port_ClearInterruptStatus API

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

true

4.19.9.2.12. PortTimeoutDuration

Item

Name

PortTimeoutDuration

Description

PORT timeout - used in PORT busy wait

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

32000

Max-value

4294967295

Min-value

1

4.19.9.2.13. PortTypeofInterruptFunction

Item

Name

PortTypeofInterruptFunction

Description

Type of ISR function

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

PORT_ISR_CAT1

Range

PORT_ISR_VOID
PORT_ISR_CAT1
PORT_ISR_CAT2

4.19.9.2.14. PortGpioHostCoreId

Item

Name

PortGpioHostCoreId

Description

R5F CPU ownership of GPIO. 0 - R5FSS0 Core0, 1 - R5FSS0 Core1, 2 - R5FSS1 Core0, 3 - R5FSS1 Core1

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Default-value

0

Max-value

3

Min-value

0

4.19.9.2.15. PortOsCounterRef

Item

Name

PortOsCounterRef

Description

This parameter contains a reference to the OsCounter, which is used by the PORT driver.

Multiplicity-Configuration-Class

Post-Build Time

VARIANT-POST-BUILD

Pre-Compile Time

VARIANT-PRE-COMPILE

Origin

Texas Instruments

Post-build-variant-multiplicity

false

Post-Build-Variant-Value

false

Value-Configuration-Class

Post-Build-Time

VARIANT-POST-BUILD

Pre-Compile-Time

VARIANT-PRE-COMPILE

Note

GPIO usage for the cores other than R5F0_0 If AUTOSAR MCAL is running on cores other than R5F0_0, user need to take care of following configuration

R5F CPU ownership of GPIO.

0 -> R5FSS0 Core0 
1 -> R5FSS0 Core1 
2 -> R5FSS1 Core0 
3 -> R5FSS1 Core1
../_images/port_image8.jpg

Note

PortDioConfig container is specifically used only to configure the GPIO interrupt feature parameters.

To use the GPIO interrupt feature, user should configure the required GPIO channels in PortDioConfig container.

4.19.9.3. Steps To Configure Port Module

  1. Open EB Tresos configurator tool and Select the Config Variant ( Precompile/Post-Build) and Device Variant ( Pin Package ) parameters

  2. Go to Port Container tab and create a new container

  3. Open the created container and go to PortPin container to create a portPin configuration. ( Multiple PortPin configurations can be created )

  4. Open the created Port pin, and configure the pin parameters

  5. Select the Port pin peripheral instance ( Mode ) which needs to be configured and accordingly select the Peripheral Signal. As per selected Signal, physical pin ID needs to be selected from the list

  6. Configure the other parameters as per pin usage.

  7. Open Port pin Mode tab and add the default port pin mode ( at least one mode is required for this field ). Other supported modes for that pin can also be configured if user needs to change the mode for the pin afterwards.

  8. Configure the number of port pins in port container general tab

  9. Save the configuration and generate the configuration.

4.19.10. Examples

The example application demonstrates use of Port module, the list below identifies key steps performed in the example.

4.19.10.1. Overview

  • Port Example:

    • Initialize clock using Mcu_Init()

    • Initialize port using Port_Init()

    • Configure Gpio Interrupt

    • Test Port Interrupt Functionality

    • Set Port pin direction of GPIOGH_120 to PORT_PIN_OUT using Port_SetPinDirection()

    • Read the Port pin channel level using Dio_ReadChannel()

    • Toggle the channel level using Dio_FlipChannel()

    • Verify the read result

4.19.10.2. Setup required to run example

PORT module is tested using CC board (PROC111E2).

4.19.10.3. How to run examples

4.19.10.3.1. Steps to build and run example

PORT example application demonstrating the MCAL PORT driver features is in folder <MCAL_ROOT>/examples/Port.

This application can be built from the root folder by giving gmake –s port_app PLATFORM=am263.

Once the build is completed we get a binary file, which is loaded in our controller and executed.

4.19.10.3.2. Configuration used to test this example

Pin configurations : Following pins are configured as a GPIO and used in example application to test.

Pin Ball Number

Pin Signal Name

C15

GPIOGH_120

B8

GPIOAB_21

4.19.10.4. Sample Log

CLANG compiled : portApp: Sample Application - STARTS !!!
Port Driver version info:9.0.1
Port Driver Module/Driver:124.44 

[GPIO INTR verification] => Press SW1 switch on board to trigger the interrupt 

Interrupt -- Bank Number : 1 GpioChannelNum : 255  Edge : 1

Pin Value for channel 120 : 1 

Dio_FlipChannel(channel_120)
Pin Value for channel 120 : 0 

Dio_FlipChannel(channel_120)
Pin Value for channel 120 : 1 

Pin Value for channel 120 : 1 
Dio_FlipChannel(channel_120)
Pin Value for channel 120 : 1 

PORT Test Passed!!!

4.19.10.5. File Structure

📦AM263x
┣ 📂build
┣ 📂mcal
┃ ┣ 📂examples
┃ ┃ ┣ 📂Port
┃ ┃ ┃ ┣ 📂soc
┃ ┃ ┃ ┣ 📜Portapp.c : Contains Port test example
┃ ┃ ┃ ┗ 📜Makefile
┃ ┣ 📂examples_config
┃ ┃ ┣ 📂Port_Demo_Cfg
┃ ┃ ┃ ┗ 📂soc
┃ ┃ ┃ ┃ ┣ 📂am263
┃ ┃ ┃ ┃ ┃ ┗ 📂r5f0_0
┃ ┃ ┃ ┃ ┃ ┃ ┣ 📂include
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┗📜Port_Cfg.h : Contains the configuration parameters
┃ ┃ ┃ ┃ ┃ ┃ ┗ 📂src
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣📜Port_Cfg.c : Contains all Pre-Compile Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣📜Port_PBcfg.c : contains all Post build configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┣📜Port_PBcfg_Intr.c : Contains all Post Build Configured parameters
┃ ┃ ┃ ┃ ┃ ┃ ┃ ┗📜Port_PBcfg_UART0.c : contains all Post Build configured parameters
┃ 📂mcal_config
┃ 📂mcal_docs
┗ 📜README.txt

4.19.11. References

AUTOSAR_SWS_PortDriver
Technical Reference Manual