AM65x MCU+ SDK  09.01.00

Introduction

DMSC controls the power management, security and resource management of the device.

Data Structures

struct  Sciclient_RomFirmwareLoadHdr_t
 Header that prefixes all TISCI messages. More...
 
struct  tisci_sec_header
 Header that prefixes all TISCI messages sent via secure transport. More...
 

Macros

#define TISCI_MSG_FLAG_RESERVED0   TISCI_BIT(0)
 This file contains: More...
 
#define TISCI_MSG_FLAG_AOP   TISCI_BIT(1)
 
#define TISCI_MSG_FLAG_SEC   TISCI_BIT(2)
 
#define TISCI_MSG_FLAG_ACK   TISCI_BIT(1)
 
#define TISCI_MSG_VERSION   (0x0002U)
 
#define TISCI_MSG_BOOT_NOTIFICATION   (0x000AU)
 
#define TISCI_MSG_BOARD_CONFIG   (0x000BU)
 
#define TISCI_MSG_BOARD_CONFIG_RM   (0x000CU)
 
#define TISCI_MSG_BOARD_CONFIG_SECURITY   (0x000DU)
 
#define TISCI_MSG_BOARD_CONFIG_PM   (0x000EU)
 
#define TISCI_MSG_ENABLE_WDT   (0x0000U)
 
#define TISCI_MSG_WAKE_RESET   (0x0001U)
 
#define TISCI_MSG_WAKE_REASON   (0x0003U)
 
#define TISCI_MSG_GOODBYE   (0x0004U)
 
#define TISCI_MSG_SYS_RESET   (0x0005U)
 
#define TISCI_MSG_QUERY_MSMC   (0x0020U)
 
#define TISCI_MSG_GET_TRACE_CONFIG   (0x0021U)
 
#define TISCI_MSG_QUERY_FW_CAPS   (0x0022U)
 
#define TISCI_MSG_SET_CLOCK   (0x0100U)
 
#define TISCI_MSG_GET_CLOCK   (0x0101U)
 
#define TISCI_MSG_SET_CLOCK_PARENT   (0x0102U)
 
#define TISCI_MSG_GET_CLOCK_PARENT   (0x0103U)
 
#define TISCI_MSG_GET_NUM_CLOCK_PARENTS   (0x0104U)
 
#define TISCI_MSG_SET_FREQ   (0x010cU)
 
#define TISCI_MSG_QUERY_FREQ   (0x010dU)
 
#define TISCI_MSG_GET_FREQ   (0x010eU)
 
#define TISCI_MSG_SET_DEVICE   (0x0200U)
 
#define TISCI_MSG_GET_DEVICE   (0x0201U)
 
#define TISCI_MSG_SET_DEVICE_RESETS   (0x0202U)
 
#define TISCI_MSG_DEVICE_DROP_POWERUP_REF   (0x0203U)
 
#define TISCI_MSG_PREPARE_SLEEP   (0x0300U)
 
#define TISCI_MSG_ENTER_SLEEP   (0x0301U)
 
#define TISCI_MSG_SYNC_RESUME   (0x0302U)
 
#define TISCI_MSG_CONTINUE_RESUME   (0x0303U)
 
#define TISCI_MSG_CORE_RESUME   (0x0304U)
 
#define TISCI_MSG_ABORT_ENTER_SLEEP   (0x0305U)
 
#define TISCI_MSG_LPM_WAKE_REASON   (0x0306U)
 
#define TISCI_MSG_SET_IO_ISOLATION   (0x0307U)
 
#define TISCI_MSG_FIRMWARE_LOAD   (0x8105U)
 
#define MSG_FIRMWARE_LOAD_RESULT   (0x8805U)
 
#define TISCI_MSG_SET_FWL_REGION   (0x9000U)
 
#define TISCI_MSG_GET_FWL_REGION   (0x9001U)
 
#define TISCI_MSG_CHANGE_FWL_OWNER   (0x9002U)
 
#define TISCI_MSG_SA2UL_SET_DKEK   (0x9003U)
 
#define TISCI_MSG_SA2UL_RELEASE_DKEK   (0x9004U)
 
#define TISCI_MSG_KEYSTORE_IMPORT_SKEY   (0x9005U)
 
#define TISCI_MSG_KEYSTORE_ERASE_SKEY   (0x9006U)
 
#define TISCI_MSG_SEC_RESERVED_9007   (0x9007U)
 
#define TISCI_MSG_SEC_RESERVED_9008   (0x9008U)
 
#define TISCI_MSG_SET_ISC_REGION   (0x9009U)
 
#define TISCI_MSG_GET_ISC_REGION   (0x900AU)
 
#define TISCI_MSG_FWL_EXCP_NOTIFICATION   (0x900BU)
 
#define TISCI_MSG_OPEN_DEBUG_FWLS   (0x900CU)
 
#define TISCI_MSG_KEYSTORE_WRITE   (0x900DU)
 
#define TISCI_MSG_KEYSTORE_EXPORT_ALL   (0x900EU)
 
#define TISCI_MSG_KEYSTORE_IMPORT_ALL   (0x900FU)
 
#define TISCI_MSG_SEC_RESERVED_9010   (0x9010U)
 
#define TISCI_MSG_SEC_RESERVED_9011   (0x9011U)
 
#define TISCI_MSG_SEC_RESERVED_9012   (0x9012U)
 
#define TISCI_MSG_SEC_RESERVED_9013   (0x9013U)
 
#define TISCI_MSG_SEC_RESERVED_9014   (0x9014U)
 
#define TISCI_MSG_SEC_RESERVED_9015   (0x9015U)
 
#define TISCI_MSG_SEC_RESERVED_9016   (0x9016U)
 
#define TISCI_MSG_SA2UL_AUTH_RES_ACQUIRE   (0x9017U)
 
#define TISCI_MSG_SA2UL_AUTH_RES_RELEASE   (0x9018U)
 
#define TISCI_MSG_SEC_RESERVED_9020   (0x9020U)
 
#define TISCI_MSG_GET_SOC_UID   (0x9021U)
 
#define TISCI_MSG_READ_OTP_MMR   (0x9022U)
 
#define TISCI_MSG_WRITE_OTP_ROW   (0x9023U)
 
#define TISCI_MSG_LOCK_OTP_ROW   (0x9024U)
 
#define TISCI_MSG_SOFT_LOCK_OTP_WRITE_GLOBAL   (0x9025U)
 
#define TISCI_MSG_GET_OTP_ROW_LOCK_STATUS   (0x9026U)
 
#define TISCI_MSG_RSVD_OTP_1   (0x9027U)
 
#define TISCI_MSG_RSVD_OTP_2   (0x9028U)
 
#define TISCI_MSG_SA2UL_GET_DKEK   (0x9029U)
 
#define TISCI_MSG_SEC_HANDOVER   (0x9030U)
 
#define TISCI_MSG_KEY_WRITER   (0x9031U)
 
#define TISCI_MSG_WRITE_SWREV   (0x9032U)
 
#define TISCI_MSG_READ_SWREV   (0x9033U)
 
#define TISCI_MSG_READ_KEYCNT_KEYREV   (0x9034U)
 
#define TISCI_MSG_WRITE_KEYREV   (0x9035U)
 
#define TISCI_MSG_PROC_REQUEST   (0xC000U)
 
#define TISCI_MSG_PROC_RELEASE   (0xC001U)
 
#define TISCI_MSG_PROC_HANDOVER   (0xC005U)
 
#define TISCI_MSG_PROC_SET_CONFIG   (0xC100U)
 
#define TISCI_MSG_PROC_SET_CONTROL   (0xC101U)
 
#define TISCI_MSG_PROC_GET_STATUS   (0xC400U)
 
#define TISCI_MSG_PROC_WAIT_STATUS   (0xC401U)
 
#define TISCI_MSG_PROC_AUTH_BOOT   (0xC120U)
 
#define TISCI_MSG_RM_GET_RESOURCE_RANGE   (0x1500U)
 
#define TISCI_MSG_RM_IRQ_SET   (0x1000U)
 
#define TISCI_MSG_RM_IRQ_RELEASE   (0x1001U)
 
#define TISCI_MSG_RM_RESERVED_1100   (0x1100U)
 
#define TISCI_MSG_RM_RESERVED_1101   (0x1101U)
 
#define TISCI_MSG_RM_RESERVED_1102   (0x1102U)
 
#define TISCI_MSG_RM_RESERVED_1103   (0x1103U)
 
#define TISCI_MSG_RM_RING_CFG   (0x1110U)
 
#define TISCI_MSG_RM_RESERVED_1111   (0x1111U)
 
#define TISCI_MSG_RM_RING_MON_CFG   (0x1120U)
 
#define TISCI_MSG_RM_RESERVED_1200   (0x1200U)
 
#define TISCI_MSG_RM_RESERVED_1201   (0x1201U)
 
#define TISCI_MSG_RM_UDMAP_TX_CH_CFG   (0x1205U)
 
#define TISCI_MSG_RM_RESERVED_1206   (0x1206U)
 
#define TISCI_MSG_RM_RESERVED_1210   (0x1210U)
 
#define TISCI_MSG_RM_RESERVED_1211   (0x1211U)
 
#define TISCI_MSG_RM_UDMAP_RX_CH_CFG   (0x1215U)
 
#define TISCI_MSG_RM_RESERVED_1216   (0x1216U)
 
#define TISCI_MSG_RM_RESERVED_1220   (0x1220U)
 
#define TISCI_MSG_RM_RESERVED_1221   (0x1221U)
 
#define TISCI_MSG_RM_UDMAP_FLOW_CFG   (0x1230U)
 
#define TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_CFG   (0x1231U)
 
#define TISCI_MSG_RM_RESERVED_1232   (0x1232U)
 
#define TISCI_MSG_RM_RESERVED_1233   (0x1233U)
 
#define TISCI_MSG_RM_UDMAP_FLOW_DELEGATE   (0x1234U)
 
#define TISCI_MSG_RM_UDMAP_GCFG_CFG   (0x1240U)
 
#define TISCI_MSG_RM_RESERVED_1241   (0x1241U)
 
#define TISCI_MSG_RM_PSIL_PAIR   (0x1280U)
 
#define TISCI_MSG_RM_PSIL_UNPAIR   (0x1281U)
 
#define TISCI_MSG_RM_PSIL_READ   (0x1282U)
 
#define TISCI_MSG_RM_PSIL_WRITE   (0x1283U)
 
#define TISCI_MSG_RM_PROXY_CFG   (0x1300U)
 

Macro Definition Documentation

◆ TISCI_MSG_FLAG_RESERVED0

#define TISCI_MSG_FLAG_RESERVED0   TISCI_BIT(0)

This file contains:

    WARNING!!: Autogenerated file from SYSFW. DO NOT MODIFY!!

System Firmware TISCI Messaging Core

TISCI Protocol Definitions This flag is reserved and not to be used.

◆ TISCI_MSG_FLAG_AOP

#define TISCI_MSG_FLAG_AOP   TISCI_BIT(1)

ACK on Processed: Send a response to a message after it has been processed with TISCI_MSG_FLAG_ACK set if the processing succeeded, or a NAK otherwise. This response contains the complete response to the message with the result of the actual action that was requested.

◆ TISCI_MSG_FLAG_SEC

#define TISCI_MSG_FLAG_SEC   TISCI_BIT(2)

Indicate that this message is marked secure

◆ TISCI_MSG_FLAG_ACK

#define TISCI_MSG_FLAG_ACK   TISCI_BIT(1)

Response flag for a message that indicates success. If this flag is NOT set then that is to be interpreted as a NAK.

◆ TISCI_MSG_VERSION

#define TISCI_MSG_VERSION   (0x0002U)

◆ TISCI_MSG_BOOT_NOTIFICATION

#define TISCI_MSG_BOOT_NOTIFICATION   (0x000AU)

◆ TISCI_MSG_BOARD_CONFIG

#define TISCI_MSG_BOARD_CONFIG   (0x000BU)

◆ TISCI_MSG_BOARD_CONFIG_RM

#define TISCI_MSG_BOARD_CONFIG_RM   (0x000CU)

◆ TISCI_MSG_BOARD_CONFIG_SECURITY

#define TISCI_MSG_BOARD_CONFIG_SECURITY   (0x000DU)

◆ TISCI_MSG_BOARD_CONFIG_PM

#define TISCI_MSG_BOARD_CONFIG_PM   (0x000EU)

◆ TISCI_MSG_ENABLE_WDT

#define TISCI_MSG_ENABLE_WDT   (0x0000U)

◆ TISCI_MSG_WAKE_RESET

#define TISCI_MSG_WAKE_RESET   (0x0001U)

◆ TISCI_MSG_WAKE_REASON

#define TISCI_MSG_WAKE_REASON   (0x0003U)

◆ TISCI_MSG_GOODBYE

#define TISCI_MSG_GOODBYE   (0x0004U)

◆ TISCI_MSG_SYS_RESET

#define TISCI_MSG_SYS_RESET   (0x0005U)

◆ TISCI_MSG_QUERY_MSMC

#define TISCI_MSG_QUERY_MSMC   (0x0020U)

◆ TISCI_MSG_GET_TRACE_CONFIG

#define TISCI_MSG_GET_TRACE_CONFIG   (0x0021U)

◆ TISCI_MSG_QUERY_FW_CAPS

#define TISCI_MSG_QUERY_FW_CAPS   (0x0022U)

◆ TISCI_MSG_SET_CLOCK

#define TISCI_MSG_SET_CLOCK   (0x0100U)

◆ TISCI_MSG_GET_CLOCK

#define TISCI_MSG_GET_CLOCK   (0x0101U)

◆ TISCI_MSG_SET_CLOCK_PARENT

#define TISCI_MSG_SET_CLOCK_PARENT   (0x0102U)

◆ TISCI_MSG_GET_CLOCK_PARENT

#define TISCI_MSG_GET_CLOCK_PARENT   (0x0103U)

◆ TISCI_MSG_GET_NUM_CLOCK_PARENTS

#define TISCI_MSG_GET_NUM_CLOCK_PARENTS   (0x0104U)

◆ TISCI_MSG_SET_FREQ

#define TISCI_MSG_SET_FREQ   (0x010cU)

◆ TISCI_MSG_QUERY_FREQ

#define TISCI_MSG_QUERY_FREQ   (0x010dU)

◆ TISCI_MSG_GET_FREQ

#define TISCI_MSG_GET_FREQ   (0x010eU)

◆ TISCI_MSG_SET_DEVICE

#define TISCI_MSG_SET_DEVICE   (0x0200U)

◆ TISCI_MSG_GET_DEVICE

#define TISCI_MSG_GET_DEVICE   (0x0201U)

◆ TISCI_MSG_SET_DEVICE_RESETS

#define TISCI_MSG_SET_DEVICE_RESETS   (0x0202U)

◆ TISCI_MSG_DEVICE_DROP_POWERUP_REF

#define TISCI_MSG_DEVICE_DROP_POWERUP_REF   (0x0203U)

◆ TISCI_MSG_PREPARE_SLEEP

#define TISCI_MSG_PREPARE_SLEEP   (0x0300U)

◆ TISCI_MSG_ENTER_SLEEP

#define TISCI_MSG_ENTER_SLEEP   (0x0301U)

◆ TISCI_MSG_SYNC_RESUME

#define TISCI_MSG_SYNC_RESUME   (0x0302U)

◆ TISCI_MSG_CONTINUE_RESUME

#define TISCI_MSG_CONTINUE_RESUME   (0x0303U)

◆ TISCI_MSG_CORE_RESUME

#define TISCI_MSG_CORE_RESUME   (0x0304U)

◆ TISCI_MSG_ABORT_ENTER_SLEEP

#define TISCI_MSG_ABORT_ENTER_SLEEP   (0x0305U)

◆ TISCI_MSG_LPM_WAKE_REASON

#define TISCI_MSG_LPM_WAKE_REASON   (0x0306U)

◆ TISCI_MSG_SET_IO_ISOLATION

#define TISCI_MSG_SET_IO_ISOLATION   (0x0307U)

◆ TISCI_MSG_FIRMWARE_LOAD

#define TISCI_MSG_FIRMWARE_LOAD   (0x8105U)

◆ MSG_FIRMWARE_LOAD_RESULT

#define MSG_FIRMWARE_LOAD_RESULT   (0x8805U)

◆ TISCI_MSG_SET_FWL_REGION

#define TISCI_MSG_SET_FWL_REGION   (0x9000U)

Message to set a firewall region configuration

◆ TISCI_MSG_GET_FWL_REGION

#define TISCI_MSG_GET_FWL_REGION   (0x9001U)

Message to get a firewall region configuration

◆ TISCI_MSG_CHANGE_FWL_OWNER

#define TISCI_MSG_CHANGE_FWL_OWNER   (0x9002U)

Message to change firewall region owner

◆ TISCI_MSG_SA2UL_SET_DKEK

#define TISCI_MSG_SA2UL_SET_DKEK   (0x9003U)

Message to derive a KEK and set SA2UL DKEK register

◆ TISCI_MSG_SA2UL_RELEASE_DKEK

#define TISCI_MSG_SA2UL_RELEASE_DKEK   (0x9004U)

Message to erase the DKEK register

◆ TISCI_MSG_KEYSTORE_IMPORT_SKEY

#define TISCI_MSG_KEYSTORE_IMPORT_SKEY   (0x9005U)

Message to import a symmetric key to the keystore

◆ TISCI_MSG_KEYSTORE_ERASE_SKEY

#define TISCI_MSG_KEYSTORE_ERASE_SKEY   (0x9006U)

Message to erase a imported symmetric key in the keystore

◆ TISCI_MSG_SEC_RESERVED_9007

#define TISCI_MSG_SEC_RESERVED_9007   (0x9007U)

◆ TISCI_MSG_SEC_RESERVED_9008

#define TISCI_MSG_SEC_RESERVED_9008   (0x9008U)

◆ TISCI_MSG_SET_ISC_REGION

#define TISCI_MSG_SET_ISC_REGION   (0x9009U)

Message to set a ISC region configuration

◆ TISCI_MSG_GET_ISC_REGION

#define TISCI_MSG_GET_ISC_REGION   (0x900AU)

Message to get a ISC region configuration

◆ TISCI_MSG_FWL_EXCP_NOTIFICATION

#define TISCI_MSG_FWL_EXCP_NOTIFICATION   (0x900BU)

Notification for firewall exception

◆ TISCI_MSG_OPEN_DEBUG_FWLS

#define TISCI_MSG_OPEN_DEBUG_FWLS   (0x900CU)

Message to open debug firewalls using a certificate

◆ TISCI_MSG_KEYSTORE_WRITE

#define TISCI_MSG_KEYSTORE_WRITE   (0x900DU)

Message to write partitioning data and provisioned keys to the keystore memory

◆ TISCI_MSG_KEYSTORE_EXPORT_ALL

#define TISCI_MSG_KEYSTORE_EXPORT_ALL   (0x900EU)

Message to encrypt and export the full keystore contents for saving to external storage

◆ TISCI_MSG_KEYSTORE_IMPORT_ALL

#define TISCI_MSG_KEYSTORE_IMPORT_ALL   (0x900FU)

Message to import and decrypt a previously exported keystore blob

◆ TISCI_MSG_SEC_RESERVED_9010

#define TISCI_MSG_SEC_RESERVED_9010   (0x9010U)

◆ TISCI_MSG_SEC_RESERVED_9011

#define TISCI_MSG_SEC_RESERVED_9011   (0x9011U)

◆ TISCI_MSG_SEC_RESERVED_9012

#define TISCI_MSG_SEC_RESERVED_9012   (0x9012U)

◆ TISCI_MSG_SEC_RESERVED_9013

#define TISCI_MSG_SEC_RESERVED_9013   (0x9013U)

◆ TISCI_MSG_SEC_RESERVED_9014

#define TISCI_MSG_SEC_RESERVED_9014   (0x9014U)

◆ TISCI_MSG_SEC_RESERVED_9015

#define TISCI_MSG_SEC_RESERVED_9015   (0x9015U)

◆ TISCI_MSG_SEC_RESERVED_9016

#define TISCI_MSG_SEC_RESERVED_9016   (0x9016U)

◆ TISCI_MSG_SA2UL_AUTH_RES_ACQUIRE

#define TISCI_MSG_SA2UL_AUTH_RES_ACQUIRE   (0x9017U)

Message to acquire authentication resources from sysfw

◆ TISCI_MSG_SA2UL_AUTH_RES_RELEASE

#define TISCI_MSG_SA2UL_AUTH_RES_RELEASE   (0x9018U)

Message to release authentication resources back to sysfw

◆ TISCI_MSG_SEC_RESERVED_9020

#define TISCI_MSG_SEC_RESERVED_9020   (0x9020U)

◆ TISCI_MSG_GET_SOC_UID

#define TISCI_MSG_GET_SOC_UID   (0x9021U)

Message to get SOC UID

◆ TISCI_MSG_READ_OTP_MMR

#define TISCI_MSG_READ_OTP_MMR   (0x9022U)

Message to read 32 bit OTP MMR by register number

◆ TISCI_MSG_WRITE_OTP_ROW

#define TISCI_MSG_WRITE_OTP_ROW   (0x9023U)

Message to write to non-secure OTP Row

◆ TISCI_MSG_LOCK_OTP_ROW

#define TISCI_MSG_LOCK_OTP_ROW   (0x9024U)

Message to lock OTP Row

◆ TISCI_MSG_SOFT_LOCK_OTP_WRITE_GLOBAL

#define TISCI_MSG_SOFT_LOCK_OTP_WRITE_GLOBAL   (0x9025U)

Message to perform a global lock on OTP writes

◆ TISCI_MSG_GET_OTP_ROW_LOCK_STATUS

#define TISCI_MSG_GET_OTP_ROW_LOCK_STATUS   (0x9026U)

Message to get the lock status of a row

◆ TISCI_MSG_RSVD_OTP_1

#define TISCI_MSG_RSVD_OTP_1   (0x9027U)

Message ID reserved for row level soft lock on OTP writes

◆ TISCI_MSG_RSVD_OTP_2

#define TISCI_MSG_RSVD_OTP_2   (0x9028U)

Message ID reserved for write to secure OTP row

◆ TISCI_MSG_SA2UL_GET_DKEK

#define TISCI_MSG_SA2UL_GET_DKEK   (0x9029U)

Message to derive a KEK and return it via TISCI

◆ TISCI_MSG_SEC_HANDOVER

#define TISCI_MSG_SEC_HANDOVER   (0x9030U)

Message for handing over subset of security functionality to another core. Only available on certain platforms.

◆ TISCI_MSG_KEY_WRITER

#define TISCI_MSG_KEY_WRITER   (0x9031U)

◆ TISCI_MSG_WRITE_SWREV

#define TISCI_MSG_WRITE_SWREV   (0x9032U)

Message to write SWREV values

◆ TISCI_MSG_READ_SWREV

#define TISCI_MSG_READ_SWREV   (0x9033U)

Message to read SWREV values

◆ TISCI_MSG_READ_KEYCNT_KEYREV

#define TISCI_MSG_READ_KEYCNT_KEYREV   (0x9034U)

Message to read KEYCNT and KEYREV

◆ TISCI_MSG_WRITE_KEYREV

#define TISCI_MSG_WRITE_KEYREV   (0x9035U)

Message to write KEYREV value

◆ TISCI_MSG_PROC_REQUEST

#define TISCI_MSG_PROC_REQUEST   (0xC000U)

Message to get a Processor

◆ TISCI_MSG_PROC_RELEASE

#define TISCI_MSG_PROC_RELEASE   (0xC001U)

Message to release a Processor

◆ TISCI_MSG_PROC_HANDOVER

#define TISCI_MSG_PROC_HANDOVER   (0xC005U)

Message to handover a Processor

◆ TISCI_MSG_PROC_SET_CONFIG

#define TISCI_MSG_PROC_SET_CONFIG   (0xC100U)

Message to Set the processor configuration

◆ TISCI_MSG_PROC_SET_CONTROL

#define TISCI_MSG_PROC_SET_CONTROL   (0xC101U)

Message to Set the processor control

◆ TISCI_MSG_PROC_GET_STATUS

#define TISCI_MSG_PROC_GET_STATUS   (0xC400U)

Message to Get the processor status

◆ TISCI_MSG_PROC_WAIT_STATUS

#define TISCI_MSG_PROC_WAIT_STATUS   (0xC401U)

Message to Wait for processor status

◆ TISCI_MSG_PROC_AUTH_BOOT

#define TISCI_MSG_PROC_AUTH_BOOT   (0xC120U)

Message to do authenticated boot configuration of a processor

◆ TISCI_MSG_RM_GET_RESOURCE_RANGE

#define TISCI_MSG_RM_GET_RESOURCE_RANGE   (0x1500U)

RM TISCI message to request a resource range assignment for a host

◆ TISCI_MSG_RM_IRQ_SET

#define TISCI_MSG_RM_IRQ_SET   (0x1000U)

RM TISCI message to set an IRQ between a peripheral and host processor

◆ TISCI_MSG_RM_IRQ_RELEASE

#define TISCI_MSG_RM_IRQ_RELEASE   (0x1001U)

RM TISCI message to release a configured IRQ

◆ TISCI_MSG_RM_RESERVED_1100

#define TISCI_MSG_RM_RESERVED_1100   (0x1100U)

◆ TISCI_MSG_RM_RESERVED_1101

#define TISCI_MSG_RM_RESERVED_1101   (0x1101U)

◆ TISCI_MSG_RM_RESERVED_1102

#define TISCI_MSG_RM_RESERVED_1102   (0x1102U)

◆ TISCI_MSG_RM_RESERVED_1103

#define TISCI_MSG_RM_RESERVED_1103   (0x1103U)

◆ TISCI_MSG_RM_RING_CFG

#define TISCI_MSG_RM_RING_CFG   (0x1110U)

RM TISCI message to configure a Navigator Subsystem ring

◆ TISCI_MSG_RM_RESERVED_1111

#define TISCI_MSG_RM_RESERVED_1111   (0x1111U)

◆ TISCI_MSG_RM_RING_MON_CFG

#define TISCI_MSG_RM_RING_MON_CFG   (0x1120U)

RM TISCI message to configure a Navigator Subsystem ring monitor

◆ TISCI_MSG_RM_RESERVED_1200

#define TISCI_MSG_RM_RESERVED_1200   (0x1200U)

◆ TISCI_MSG_RM_RESERVED_1201

#define TISCI_MSG_RM_RESERVED_1201   (0x1201U)

◆ TISCI_MSG_RM_UDMAP_TX_CH_CFG

#define TISCI_MSG_RM_UDMAP_TX_CH_CFG   (0x1205U)

RM TISCI message to configure a Navigator Subsystem UDMAP transmit channel

◆ TISCI_MSG_RM_RESERVED_1206

#define TISCI_MSG_RM_RESERVED_1206   (0x1206U)

◆ TISCI_MSG_RM_RESERVED_1210

#define TISCI_MSG_RM_RESERVED_1210   (0x1210U)

◆ TISCI_MSG_RM_RESERVED_1211

#define TISCI_MSG_RM_RESERVED_1211   (0x1211U)

◆ TISCI_MSG_RM_UDMAP_RX_CH_CFG

#define TISCI_MSG_RM_UDMAP_RX_CH_CFG   (0x1215U)

RM TISCI message to configure a Navigator Subsystem UDMAP receive channel

◆ TISCI_MSG_RM_RESERVED_1216

#define TISCI_MSG_RM_RESERVED_1216   (0x1216U)

◆ TISCI_MSG_RM_RESERVED_1220

#define TISCI_MSG_RM_RESERVED_1220   (0x1220U)

◆ TISCI_MSG_RM_RESERVED_1221

#define TISCI_MSG_RM_RESERVED_1221   (0x1221U)

◆ TISCI_MSG_RM_UDMAP_FLOW_CFG

#define TISCI_MSG_RM_UDMAP_FLOW_CFG   (0x1230U)

RM TISCI message to configure a Navigator Subsystem UDMAP receive flow

◆ TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_CFG

#define TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_CFG   (0x1231U)

RM TISCI message to configure a Navigator Subsystem UDMAP receive flow's optional, size based free descriptor queue registers

◆ TISCI_MSG_RM_RESERVED_1232

#define TISCI_MSG_RM_RESERVED_1232   (0x1232U)

◆ TISCI_MSG_RM_RESERVED_1233

#define TISCI_MSG_RM_RESERVED_1233   (0x1233U)

◆ TISCI_MSG_RM_UDMAP_FLOW_DELEGATE

#define TISCI_MSG_RM_UDMAP_FLOW_DELEGATE   (0x1234U)

RM TISCI message to delegate a DMA flow to another host for configuration

◆ TISCI_MSG_RM_UDMAP_GCFG_CFG

#define TISCI_MSG_RM_UDMAP_GCFG_CFG   (0x1240U)

RM TISCI message to configure a Navigator Subsystem UDMAP global configuration

◆ TISCI_MSG_RM_RESERVED_1241

#define TISCI_MSG_RM_RESERVED_1241   (0x1241U)

◆ TISCI_MSG_RM_PSIL_PAIR

#define TISCI_MSG_RM_PSIL_PAIR   (0x1280U)

RM TISCI message to pair PSI-L source and destination threads

◆ TISCI_MSG_RM_PSIL_UNPAIR

#define TISCI_MSG_RM_PSIL_UNPAIR   (0x1281U)

RM TISCI message to unpair PSI-L source and destination threads

◆ TISCI_MSG_RM_PSIL_READ

#define TISCI_MSG_RM_PSIL_READ   (0x1282U)

RM TISCI message to read PSI-L thread RT registers via the PSI-L proxy

◆ TISCI_MSG_RM_PSIL_WRITE

#define TISCI_MSG_RM_PSIL_WRITE   (0x1283U)

RM TISCI message to write PSI-L thread RT registers via the PSI-L proxy

◆ TISCI_MSG_RM_PROXY_CFG

#define TISCI_MSG_RM_PROXY_CFG   (0x1300U)

RM TISCI message to setup a Navigator Subsystem proxy for configuration