enet_mod_mdio.h File Reference

Introduction

This file contains the type definitions and helper macros for the Enet MDIO module.

Go to the source code of this file.

Data Structures
struct	EnetMdio_C22ReadInArgs
	Input args for ENET_MDIO_IOCTL_C22_READ command. More...
struct	EnetMdio_C45ReadInArgs
	Input args for ENET_MDIO_IOCTL_C45_READ command. More...
struct	EnetMdio_C22WriteInArgs
	Input args for ENET_MDIO_IOCTL_C22_WRITE command. More...
struct	EnetMdio_C45WriteInArgs
	Input args for ENET_MDIO_IOCTL_C45_WRITE command. More...

Macros
#define	ENET_MDIO_FEAT_CLAUSE45   (ENET_BIT(0U))
	MDIO feature mask for Clause-45 support. More...
#define	ENET_MDIO_FEAT_PHY_MONITOR   (ENET_BIT(1U))
	MDIO feature mask for PHY state change monitoring. More...
#define	ENET_MDIO_PUBLIC_IOCTL(x)
	Helper macro to create IOCTL commands for MDIO module. More...
#define	ENET_MDIO_PRIVATE_IOCTL(x)
	Helper macro to create private IOCTL commands for MDIO module. More...
#define	ENET_MDIO_PHY_ADDR_MASK(addr)   (ENET_BIT(addr))
	Create a MDIO PHY mask from a PHY address. More...
#define	ENET_MDIO_IS_PHY_ADDR_SET(mask, addr)   (((mask) & ENET_BIT(addr)) != 0U)
	Check if the corresponding PHY address mask is set. More...
#define	ENET_MDIO_PHY_ADDR_MASK_NONE   (0x00000000U)
	MDIO PHY address mask for no PHYs present. More...
#define	ENET_MDIO_PHY_ADDR_MASK_ALL   (0xFFFFFFFFU)
	MDIO PHY address mask for all PHYs present. More...
#define	ENET_MDIO_PHY_CNT_MAX   (31U)
	Maximum number of PHYs supported on the MDIO bus. More...

Enumerations
enum	EnetMdio_Ioctl {   ENET_MDIO_IOCTL_GET_VERSION = ENET_MDIO_PUBLIC_IOCTL(0U), ENET_MDIO_IOCTL_PRINT_REGS = ENET_MDIO_PUBLIC_IOCTL(1U), ENET_MDIO_IOCTL_IS_ALIVE = ENET_MDIO_PUBLIC_IOCTL(2U), ENET_MDIO_IOCTL_IS_LINKED = ENET_MDIO_PUBLIC_IOCTL(3U),   ENET_MDIO_IOCTL_IS_POLL_ENABLED = ENET_MDIO_PUBLIC_IOCTL(4U), ENET_MDIO_IOCTL_C22_READ = ENET_MDIO_PUBLIC_IOCTL(5U), ENET_MDIO_IOCTL_C22_WRITE = ENET_MDIO_PUBLIC_IOCTL(6U), ENET_MDIO_IOCTL_C45_READ = ENET_MDIO_PUBLIC_IOCTL(7U),   ENET_MDIO_IOCTL_C45_WRITE = ENET_MDIO_PUBLIC_IOCTL(8U), ENET_MDIO_IOCTL_C22_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(9U), ENET_MDIO_IOCTL_C22_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(10U), ENET_MDIO_IOCTL_C22_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(11U),   ENET_MDIO_IOCTL_C22_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(12U), ENET_MDIO_IOCTL_C45_ASYNC_READ_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(13U), ENET_MDIO_IOCTL_C45_ASYNC_READ_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(14U), ENET_MDIO_IOCTL_C45_ASYNC_WRITE_TRIGGER = ENET_MDIO_PUBLIC_IOCTL(15U),   ENET_MDIO_IOCTL_C45_ASYNC_WRITE_COMPLETE = ENET_MDIO_PUBLIC_IOCTL(16U), ENET_MDIO_IOCTL_ENABLE_STATE_MACHINE = ENET_MDIO_PUBLIC_IOCTL(17U) }
	MDIO IOCTL commands. More...
enum	EnetMdio_Group { ENET_MDIO_GROUP_0 = 0U, ENET_MDIO_GROUP_1, ENET_MDIO_GROUP_NUM }
	MDIO user group. More...
enum	EnetMdio_FrameFmt { ENET_MDIO_FRAME_FMT_C22 = 0U, ENET_MDIO_FRAME_FMT_C45 }
	Frame format. More...
enum	EnetMdio_C45Mmd {   ENET_MDIO_MMD_PMA_PMD = 1U, ENET_MDIO_MMD_WIS = 2U, ENET_MDIO_MMD_PCS = 3U, ENET_MDIO_MMD_PHY_XS = 4U,   ENET_MDIO_MMD_DTE_XS = 5U, ENET_MDIO_MMD_VENDOR_1 = 30U, ENET_MDIO_MMD_VENDOR_2 = 31U }
	Clause-45 MDIO Manageable Device (MMD) addresses. More...