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AM64x MCU+ SDK
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59 #if defined(SOC_AM64X) || defined(SOC_AM243X) || defined(SOC_AM62AX) || defined(SOC_AM62PX) || defined(SOC_AM62DX)
64 #elif defined (SOC_AM273X) || defined(SOC_AWR294X) || defined(SOC_AWR2544) || defined(SOC_AM263X) || defined(SOC_AM263PX) || defined(SOC_AM261X)
65 #include <include/dma/cpdma/enet_cpdma.h>
67 #error "SOC not supported"
80 #if defined(SOC_AM273X) || defined(SOC_AWR294X) || defined(SOC_AWR2544) || defined(SOC_AM263X) || defined(SOC_AM263PX) || defined(SOC_AM261X)
82 #define Enet_isCacheCoherent() (false)
83 #elif defined(SOC_AM64X) || defined(SOC_AM243X) || defined(SOC_AM62AX) || defined(SOC_AM62PX) || defined(SOC_AM62DX)
85 #define Enet_isCacheCoherent() (Udma_isCacheCoherent())
87 #error "SOC not supported"
91 #define ENETDMA_RXCSUMINFO_CHKSUM_ADD_SHIFT (0U)
94 #define ENETDMA_RXCSUMINFO_CHKSUM_ADD_MASK (((uint32_t) 0xFFFF) << ENETDMA_RXCSUMINFO_CHKSUM_ADD_SHIFT)
97 #define ENETDMA_RXCSUMINFO_CHKSUM_ERR_SHIFT (16U)
100 #define ENETDMA_RXCSUMINFO_CHKSUM_ERR_MASK (((uint32_t) 0x1U) << ENETDMA_RXCSUMINFO_CHKSUM_ERR_SHIFT)
103 #define ENETDMA_RXCSUMINFO_FRAGMENT_SHIFT (17U)
106 #define ENETDMA_RXCSUMINFO_FRAGMENT_MASK (((uint32_t) 0x1U) << ENETDMA_RXCSUMINFO_FRAGMENT_SHIFT)
109 #define ENETDMA_RXCSUMINFO_TCP_UDP_N_SHIFT (18U)
112 #define ENETDMA_RXCSUMINFO_TCP_UDP_N_MASK (((uint32_t) 0x1U) << ENETDMA_RXCSUMINFO_TCP_UDP_N_SHIFT)
115 #define ENETDMA_RXCSUMINFO_IPV6_VALID_SHIFT (19U)
118 #define ENETDMA_RXCSUMINFO_IPV6_VALID_MASK (((uint32_t) 0x1U) << ENETDMA_RXCSUMINFO_IPV6_VALID_SHIFT)
121 #define ENETDMA_RXCSUMINFO_IPV4_VALID_SHIFT (20U)
124 #define ENETDMA_RXCSUMINFO_IPV4_VALID_MASK (((uint32_t) 0x1U) << ENETDMA_RXCSUMINFO_IPV4_VALID_SHIFT)
127 #define ENETDMA_TXCSUMINFO_CHKSUM_BYTECNT_SHIFT (0U)
130 #define ENETDMA_TXCSUMINFO_CHKSUM_BYTECNT_MASK (((uint32_t) 0x3FFFU) << ENETDMA_TXCSUMINFO_CHKSUM_BYTECNT_SHIFT)
133 #define ENETDMA_TXCSUMINFO_CHKSUM_INV_SHIFT (15U)
136 #define ENETDMA_TXCSUMINFO_CHKSUM_INV_MASK (((uint32_t) 0x1U) << ENETDMA_TXCSUMINFO_CHKSUM_INV_SHIFT)
139 #define ENETDMA_TXCSUMINFO_CHKSUM_STARTBYTE_SHIFT (16U)
142 #define ENETDMA_TXCSUMINFO_CHKSUM_STARTBYTE_MASK (((uint32_t) 0xFFU) << ENETDMA_TXCSUMINFO_CHKSUM_STARTBYTE_SHIFT)
145 #define ENETDMA_TXCSUMINFO_CHKSUM_RESULT_SHIFT (24U)
148 #define ENETDMA_TXCSUMINFO_CHKSUM_RESULT_MASK (((uint32_t) 0xFFU) << ENETDMA_TXCSUMINFO_CHKSUM_RESULT_SHIFT)
154 #define ENETDMA_RXCSUMINFO_GET_IPV4_FLAG(chkSumInfo) \
155 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_IPV4_VALID)
158 #define ENETDMA_RXCSUMINFO_GET_IPV6_FLAG(chkSumInfo) \
159 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_IPV6_VALID)
162 #define ENETDMA_RXCSUMINFO_GET_TCPUDP_N_FLAG(chkSumInfo) \
163 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_TCP_UDP_N)
166 #define ENETDMA_RXCSUMINFO_GET_FRAGMENT_FLAG(chkSumInfo) \
167 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_FRAGMENT)
170 #define ENETDMA_RXCSUMINFO_GET_CHKSUM_ERR_FLAG(chkSumInfo) \
171 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_CHKSUM_ERR)
174 #define ENETDMA_RXCSUMINFO_GET_CHKSUM_RESULT(chkSumInfo) \
175 ENET_FEXT(chkSumInfo, ENETDMA_RXCSUMINFO_CHKSUM_ADD)
180 #define ENETDMA_TXCSUMINFO_SET_CHKSUM_RESBYTE(chkSumInfo, val) \
181 ENET_FINS(chkSumInfo, ENETDMA_TXCSUMINFO_CHKSUM_RESULT, val)
184 #define ENETDMA_TXCSUMINFO_SET_CHKSUM_STARTBYTE(chkSumInfo, val) \
185 ENET_FINS(chkSumInfo, ENETDMA_TXCSUMINFO_CHKSUM_STARTBYTE, val)
188 #define ENETDMA_TXCSUMINFO_SET_CHKSUM_INV_FLAG(chkSumInfo, val) \
189 ENET_FINS(chkSumInfo, ENETDMA_TXCSUMINFO_CHKSUM_INV, val)
192 #define ENETDMA_TXCSUMINFO_SET_CHKSUM_BYTECNT(chkSumInfo, val) \
193 ENET_FINS(chkSumInfo, ENETDMA_TXCSUMINFO_CHKSUM_BYTECNT, val)
200 #define ENET_DMA_STATS_HISTORY_CNT ((uint32_t)2U)
246 typedef struct EnetDma_CbStats_s
289 typedef struct EnetDma_DmaDescStats_s
302 typedef struct EnetDma_RxChStats_s
321 typedef struct EnetDma_TxChStats_s
405 const void *pRxChCfg);
500 const void *pTxChCfg);
uint64_t txSubmitPktEnq
Definition: enet_dma.h:330
uint64_t rxSubmitPktEnq
Definition: enet_dma.h:311
int32_t EnetDma_disableRxEvent(EnetDma_RxChHandle hRxCh)
Disable RX channel packet reception event.
uint64_t freeDmaDescDeq
Definition: enet_dma.h:294
int32_t EnetDma_retrieveTxPkt(EnetDma_TxChHandle hTxCh, EnetDma_Pkt **pPkt)
Retrieve single TX free (empty) packet from TX channel.
int32_t EnetDma_submitTxPktQ(EnetDma_TxChHandle hTxCh, EnetDma_PktQ *pSubmitQ)
Submit a queue of ready (full) packets to TX channel.
uint64_t rxRetrievePktDeq
Definition: enet_dma.h:313
EnetDma_CbStats submitPktStats
Definition: enet_dma.h:305
#define ENET_DMA_STATS_HISTORY_CNT
Enet DMA statistics configuration.
Definition: enet_dma.h:200
int32_t EnetDma_enableTxEvent(EnetDma_TxChHandle hTxCh)
Enable TX channel packet transmit completion event.
void EnetDma_initRxChParams(void *pRxChCfg)
Initialize RX channel open parameters.
RX channel statistics.
Definition: enet_dma.h:303
This file contains the basic types using across the Enet driver.
TX channel statistics.
Definition: enet_dma.h:322
int32_t EnetDma_getTxChStats(EnetDma_TxChHandle hTxCh, EnetDma_TxChStats *pStats)
Get TX channel statistics.
EnetDma_CbStats retrievePktStats
Definition: enet_dma.h:307
struct EnetUdma_TxChObj_s * EnetDma_TxChHandle
Opaque handle that holds software state for Enet TX DMA channel.
Definition: enet_udma_types.h:99
int32_t EnetDma_getRxChStats(EnetDma_RxChHandle hRxCh, EnetDma_RxChStats *pStats)
Get RX channel statistics.
This file contains the type definitions and helper macros for the Enet software queue.
uint64_t zeroNotifyCnt
Definition: enet_dma.h:253
uint64_t pktsPerNotifyMax
Definition: enet_dma.h:262
uint64_t txRetrievePktDeq
Definition: enet_dma.h:332
uint64_t txSubmitPktOverFlowCnt
Definition: enet_dma.h:334
void(* EnetDma_PktNotifyCb)(void *cbArg)
Function pointer type for packet notify call back.
Definition: enet_udma.h:184
int32_t EnetDma_resetRxChStats(EnetDma_RxChHandle hRxCh)
Reset RX channel statistics.
void EnetDma_initPktInfo(EnetDma_Pkt *pktInfo)
Initialize packet information structure.
EnetDma_TxChHandle EnetDma_openTxCh(EnetDma_Handle hDma, const void *pTxChCfg)
Enet DMA open TX channel.
EnetDma_DmaDescStats dmaDescStats
Definition: enet_dma.h:309
EnetDma_DmaDescStats dmaDescStats
Definition: enet_dma.h:328
Enet DMA utility API to check packet and descriptor ownership states during development and debug.
int32_t EnetDma_resetTxChStats(EnetDma_TxChHandle hTxCh)
Reset TX channel statistics.
uint64_t totalCycleCnt
Definition: enet_dma.h:257
void EnetDma_initTxChParams(void *pTxChCfg)
Initialize TX channel open parameters.
struct EnetUdma_PktInfo_s EnetDma_Pkt
Opaque handle that represents a DMA packet.
Definition: enet_udma_types.h:104
EnetDma_Handle EnetDma_initDmaCfg(Enet_Type enetType, uint32_t instId, const EnetDma_initCfg *pDmaCfg)
Initialize data path.
int32_t EnetDma_retrieveRxPktQ(EnetDma_RxChHandle hRxCh, EnetDma_PktQ *pRetrieveQ)
Retrieve queue of RX ready (full) packets from RX channel.
This file contains the type definitions and helper macros for the Enet UDMA data path (DMA) interface...
uint64_t underFlowCnt
Definition: enet_dma.h:296
This file contains the type definitions and helper macros for the Enet UDMA CPPI protocol specific in...
This file contains the base DMA definitions.
int32_t EnetDma_retrieveRxPkt(EnetDma_RxChHandle hRxCh, EnetDma_Pkt **pPkt)
Retrieve single RX ready (full) packet (single) from RX channel.
int32_t EnetDma_enableRxEvent(EnetDma_RxChHandle hRxCh)
Enable RX channel packet reception event.
int32_t EnetDma_retrieveTxPktQ(EnetDma_TxChHandle hTxCh, EnetDma_PktQ *pRetrieveQ)
Retrieve queue of TX free (empty) packets from TX channel.
EnetDma_CbStats retrievePktStats
Definition: enet_dma.h:326
uint64_t dataNotifyCnt
Definition: enet_dma.h:249
int32_t EnetDma_submitTxPkt(EnetDma_TxChHandle hTxCh, EnetDma_Pkt *pPkt)
Submit a single ready (full) packet to TX channel.
Enet_Type
Ethernet peripheral type.
Definition: enet_types.h:199
int32_t EnetDma_submitRxPkt(EnetDma_RxChHandle hRxCh, EnetDma_Pkt *pPkt)
Submit single RX free (empty) packet for reception to RX channel.
void(* EnetDma_FreeEthPktFxn)(EnetDma_Pkt *pPktInfo)
Function pointer type for Ethernet packet free function.
Definition: enet_dma.h:217
int32_t EnetDma_submitRxPktQ(EnetDma_RxChHandle hRxCh, EnetDma_PktQ *pSubmitQ)
Submit queue of RX free (empty) packets for reception to RX channel.
uint64_t cycleCntPerPktMax
Definition: enet_dma.h:274
DMA descriptor stats for the RX & TX channels.
Definition: enet_dma.h:290
UDMA Driver API/interface file.
EnetDma_CbStats submitPktStats
Definition: enet_dma.h:324
EnetDma_RxChHandle EnetDma_openRxCh(EnetDma_Handle hDma, const void *pRxChCfg)
Enet DMA open RX channel.
int32_t EnetDma_registerTxEventCb(EnetDma_TxChHandle hTxCh, EnetDma_PktNotifyCb notifyCb, void *cbArg)
Register packet transmit completion event callback.
uint64_t totalPktCnt
Definition: enet_dma.h:255
Config structure for Enet UDMA Data Path initialization.
Definition: enet_udma.h:822
int32_t EnetDma_closeTxCh(EnetDma_TxChHandle hTxCh, EnetDma_PktQ *fq, EnetDma_PktQ *cq)
Enet DMA close TX channel.
Stats for packets submitted/retrieved in the DMA event callbacks functions.
Definition: enet_dma.h:247
int32_t EnetDma_registerRxEventCb(EnetDma_RxChHandle hRxCh, EnetDma_PktNotifyCb notifyCb, void *cbArg)
Register packet arrival event callback.
EnetQ EnetDma_PktQ
Packet queue.
Definition: enet_dma.h:228
struct EnetUdma_RxFlowObj_s * EnetDma_RxChHandle
Opaque handle that holds software state for Enet RX DMA flow.
Definition: enet_udma_types.h:94
int32_t EnetDma_disableTxEvent(EnetDma_TxChHandle hTxCh)
Disable TX channel packet transmit completion event.
struct EnetUdma_DrvObj_s * EnetDma_Handle
Opaque handle for Enet UDMA driver object.
Definition: enet_udma_types.h:85
int32_t EnetDma_closeRxCh(EnetDma_RxChHandle hRxCh, EnetDma_PktQ *fq, EnetDma_PktQ *cq)
Enet DMA close RX channel.
Generic queue.
Definition: enet_queue.h:83
uint64_t rxSubmitPktUnderFlowCnt
Definition: enet_dma.h:315
uint64_t readyDmaDescEnq
Definition: enet_dma.h:292
int32_t EnetDma_deinitDmaCfg(EnetDma_Handle hEnetUdma)
De-initialize data path.
uint64_t cycleCntPerNotifyMax
Definition: enet_dma.h:268