AM64x MCU+ SDK  10.00.00

Introduction

DMSC controls the power management, security and resource management of the device.

Data Structures

struct  tisci_boardcfg_substructure_header
 Contains a unique magic number for each substructure and the size of the associated superstructure for data validation/API compatibility checks. More...
 
struct  tisci_boardcfg_abi_rev
 Board Config data ABI version. More...
 
struct  tisci_boardcfg_control
 Used to enable/disable features in DMSC based on usecase. More...
 
struct  tisci_boardcfg_secproxy
 Secure proxy configuration. More...
 
struct  tisci_boardcfg_msmc
 Cache configuration so that MSMC can be used for main secure proxy backing memory and ring memory. More...
 
struct  tisci_boardcfg_proc_acl_entry
 A single entry of Processor Access Control List. More...
 
struct  tisci_boardcfg_proc_acl
 Control list for which hosts can control which processors. More...
 
struct  tisci_boardcfg_host_hierarchy_entry
 A single entry of Host hierarchy List. More...
 
struct  tisci_boardcfg_host_hierarchy
 List of SoC hosts and their supervising hosts. More...
 
struct  tisci_boardcfg_extended_otp_entry
 access configuration for one OTP MMR. Each MMR is 32 bit wide. More...
 
struct  tisci_boardcfg_extended_otp
 Access configuration for each OTP row. More...
 
struct  tisci_boardcfg_dkek
 Access configuration for DKEK. More...
 
struct  tisci_boardcfg_sa2ul_cfg
 Configuration of SA2UL resources. More...
 
struct  tisci_boardcfg_secure_debug_config
 Secure debug control. More...
 
struct  tisci_boardcfg_sec_handover
 Configuration of security handover. More...
 
struct  tisci_boardcfg_sec
 Format of the complete board configuration. More...
 
struct  tisci_boardcfg_dbg_cfg
 Debug console configuration. More...
 
struct  tisci_boardcfg
 Format of the complete board configuration. More...
 
struct  tisci_boardcfg_hashes_data
 structure to hold the board configuration hashes received via X509 certificate More...
 

Functions

struct tisci_boardcfg_substructure_header __attribute__ ((__packed__))
 

Macros

#define TISCI_BOARDCFG_ABI_MAJ_VALUE   0x00
 This file contains: More...
 
#define TISCI_BOARDCFG_ABI_MIN_VALUE   0x01
 
#define TISCI_BOARDCFG_SEC_ABI_MAJ_VALUE   0x00
 
#define TISCI_BOARDCFG_SEC_ABI_MIN_VALUE   0x01
 
#define PROCESSOR_ACL_SECONDARY_MASTERS_MAX   (3U)
 
#define PROCESSOR_ACL_ENTRIES   (32U)
 
#define HOST_HIERARCHY_ENTRIES   (32U)
 How many host hierarchy list entries for hosts. More...
 
#define MAX_NUM_EXT_OTP_MMRS   (32U)
 Maximum number of OTP rows allowed by design. More...
 
#define MAX_NUM_DKEK_ALLOWED_HOSTS   (4U)
 
#define TISCI_BOARDCFG_TRACE_DST_UART0   TISCI_BIT(0)
 
#define TISCI_BOARDCFG_TRACE_DST_ITM   TISCI_BIT(2)
 
#define TISCI_BOARDCFG_TRACE_DST_MEM   TISCI_BIT(3)
 
#define TISCI_BOARDCFG_TRACE_SRC_PM   TISCI_BIT(0)
 
#define TISCI_BOARDCFG_TRACE_SRC_RM   TISCI_BIT(1)
 
#define TISCI_BOARDCFG_TRACE_SRC_SEC   TISCI_BIT(2)
 
#define TISCI_BOARDCFG_TRACE_SRC_BASE   TISCI_BIT(3)
 
#define TISCI_BOARDCFG_TRACE_SRC_USER   TISCI_BIT(4)
 
#define TISCI_BOARDCFG_TRACE_SRC_SUPR   TISCI_BIT(5)
 

Macro Definition Documentation

◆ TISCI_BOARDCFG_ABI_MAJ_VALUE

#define TISCI_BOARDCFG_ABI_MAJ_VALUE   0x00

This file contains:

    WARNING!!: Autogenerated file from SYSFW. DO NOT MODIFY!!

System Firmware Source File

Board Configuration Data Structures

◆ TISCI_BOARDCFG_ABI_MIN_VALUE

#define TISCI_BOARDCFG_ABI_MIN_VALUE   0x01

◆ TISCI_BOARDCFG_SEC_ABI_MAJ_VALUE

#define TISCI_BOARDCFG_SEC_ABI_MAJ_VALUE   0x00

◆ TISCI_BOARDCFG_SEC_ABI_MIN_VALUE

#define TISCI_BOARDCFG_SEC_ABI_MIN_VALUE   0x01

◆ PROCESSOR_ACL_SECONDARY_MASTERS_MAX

#define PROCESSOR_ACL_SECONDARY_MASTERS_MAX   (3U)

◆ PROCESSOR_ACL_ENTRIES

#define PROCESSOR_ACL_ENTRIES   (32U)

◆ HOST_HIERARCHY_ENTRIES

#define HOST_HIERARCHY_ENTRIES   (32U)

How many host hierarchy list entries for hosts.

◆ MAX_NUM_EXT_OTP_MMRS

#define MAX_NUM_EXT_OTP_MMRS   (32U)

Maximum number of OTP rows allowed by design.

◆ MAX_NUM_DKEK_ALLOWED_HOSTS

#define MAX_NUM_DKEK_ALLOWED_HOSTS   (4U)

◆ TISCI_BOARDCFG_TRACE_DST_UART0

#define TISCI_BOARDCFG_TRACE_DST_UART0   TISCI_BIT(0)

Traces to UART0 in wakeupss enabled.

◆ TISCI_BOARDCFG_TRACE_DST_ITM

#define TISCI_BOARDCFG_TRACE_DST_ITM   TISCI_BIT(2)

Traces to UART attached to ITM(JTAG) enabled.

◆ TISCI_BOARDCFG_TRACE_DST_MEM

#define TISCI_BOARDCFG_TRACE_DST_MEM   TISCI_BIT(3)

Traces to memory buffer enabled.

◆ TISCI_BOARDCFG_TRACE_SRC_PM

#define TISCI_BOARDCFG_TRACE_SRC_PM   TISCI_BIT(0)

Traces from power management are allowed.

◆ TISCI_BOARDCFG_TRACE_SRC_RM

#define TISCI_BOARDCFG_TRACE_SRC_RM   TISCI_BIT(1)

Traces from resource management are allowed.

◆ TISCI_BOARDCFG_TRACE_SRC_SEC

#define TISCI_BOARDCFG_TRACE_SRC_SEC   TISCI_BIT(2)

Traces from security management are allowed.

◆ TISCI_BOARDCFG_TRACE_SRC_BASE

#define TISCI_BOARDCFG_TRACE_SRC_BASE   TISCI_BIT(3)

Traces from baseport are allowed.

◆ TISCI_BOARDCFG_TRACE_SRC_USER

#define TISCI_BOARDCFG_TRACE_SRC_USER   TISCI_BIT(4)

Traces from user tasks are allowed.

◆ TISCI_BOARDCFG_TRACE_SRC_SUPR

#define TISCI_BOARDCFG_TRACE_SRC_SUPR   TISCI_BIT(5)

Traces from supervisor tasks are allowed.

Function Documentation

◆ __attribute__()

struct tisci_boardcfg_substructure_header __attribute__ ( (__packed__)  )

Variable Documentation

◆ __attribute__

struct UInteger224 __attribute__

UInteger224 (802.1AS, 10.3.4 time-synchronization spanning tree priority vectors )