Set the desired frequency for a clock.
This set the desired frequency for a clock within an allowable range. This message will fail on an enabled clock unless TISCI_MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE is set for the clock. Additionally, if other clocks have their frequency modified due to this message, they also must have the TISCI_MSG_FLAG_CLOCK_ALLOW_FREQ_CHANGE or be disabled.
Calling set frequency on a clock input to the SoC psuedo-device will inform the PMMC of that clock's frequency. Setting a frequency of zero will indicate the clock is disabled.
Calling set frequency on clock outputs from the SoC pseudo-device will function similarly to setting the clock frequency on a device.
- Parameters
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| hdr | TISCI header |
| device | The device ID that the clock is connected to. |
| min_freq_hz | The minimum allowable frequency in Hz. This is the minimum allowable programmed frequency and does not account for clock tolerances and jitter. |
| target_freq_hz | The target clock frequency. The clock will be programmed at a rate as close to this target frequency as possible. |
| max_freq_hz | The maximum allowable frequency in Hz. This is the maximum allowable programmed frequency and does not account for clock tolerances and jitter. The firmware will actually accept any frequency up to but not including max + 1. |
| clk | Each device has its own set of clock inputs. This indexes which clock input to modify. |
If the clock index is 255 or greater, this field should be set to 255 and the full value placed in the clk32 field. This is kept for backwards compatibility with older firmwares.
- Parameters
-
| clk32 | Stores the actual clock index if clk field is set to 255. This field is ignored otherwise. This field can hold the full range of possible clock indexes, but for compatibility with older firmwares should only be used when the index is 255 or greater. |
1.8.20