AM64x MCU+ SDK  08.02.00

Detailed Description

Configures a Navigator Subsystem UDMAP transmit channel.

Configures the non-real-time registers of a Navigator Subsystem UDMAP transmit channel. The channel index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list.

Parameters
hdrStandard TISCI header
valid_paramsBitfield defining validity of tx channel configuration parameters. The tx channel configuration fields are not valid, and will not be used for ch configuration, if their corresponding valid bit is zero. Valid bit usage: 0 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_pause_on_err 1 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype 2 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type 3 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_fetch_size 4 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::txcq_qnum 5 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_priority 6 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_qos 7 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_orderid 8 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority 9 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_filt_einfo 10 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_filt_pswords 11 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_supr_tdpkt 12 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_credit_count 13 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::fdepth 14 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_burst_size 15 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::tx_tdtype 16 - Valid bit for tisci_msg_rm_udmap_tx_ch_cfg_req::extended_ch_type
nav_idSoC device ID of Navigator Subsystem where tx channel is located
indexUDMAP transmit channel index.
tx_pause_on_errUDMAP transmit channel pause on error configuration to be programmed into the tx_pause_on_err field of the channel's TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_DISABLED TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_ENABLED

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_filt_einfoUDMAP transmit channel extended packet information passing configuration to be programmed into the tx_filt_einfo field of the channel's TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_EINFO_DISABLED TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_EINFO_ENABLED

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_filt_pswordsUDMAP transmit channel protocol specific word passing configuration to be programmed into the tx_filt_pswords field of the channel's TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_PSWORDS_DISABLED TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_PSWORDS_ENABLED

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_atypeUDMAP transmit channel non Ring Accelerator access pointer interpretation configuration to be programmed into the tx_atype field of the channel's TCHAN_TCFG register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_PHYS TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_INTERMEDIATE TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VIRTUAL TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_NON_COHERENT

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_chan_typeUDMAP transmit channel functional channel type and work passing mechanism configuration to be programmed into the tx_chan_type field of the channel's TCHAN_TCFG register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_PACKET TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_REF TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_VAL TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_REF TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_VAL

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_supr_tdpktUDMAP transmit channel teardown packet generation suppression configuration to be programmed into the tx_supr_tdpkt field of the channel's TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_TX_CH_SUPPRESS_TD_DISABLED TISCI_MSG_VALUE_RM_UDMAP_TX_CH_SUPPRESS_TD_ENABLED

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_fetch_sizeUDMAP transmit channel number of 32-bit descriptor words to fetch configuration to be programmed into the tx_fetch_size field of the channel's TCHAN_TCFG register. The user must make sure to set the maximum word count that can pass through the channel for any allowed descriptor type. Cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_MAX

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_credit_countUDMAP transmit channel transfer request credit count configuration to be programmed into the count field of the TCHAN_TCREDIT register. Specifies how many credits for complete TRs are available. This field is only used when configuring a transmit channel of external type and cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_TX_CH_CREDIT_CNT_MAX

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
txcq_qnumUDMAP transmit channel completion queue configuration to be programmed into the txcq_qnum field of the TCHAN_TCQ register. The specified completion queue must be assigned to the host, or a subordinate of the host, requesting configuration of the transmit channel.

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_priorityUDMAP transmit channel transmit priority value to be programmed into the priority field of the channel's TCHAN_TPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_MAX.

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_qosUDMAP transmit channel transmit qos value to be programmed into the qos field of the channel's TCHAN_TPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_MAX.

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_orderidUDMAP transmit channel bus order id value to be programmed into the orderid field of the channel's TCHAN_TPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_MAX.

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
fdepthUDMAP transmit channel FIFO depth configuration to be programmed into the fdepth field of the TCHAN_TFIFO_DEPTH register. Sets the number of Tx FIFO bytes which are allowed to be stored for the channel. This field is not supported for external channels. The TISCI message is rejected if a non-zero, valid, value is provided during external channel configuration. Check the UDMAP section of the TRM for restrictions regarding this parameter.

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_sched_priorityUDMAP transmit channel tx scheduling priority configuration to be programmed into the priority field of the channel's TCHAN_TST_SCHED register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_HIGH TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDHIGH TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDLOW TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_LOW

This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params.

Parameters
tx_burst_sizeUDMAP transmit channel burst size configuration to be programmed into the tx_burst_size field of the TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_64_BYTES TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_128_BYTES TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_256_BYTES This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params. This field is not supported on some SoCs. On SoCs that do not support this field the input is quietly ignored even if the valid bit is set.
tx_tdtypeUDMAP transmit channel teardown type configuration to be programmed into the tdtype field of the TCHAN_TCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_TX_CH_TDTYPE_IMMEDIATE TISCI_MSG_VALUE_RM_UDMAP_TX_CH_TDTYPE_WAIT This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID is set in tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params. This field is not supported on some SoCs. On SoCs that do not support this field the input is quietly ignored even if the valid bit is set.
extended_ch_typeExtended Channel Type specific to BCDMA. A value of zero is the NULL extended_ch_type and applies UDMA and PKTDMA which dont have the MMR region layout that BCDMA does. BCDMA will have an extended_ch_type of value 1 assigned to block copy channels. So for BCDMA, supplying extended_ch_type value of 0 gets you access to the split TR TX channels. A value of 1 get you access to the block copy channels.

Data Fields

struct tisci_header hdr
 
uint32_t valid_params
 
uint16_t nav_id
 
uint16_t index
 
uint8_t tx_pause_on_err
 
uint8_t tx_filt_einfo
 
uint8_t tx_filt_pswords
 
uint8_t tx_atype
 
uint8_t tx_chan_type
 
uint8_t tx_supr_tdpkt
 
uint16_t tx_fetch_size
 
uint8_t tx_credit_count
 
uint16_t txcq_qnum
 
uint8_t tx_priority
 
uint8_t tx_qos
 
uint8_t tx_orderid
 
uint16_t fdepth
 
uint8_t tx_sched_priority
 
uint8_t tx_burst_size
 
uint8_t tx_tdtype
 
uint8_t extended_ch_type
 

Field Documentation

◆ hdr

struct tisci_header tisci_msg_rm_udmap_tx_ch_cfg_req::hdr

◆ valid_params

uint32_t tisci_msg_rm_udmap_tx_ch_cfg_req::valid_params

◆ nav_id

uint16_t tisci_msg_rm_udmap_tx_ch_cfg_req::nav_id

◆ index

uint16_t tisci_msg_rm_udmap_tx_ch_cfg_req::index

◆ tx_pause_on_err

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_pause_on_err

◆ tx_filt_einfo

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_filt_einfo

◆ tx_filt_pswords

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_filt_pswords

◆ tx_atype

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_atype

◆ tx_chan_type

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_chan_type

◆ tx_supr_tdpkt

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_supr_tdpkt

◆ tx_fetch_size

uint16_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_fetch_size

◆ tx_credit_count

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_credit_count

◆ txcq_qnum

uint16_t tisci_msg_rm_udmap_tx_ch_cfg_req::txcq_qnum

◆ tx_priority

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_priority

◆ tx_qos

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_qos

◆ tx_orderid

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_orderid

◆ fdepth

uint16_t tisci_msg_rm_udmap_tx_ch_cfg_req::fdepth

◆ tx_sched_priority

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_sched_priority

◆ tx_burst_size

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_burst_size

◆ tx_tdtype

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::tx_tdtype

◆ extended_ch_type

uint8_t tisci_msg_rm_udmap_tx_ch_cfg_req::extended_ch_type