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AM64x MCU+ SDK
08.02.00
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AM64x MCU+ SDK
08.02.00
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Configures a Navigator Subsystem UDMAP receive channel.
Configures the non-real-time registers of a Navigator Subsystem UDMAP receive channel. The channel index must be assigned to the host defined in the TISCI header via the RM board configuration resource assignment range list.
| hdr | Standard TISCI header |
| valid_params | Bitfield defining validity of rx channel configuration parameters. The rx channel configuration fields are not valid, and will not be used for ch configuration, if their corresponding valid bit is zero. Valid bit usage: 0 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_pause_on_err 1 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_atype 2 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type 3 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_fetch_size 4 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rxcq_qnum 5 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_priority 6 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_qos 7 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_orderid 8 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority 9 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::flowid_start 10 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::flowid_cnt 11 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_short 12 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_long 14 - Valid bit for tisci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size |
| nav_id | SoC device ID of Navigator Subsystem where rx channel is located |
| index | UDMAP receive channel index. |
| rx_fetch_size | UDMAP receive channel number of 32-bit descriptor words to fetch configuration to be programmed into the rx_fetch_size field of the channel's RCHAN_RCFG register. The user must make sure to set the maximum word count that can pass through the channel for any allowed descriptor type. Cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_MAX |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rxcq_qnum | UDMAP receive channel completion queue configuration to be programmed into the rxcq_qnum field of the RCHAN_RCQ register. The specified completion queue must be assigned to the host, or a subordinate of the host, requesting configuration of the receive channel. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_priority | UDMAP receive channel receive priority value to be programmed into the priority field of the channel's RCHAN_RPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_MAX. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_qos | UDMAP receive channel receive qos value to be programmed into the qos field of the channel's RCHAN_RPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_MAX. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_orderid | UDMAP receive channel bus order id value to be programmed into the orderid field of the channel's RCHAN_RPRI_CTRL register. This parameter cannot be greater than TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_MAX. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_sched_priority | UDMAP receive channel rx scheduling priority configuration to be programmed into the priority field of the channel's RCHAN_RST_SCHED register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_HIGH TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDHIGH TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDLOW TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_LOW |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| flowid_start | UDMAP receive channel additional flows starting index configuration to program into the flow_start field of the RCHAN_RFLOW_RNG register. Specifies the starting index for flow IDs the receive channel is to make use of beyond the default flow. flowid_start and flowid_cnt must be set as valid and configured together. The starting flow ID set by flowid_cnt must be a flow index within the Navigator Subsystem's subset of flows beyond the default flows statically mapped to receive channels. The additional flows must be assigned to the host, or a subordinate of the host, requesting configuration of the receive channel. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| flowid_cnt | UDMAP receive channel additional flows count configuration to program into the flowid_cnt field of the RCHAN_RFLOW_RNG register. This field specifies how many flow IDs are in the additional contiguous range of legal flow IDs for the channel. flowid_start and flowid_cnt must be set as valid and configured together. Disabling the valid_params field bit for flowid_cnt indicates no flow IDs other than the default are to be allocated and used by the receive channel. flowid_start plus flowid_cnt cannot be greater than the number of receive flows in the receive channel's Navigator Subsystem. The additional flows must be assigned to the host, or a subordinate of the host, requesting configuration of the receive channel. |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_pause_on_err | UDMAP receive channel pause on error configuration to be programmed into the rx_pause_on_err field of the channel's RCHAN_RCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_DISABLED TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_ENABLED |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_atype | UDMAP receive channel non Ring Accelerator access pointer interpretation configuration to be programmed into the rx_atype field of the channel's RCHAN_RCFG register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_PHYS TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_INTERMEDIATE TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VIRTUAL TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_NON_COHERENT |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_chan_type | UDMAP receive channel functional channel type and work passing mechanism configuration to be programmed into the rx_chan_type field of the channel's RCHAN_RCFG register. Can be set to TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_PACKET TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_PACKET_SINGLE_BUF TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_REF TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_VAL TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_REF TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_VAL |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_ignore_short | UDMAP receive channel short packet treatment configuration to be programmed into the rx_ignore_short field of the RCHAN_RCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_EXCEPTION TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_IGNORED |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_ignore_long | UDMAP receive channel long packet treatment configuration to be programmed into the rx_ignore_long field of the RCHAN_RCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_EXCEPTION TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_IGNORED |
This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params.
| rx_burst_size | UDMAP receive channel burst size configuration to be programmed into the rx_burst_size field of the RCHAN_RCFG register. Can be set to: TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_64_BYTES TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_128_BYTES TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_256_BYTES This field is only valid if TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID is set in tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params. This field is not supported on some SoCs. On SoCs that do not support this field the input is quietly ignored even if the valid bit is set. |
Data Fields | |
| struct tisci_header | hdr |
| uint32_t | valid_params |
| uint16_t | nav_id |
| uint16_t | index |
| uint16_t | rx_fetch_size |
| uint16_t | rxcq_qnum |
| uint8_t | rx_priority |
| uint8_t | rx_qos |
| uint8_t | rx_orderid |
| uint8_t | rx_sched_priority |
| uint16_t | flowid_start |
| uint16_t | flowid_cnt |
| uint8_t | rx_pause_on_err |
| uint8_t | rx_atype |
| uint8_t | rx_chan_type |
| uint8_t | rx_ignore_short |
| uint8_t | rx_ignore_long |
| uint8_t | rx_burst_size |
| struct tisci_header tisci_msg_rm_udmap_rx_ch_cfg_req::hdr |
| uint32_t tisci_msg_rm_udmap_rx_ch_cfg_req::valid_params |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::nav_id |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::index |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_fetch_size |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::rxcq_qnum |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_priority |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_qos |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_orderid |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_sched_priority |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::flowid_start |
| uint16_t tisci_msg_rm_udmap_rx_ch_cfg_req::flowid_cnt |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_pause_on_err |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_atype |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_chan_type |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_short |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_ignore_long |
| uint8_t tisci_msg_rm_udmap_rx_ch_cfg_req::rx_burst_size |
1.8.20