AM64x MCU+ SDK  08.02.00
icss_dlr.h
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32 
33 #ifndef ICSS_DLR_H_
34 #define ICSS_DLR_H_
35 
36 /* ========================================================================== */
37 /* Include Files */
38 /* ========================================================================== */
39 #include <stdint.h>
41 #include <kernel/dpl/ClockP.h>
42 #include <kernel/dpl/HwiP.h>
43 
44 #ifdef TEST_DEBUG
45 #include "testing.h"
46 #endif
47 
48 /* ========================================================================== */
49 /* Macros & Typedefs */
50 /* ========================================================================== */
51 /*#define DLR_DEBUG*/
52 
54 /*#define IS_A_DLR_SUPERVISOR*/
55 
56 #define DEFAULT_DLR_PACKET_SIZE 60
57 
58 #define ETHERNET_FRAME_SIZE_60 60
59 
61 #define IEP_WD_PRE_DIV_10US 2000
62 
64 #define PORT0_WATCH_DOG_ID 0 /*PD_WD*/
65 
66 #define PORT1_WATCH_DOG_ID 1 /*PDI_WD*/
67 
68 #define IS_A_LINK_STATUS_FRAME DLR_TRUE
69 #define IS_A_NEIGHBOR_STAT_FRAME DLR_FALSE
70 
71 /*Generic flags*/
72 #define BOTH_LINKS_UP 0x0
73 #define PORT0_IS_DOWN 0x2
74 #define PORT1_IS_DOWN 0x1
75 #define BOTH_LINKS_DOWN 0x3
76 
77 /*PRUSS INTC Mask for PRU EVENT 5*/
78 #define PORT0_WD_ISR_MASK 0x2000000
79 /*PRUSS INTC Mask for PRU EVENT 5*/
80 #define PORT1_WD_ISR_MASK 0x4000000
81 
86 #define PDI_WD_TRIGGER_RX_SOF (0 << 4)
87 
92 #define PDI_WD_TRIGGER_LATCH_IN (1 << 4)
93 
98 #define PDI_WD_TRIGGER_SYNC0_OUT (2 << 4)
99 
104 #define PDI_WD_TRIGGER_SYNC1_OUT (3 << 4)
105 
106 #ifdef DLR_DEBUG
107 #define MAX_EVENTS_CAPTURED 1000
108 
109 /*DLR events for debugging*/
110 #define LINK1_BREAK 1
111 #define LINK2_BREAK 2
112 #define BOTH_LINK_DISABLED 3
113 #define EMPTY_SIGNON_FRAME_RCVD 4
114 #define COMPLETE_SIGNON_FRAME_RCVD 5
115 
116 #define RING_FAULT_RCVD_PORT0 6
117 #define RING_FAULT_RCVD_PORT1 7
118 
119 #define RING_FAULT_TRANSITION_PORT0 8
120 #define RING_FAULT_TRANSITION_PORT1 9
121 
122 #define RING_NORMAL_TRANSITION_PORT0 10
123 #define RING_NORMAL_TRANSITION_PORT1 11
124 
125 #define START_TIMER0 12
126 #define START_TIMER1 13
127 
128 #define NCRES_RCVD_PORT0 14
129 #define NCRES_RCVD_PORT1 15
130 
131 #define NCREQ_RCVD_PORT0 16
132 #define NCREQ_RCVD_PORT1 17
133 
134 #define LOCFAULT_RCVD_PORT0 18
135 #define LOCFAULT_RCVD_PORT1 19
136 
137 #define BEACON0_MISSED_FAULT 20
138 #define BEACON1_MISSED_FAULT 21
139 #define BEACON0_MISSED_NORMAL 22
140 #define BEACON1_MISSED_NORMAL 23
141 
142 #define LINK1_FAULT_BREAK 24
143 #define LINK2_FAULT_BREAK 25
144 
145 #define LINK1_NORMAL_BREAK 27
146 #define LINK2_NORMAL_BREAK 28
147 
148 #define NEIGHBOR_TIMEOUT_PORT0_RETRY 29
149 #define NEIGHBOR_TIMEOUT_PORT1_RETRY 30
150 #define NEIGHBOR_TIMEOUT_PORT0_MAX 31
151 #define NEIGHBOR_TIMEOUT_PORT1_MAX 32
152 
153 #define DLR_RESET_MACHINE 33
154 
155 #define BEACON0_MISSED 34
156 #define BEACON1_MISSED 35
157 
158 #define STOP_BOTH_TIMERS_PORT0 36
159 #define STOP_BOTH_TIMERS_PORT1 37
160 
161 #define PORT0_BEACON_STALL 38
162 #define PORT1_BEACON_STALL 39
163 #endif
164 
166 #define DEFAULT_BEACON_INTERVAL_VARIABLE 400 /*in microseconds*/
167 #define DEFAULT_BEACON_TIMEOUT_VARIABLE (DEFAULT_BEACON_INTERVAL_VARIABLE * 4) /*in microseconds*/
168 
170 #define DEFAULT_NEIGHBOR_TIMEOUT_INTERVAL 200 /*in milliseconds*/
171 
173 #define DEFAULT_DLR_PERIODIC_INTERVAL 100 /*in milliseconds*/
174 
176 #define MAX_NUM_RETRIES 2
177 
179 #define BEACON_CPU_STALL_THRESHOLD 4
180 
184 #define DLR_DEFAULT_CAPABILITIES (1 << 7) | (1 << 1)
185 
186 /*DLR Packet Generation Offsets*/
187 #define DLR_SIGNON_FRAME_SIZE ICSS_EMAC_MAXMTU
188 
189 #define DLR_COMMON_FRAME_HEADER_SIZE 18
190 #define DLR_COMMON_FRAME_OFFSET 12
191 
193 #define ICSS_DLR_PORT0_INT_FLAG 0x200000
194 
195 #define ICSS_DLR_PORT1_INT_FLAG 0x400000
196 
198 #define DLR_DMTIMER4_ID 3
199 
200 #define DLR_DMTIMER5_ID 4
201 
202 typedef struct dlr_Config_s *EIP_DLRHandle;
203 
207 typedef enum
208 {
214  NODE_NORMAL = 2
219 typedef enum
220 {
224  RING_FAULT = 2
226 
230 typedef enum
231 {
235  RING_TOP = 1
237 
241 typedef enum
242 {
252  RAPID_FAULT = 4
254 
258 typedef enum
259 {
260  /*indicates the node is functioning as a backup*/
262  /*indicates the device is functioning as the active ring supervisor*/
264  /*indicates the device is functioning as a normal ring node*/
266  /*indicates the device is operating in a non-DLR topology*/
267  NON_DLR = 3,
271 
273 
274 /* ========================================================================== */
275 /* Structure Declarations */
276 /* ========================================================================== */
277 
281 typedef struct
282 {
284  uint8_t MAC[6];
286  uint8_t numExceptions;
287 
288 } exceptionList;
289 
293 typedef struct
294 {
296  uint8_t node_state;
298  uint8_t ring_state;
300  uint8_t topology;
302  uint8_t status;
304  uint8_t superStatus;
305 
307 
311 typedef struct
312 {
313 
317  uint8_t superEnable;
319  uint32_t beaconInterval;
321  uint32_t beaconTimeout;
322 
324  uint16_t vLanId;
325 
327  uint8_t supPrecedence;
328 
329 } superConfig;
330 
334 typedef struct
335 {
336 
338  uint8_t supMACAddress[6];
339 
341  uint32_t supIPAddress;
342 
344 
349 typedef struct
350 {
352  uint32_t ipAddr;
354  uint8_t macAddr[6];
355 
357  uint16_t deviceNum;
359 
363 typedef struct
364 {
365  uint32_t ipAddr;
366  uint8_t macAddr[6];
368 
372 typedef struct
373 {
380 
381 #ifdef IS_A_DLR_SUPERVISOR
382 
383  lastActiveNode activeNode[2];
384 #endif
385 
396  uint32_t dlrCapabilities;
397 
400 
405 
407  uint8_t port0IntNum;
408 
410  uint8_t port1IntNum;
411 
414 
417 
418 #ifdef IS_A_DLR_SUPERVISOR
419 
420  uint32_t numRingFaultsPowerUp;
421 
423  uint16_t ringParticipantsCount;
424 
426  protocolParticipants **ringNodes;
427 #endif
428 
429 } dlrStruct;
430 
431 
432 typedef struct dlr_Config_s
433 {
436  uint8_t macId[6];
437  /* MAC ID passed to ICSS-EMAC during ICSS-EMAC initialization*/
440  uint32_t deviceIP;
442  uint32_t sequenceID;
447  /*Clock handle for DLR periodic processing*/
450  uint8_t dlrEmptyFrame[DEFAULT_DLR_PACKET_SIZE];
452  uint8_t checkForLoop;
455  uint8_t pktSendCounter;
456  uint8_t ISRcountPort[ICSS_EMAC_MAX_PORTS_PER_INSTANCE];
457 } dlr_Config;
458 
459 /* ========================================================================== */
460 /* Function Declarations */
461 /* ========================================================================== */
462 
474 void EIP_DLR_init(EIP_DLRHandle dlrHandle);
489 void EIP_DLR_start(EIP_DLRHandle dlrHandle) ;
497 void EIP_DLR_stop(EIP_DLRHandle dlrHandle);
504 void EIP_DLR_port0ISR(uintptr_t arg);
511 void EIP_DLR_port1ISR(uintptr_t arg);
518 void EIP_DLR_beaconTimeoutISR_P0(uintptr_t arg);
519 
526 void EIP_DLR_beaconTimeoutISR_P1(uintptr_t arg);
527 
535 void EIP_DLR_port0ProcessLinkBrk(uint8_t linkStatus, void *arg2);
543 void EIP_DLR_port1ProcessLinkBrk(uint8_t linkStatus, void *arg2);
568 void EIP_DLR_addVlanID(uint8_t *src, uint16_t vlanID);
583 void EIP_DLR_genNCReqFrame(EIP_DLRHandle dlrHandle, uint8_t *src,
584  uint8_t sourcePort);
598 void EIP_DLR_genNCResFrame(uint8_t *src, uint8_t sourcePort, uint8_t reqSrcPort,
599  uint32_t sequenceId);
614 void EIP_DLR_genNeighborLinkStatFrame(EIP_DLRHandle dlrHandle, uint8_t *src,
615  uint8_t sourcePort,
616  uint8_t linkOrNeighbor, uint8_t linkStatus);
625 void EIP_DLR_initDLRFrameHeader(uint8_t *src, uint8_t *header);
626 
635 void EIP_DLR_addSignOnNumNodes(uint8_t *src, uint16_t numNodes);
645 void EIP_DLR_processDLRFrame(EIP_DLRHandle dlrHandle, uint8_t *pktBuffer,
646  uint8_t portNum, uint16_t size);
698 int32_t EIP_DLR_isrInit(EIP_DLRHandle dlrHandle);
709 void EIP_DLR_periodicProcessing(ClockP_Object *obj, void *userArg);
710 
711 #ifdef DLR_DEBUG
712 void genSeqOfEvents(uint8_t event);
713 #endif
714 
724 void EIP_DLR_addToExceptionList(EIP_DLRHandle dlrHandle, uint8_t *macId);
735 
746 uint8_t EIP_DLR_checkSupervisorException(uint8_t *macId,
747  EIP_DLRHandle dlrHandle);
756 void EIP_DLR_addModuleIPAddress(EIP_DLRHandle dlrHandle, uint32_t newIP);
757 
765 
773 void EIP_DLR_enable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id);
774 
782 void EIP_DLR_disable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id);
783 
793  uint16_t periodInMicroSec, uint8_t id);
802 
806 #endif /* ICSS_DLR_H_ */
dlr_Config::dlrObj
dlrStruct * dlrObj
Definition: icss_dlr.h:434
superConfig::vLanId
uint16_t vLanId
Definition: icss_dlr.h:324
dlrStateMachineVar
State machine variables, part of DLR Object and L2 implementation.
Definition: icss_dlr.h:294
dlr_Config::dlrPeriodicTimerObject
ClockP_Object dlrPeriodicTimerObject
Definition: icss_dlr.h:448
dlrStruct::beaconTimeoutIntNum_P0
uint8_t beaconTimeoutIntNum_P0
Definition: icss_dlr.h:413
ICSS_EMAC_Handle
struct ICSS_EMAC_Config_s * ICSS_EMAC_Handle
Alias for ICSS EMAC Handle containing base addresses and modules.
Definition: icss_emac.h:368
size
uint16_t size
Definition: tisci_boardcfg.h:1
EIP_DLR_setTimeout_WD_IEP
void EIP_DLR_setTimeout_WD_IEP(EIP_DLRHandle dlrHandle, uint16_t periodInMicroSec, uint8_t id)
Set the timeout value in watchdog.
EIP_DLR_beaconTimeoutISR_P1
void EIP_DLR_beaconTimeoutISR_P1(uintptr_t arg)
ISR for beacon timeout for Port 1.
EIP_DLR_beaconTimeoutISR_P0
void EIP_DLR_beaconTimeoutISR_P0(uintptr_t arg)
ISR for beacon timeout for Port 0.
EIP_DLR_stop
void EIP_DLR_stop(EIP_DLRHandle dlrHandle)
API to stop the DLR driver Halt DLR. Calling this disables DLR on the device.
superConfig::supPrecedence
uint8_t supPrecedence
Definition: icss_dlr.h:327
nwStatus
nwStatus
network status : possible values for Attribute ID 2
Definition: icss_dlr.h:242
dlr_Config::tracePktIntervalCount
uint32_t tracePktIntervalCount
Definition: icss_dlr.h:453
EIP_DLR_enable_WD_IEP
void EIP_DLR_enable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Enable the IEP Watch dog timers.
FEATURE_UNSUPPORTED
@ FEATURE_UNSUPPORTED
Definition: icss_dlr.h:270
dlrStruct::port0IntNum
uint8_t port0IntNum
Definition: icss_dlr.h:407
dlr_Config::pruicssHandle
PRUICSS_Handle pruicssHandle
Definition: icss_dlr.h:438
NODE_NORMAL
@ NODE_NORMAL
Definition: icss_dlr.h:214
activeSuperAddr::supIPAddress
uint32_t supIPAddress
Definition: icss_dlr.h:341
ClockP_Object
Opaque clock object used with the clock APIs.
Definition: ClockP.h:59
nodeState
nodeState
node state machine states
Definition: icss_dlr.h:208
dlr_Config::checkForLoop
uint8_t checkForLoop
Definition: icss_dlr.h:452
EIP_DLR_neighborTimeoutISR1
void EIP_DLR_neighborTimeoutISR1(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 1.
EIP_DLR_processDLRFrame
void EIP_DLR_processDLRFrame(EIP_DLRHandle dlrHandle, uint8_t *pktBuffer, uint8_t portNum, uint16_t size)
Processes a sign on and Neighbor check request frame.
BACKUP_NODE
@ BACKUP_NODE
Definition: icss_dlr.h:261
EIP_DLRHandle
struct dlr_Config_s * EIP_DLRHandle
Definition: icss_dlr.h:202
DEFAULT_DLR_PACKET_SIZE
#define DEFAULT_DLR_PACKET_SIZE
Definition: icss_dlr.h:56
NODE_IDLE
@ NODE_IDLE
Definition: icss_dlr.h:210
lastActiveNode::deviceNum
uint16_t deviceNum
Definition: icss_dlr.h:357
EIP_DLR_isrInit
int32_t EIP_DLR_isrInit(EIP_DLRHandle dlrHandle)
UNEXPECTED_LOOP
@ UNEXPECTED_LOOP
Definition: icss_dlr.h:248
icss_emac.h
dlr_Config::deviceIP
uint32_t deviceIP
Definition: icss_dlr.h:440
EIP_DLR_port1ProcessLinkBrk
void EIP_DLR_port1ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port1.
dlrStruct::port1IntObject
HwiP_Object port1IntObject
Definition: icss_dlr.h:402
NORMAL_STAT
@ NORMAL_STAT
Definition: icss_dlr.h:244
EIP_DLR_genNCReqFrame
void EIP_DLR_genNCReqFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort)
supervisorStatus
supervisorStatus
device role: possible values for Attribute ID 3
Definition: icss_dlr.h:259
dlrStruct::beaconTimeoutIntP0Object
HwiP_Object beaconTimeoutIntP0Object
Definition: icss_dlr.h:403
dlrStruct::addr
activeSuperAddr addr
Definition: icss_dlr.h:377
exceptionList::numExceptions
uint8_t numExceptions
Definition: icss_dlr.h:286
EIP_DLR_setDefaultValue
void EIP_DLR_setDefaultValue(EIP_DLRHandle dlrHandle)
dlr_Config::emacHandle
ICSS_EMAC_Handle emacHandle
Definition: icss_dlr.h:435
EIP_DLR_genNeighborLinkStatFrame
void EIP_DLR_genNeighborLinkStatFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort, uint8_t linkOrNeighbor, uint8_t linkStatus)
EIP_DLR_addToExceptionList
void EIP_DLR_addToExceptionList(EIP_DLRHandle dlrHandle, uint8_t *macId)
RING_NORMAL
@ RING_NORMAL
Definition: icss_dlr.h:222
dlrStruct::beaconTimeoutIntP1Object
HwiP_Object beaconTimeoutIntP1Object
Definition: icss_dlr.h:404
EIP_DLR_addSignOnNumNodes
void EIP_DLR_addSignOnNumNodes(uint8_t *src, uint16_t numNodes)
EIP_DLR_switchToNormal
void EIP_DLR_switchToNormal(EIP_DLRHandle dlrHandle)
dlrStruct::port1IntNum
uint8_t port1IntNum
Definition: icss_dlr.h:410
ClockP.h
RING_NODE
@ RING_NODE
Definition: icss_dlr.h:265
RING_TOP
@ RING_TOP
Definition: icss_dlr.h:235
EIP_DLR_neighborTimeoutISR0
void EIP_DLR_neighborTimeoutISR0(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 0.
dlr_Config::sequenceID
uint32_t sequenceID
Definition: icss_dlr.h:442
RING_FAULT_STAT
@ RING_FAULT_STAT
Definition: icss_dlr.h:246
dlrStruct::beaconTimeoutIntNum_P1
uint8_t beaconTimeoutIntNum_P1
Definition: icss_dlr.h:416
superConfig
Supervisor configuration. Attribute ID 4.
Definition: icss_dlr.h:312
dlrStruct::SMVariables
dlrStateMachineVar SMVariables
Definition: icss_dlr.h:379
EIP_DLR_resetStateMachine
void EIP_DLR_resetStateMachine(EIP_DLRHandle dlrHandle)
Initialize the state machine when it goes back to idle state.
dlrStruct::dlrCapabilities
uint32_t dlrCapabilities
Definition: icss_dlr.h:396
HwiP.h
EIP_DLR_setDivider_WD_IEP
void EIP_DLR_setDivider_WD_IEP(EIP_DLRHandle dlrHandle)
Sets the clock divider to 1us for IEP watch dog timers.
ringState
ringState
ring state values
Definition: icss_dlr.h:220
dlrStateMachineVar::superStatus
uint8_t superStatus
Definition: icss_dlr.h:304
EIP_DLR_start
void EIP_DLR_start(EIP_DLRHandle dlrHandle)
API to start the DLR driver Calling this enables DLR on the device.
protocolParticipants::ipAddr
uint32_t ipAddr
Definition: icss_dlr.h:365
dlrStruct::supConfig
superConfig supConfig
Definition: icss_dlr.h:375
EIP_DLR_disable_WD_IEP
void EIP_DLR_disable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Disable the IEP Watch dog timers.
NON_DLR
@ NON_DLR
Definition: icss_dlr.h:267
dlr_Config
Definition: icss_dlr.h:433
EIP_DLR_checkSupervisorException
uint8_t EIP_DLR_checkSupervisorException(uint8_t *macId, EIP_DLRHandle dlrHandle)
EIP_DLR_init
void EIP_DLR_init(EIP_DLRHandle dlrHandle)
API to initialize the DLR driver.
EIP_DLR_clearExceptionList
void EIP_DLR_clearExceptionList(EIP_DLRHandle dlrHandle)
dlrStateMachineVar::status
uint8_t status
Definition: icss_dlr.h:302
EIP_DLR_port1ISR
void EIP_DLR_port1ISR(uintptr_t arg)
Fast ISR for Port 1, bypasses the buffer copy and NDK.
EIP_DLR_switchToFault
void EIP_DLR_switchToFault(EIP_DLRHandle dlrHandle)
dlrStateMachineVar::topology
uint8_t topology
Definition: icss_dlr.h:300
mode
char mode[32]
Definition: tisci_pm_core.h:1
exceptionList
List of MAC ID's which are exempted from Learning, this is for DLR implementation.
Definition: icss_dlr.h:282
nwTopology
nwTopology
network topology : possible values for Attribute ID 1
Definition: icss_dlr.h:231
NODE_FAULT
@ NODE_FAULT
Definition: icss_dlr.h:212
dlrStruct::activeSuperPred
uint8_t activeSuperPred
Definition: icss_dlr.h:399
protocolParticipants
IP and MAC of the Ring devices. Attribute ID 9.
Definition: icss_dlr.h:364
dlrStruct::port0IntObject
HwiP_Object port0IntObject
Definition: icss_dlr.h:401
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
RAPID_FAULT
@ RAPID_FAULT
Definition: icss_dlr.h:252
superConfig::beaconTimeout
uint32_t beaconTimeout
Definition: icss_dlr.h:321
lastActiveNode
Last active node at the end of the chain Class for Attributes 6 and 7.
Definition: icss_dlr.h:350
EIP_DLR_initDLRFrameHeader
void EIP_DLR_initDLRFrameHeader(uint8_t *src, uint8_t *header)
lastActiveNode::ipAddr
uint32_t ipAddr
Definition: icss_dlr.h:352
dlr_Config::exclusionList
exceptionList * exclusionList
Definition: icss_dlr.h:444
dlr_Config::pktSendCounter
uint8_t pktSendCounter
Definition: icss_dlr.h:455
RING_FAULT
@ RING_FAULT
Definition: icss_dlr.h:224
EIP_DLR_addModuleIPAddress
void EIP_DLR_addModuleIPAddress(EIP_DLRHandle dlrHandle, uint32_t newIP)
dlrStateMachineVar::node_state
uint8_t node_state
Definition: icss_dlr.h:296
superConfig::beaconInterval
uint32_t beaconInterval
Definition: icss_dlr.h:319
ACTIVE_RING_SUPERVISOR
@ ACTIVE_RING_SUPERVISOR
Definition: icss_dlr.h:263
EIP_DLR_periodicProcessing
void EIP_DLR_periodicProcessing(ClockP_Object *obj, void *userArg)
superConfig::superEnable
uint8_t superEnable
Definition: icss_dlr.h:317
dlrStruct
DLR parent structure through which all other structures can be accessed.
Definition: icss_dlr.h:373
EIP_DLR_set_pdi_wd_trigger_mode
void EIP_DLR_set_pdi_wd_trigger_mode(EIP_DLRHandle dlrHandle, uint32_t mode)
Set the PDI WD trigger mode.
EIP_DLR_deinit
void EIP_DLR_deinit(EIP_DLRHandle dlrHandle)
API to de-initialize the DLR driver.
PRUICSS_Handle
struct PRUICSS_Config_s * PRUICSS_Handle
A handle that is returned from a PRUICSS_open() call. This handle is required for calling other APIs.
Definition: pruicss/g_v0/pruicss.h:234
activeSuperAddr
Supervisor address, part of DLR Object. Attribute ID 10.
Definition: icss_dlr.h:335
dlr_Config::stateMachineCount
uint32_t stateMachineCount
Definition: icss_dlr.h:454
dlrStateMachineVar::ring_state
uint8_t ring_state
Definition: icss_dlr.h:298
EIP_DLR_port0ISR
void EIP_DLR_port0ISR(uintptr_t arg)
Fast ISR for Port 0, bypasses the buffer copy and NDK.
PARTIAL_FAULT
@ PARTIAL_FAULT
Definition: icss_dlr.h:250
EIP_DLR_genNCResFrame
void EIP_DLR_genNCResFrame(uint8_t *src, uint8_t sourcePort, uint8_t reqSrcPort, uint32_t sequenceId)
EIP_DLR_port0ProcessLinkBrk
void EIP_DLR_port0ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port0.
EIP_DLR_dRAMInit
void EIP_DLR_dRAMInit(EIP_DLRHandle dlrHandle)
EIP_DLR_addVlanID
void EIP_DLR_addVlanID(uint8_t *src, uint16_t vlanID)
ICSS_EMAC_MAX_PORTS_PER_INSTANCE
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE
Maximum number of Ports in a single ICSS
Definition: icss_emac.h:66
LINEAR_TOP
@ LINEAR_TOP
Definition: icss_dlr.h:233