Detailed Description

DLR parent structure through which all other structures can be accessed.

Data Fields
superConfig	supConfig

activeSuperAddr	addr

dlrStateMachineVar	SMVariables

uint32_t	dlrCapabilities

uint8_t	activeSuperPred

HwiP_Object	port0IntObject

HwiP_Object	port1IntObject

HwiP_Object	beaconTimeoutIntP0Object

HwiP_Object	beaconTimeoutIntP1Object

uint8_t	port0IntNum

uint8_t	port1IntNum

uint8_t	beaconTimeoutIntNum_P0

uint8_t	beaconTimeoutIntNum_P1

Field Documentation

◆ supConfig

superConfig dlrStruct::supConfig

Supervisor config. Attribute ID 4

◆ addr

activeSuperAddr dlrStruct::addr

Supervisor address. Attribute ID 10

◆ SMVariables

dlrStateMachineVar dlrStruct::SMVariables

State Machine variables. Attributes 1 through 3

◆ dlrCapabilities

uint32_t dlrStruct::dlrCapabilities

DLR Capabilities, flag The Map is as follows 0 : Announce Based Ring Node 1 : Beacon based Ring Node 2-4 : Reserved 5 : Supervisor capable 6 : Redundant capable 7 : Flush Table frame capable 8-31 : Reserved DLR Capabilities of the device. Attribute ID 12

◆ activeSuperPred

uint8_t dlrStruct::activeSuperPred

Active Supervisor precedence. Attribute ID 11

◆ port0IntObject

HwiP_Object dlrStruct::port0IntObject

◆ port1IntObject

HwiP_Object dlrStruct::port1IntObject

◆ beaconTimeoutIntP0Object

HwiP_Object dlrStruct::beaconTimeoutIntP0Object

◆ beaconTimeoutIntP1Object

HwiP_Object dlrStruct::beaconTimeoutIntP1Object

◆ port0IntNum

uint8_t dlrStruct::port0IntNum

DLR Port 0 Interrupt number for ARM

◆ port1IntNum

uint8_t dlrStruct::port1IntNum

DLR Port 1 Interrupt number for ARM

◆ beaconTimeoutIntNum_P0

uint8_t dlrStruct::beaconTimeoutIntNum_P0

DLR interrupt for beacon timeout for Port 0

◆ beaconTimeoutIntNum_P1

uint8_t dlrStruct::beaconTimeoutIntNum_P1

DLR interrupt for beacon timeout for Port 1