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AM62x MCU+ SDK
10.01.00
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AM62x MCU+ SDK
10.01.00
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This file contains AM62x specific data structures for safety checkers.
Go to the source code of this file.
Macros | |
| #define | SAFETY_CHECKERS_PM_PSC_BASE_ADDRESS (0x400000UL) |
| PLL and PSC base addresses. More... | |
| #define | SAFETY_CHECKERS_PM_PLL_CFG_BASE_ADDRESS (0x680000UL) |
| #define | SAFETY_CHECKERS_PM_MCU_PLL_CFG_BASE_ADDRESS (0x4040000UL) |
| #define | SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM (0x02U) |
| PD STAT and MD STAT registers details for PSC. More... | |
| #define | SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM (0x0AU) |
| #define | SAFETY_CHECKERS_PM_PD_STAT_NUM (0x0AU) |
| #define | SAFETY_CHECKERS_PM_MD_STAT_NUM (0x34U) |
| #define | SAFETY_CHECKERS_PM_PLL0_LENGTH (0xA8U) |
| PLL register details. More... | |
| #define | SAFETY_CHECKERS_PM_PLL1_LENGTH (0x9CU) |
| #define | SAFETY_CHECKERS_PM_PLL2_LENGTH (0xA8U) |
| #define | SAFETY_CHECKERS_PM_PLL8_LENGTH (0x84U) |
| #define | SAFETY_CHECKERS_PM_PLL12_LENGTH (0x84U) |
| #define | SAFETY_CHECKERS_PM_PLL15_LENGTH (0x88U) |
| #define | SAFETY_CHECKERS_PM_PLL16_LENGTH (0x84U) |
| #define | SAFETY_CHECKERS_PM_PLL17_LENGTH (0x84U) |
| #define | SAFETY_CHECKERS_PM_MCU_PLL0_LENGTH (0x94U) |
| #define | TIFS_CHECKER_FWL_MAX_NUM (0x10U) |
| Maximum number of firewalls that can be accessed. More... | |
| #define | SAFETY_CHECKERS_PM_PSC_REGDUMP_SIZE |
| Total register dump size for PSC. This has been calculated by the addition of PD STAT and MD STAT registers. More... | |
| #define | SAFETY_CHECKERS_PM_PLL_REGDUMP_SIZE (137U) |
| Total register dump size for PLL. This has been calculated by iterating through each element in SafetyCheckers_PmPllData array. Within the loop, another loop calculates the total size by incrementing totalLength until the length indicator matches the corresponding SafetyCheckers_PLL_regOffset in the array. The final result is the total size of register offsets of each PLLs stored in the totalLength variable. More... | |
| #define | SAFETY_CHECKERS_RM_REGDUMP_SIZE (3107U) |
| Total register dump size for RM. This has been calculated by iterating through each element in gSafetyCheckers_RmRegData array. Within the loop, calculates the total talLength by multiplying the regNum and regArrayLen in the array. The final result is the total size of register array for RM module registers. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_IR (CSL_TIMESYNC_EVENT_ROUTER0_INTR_ROUTER_CFG_BASE) |
| RM IR module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_BA1_IR (CSL_WKUP_MCU_GPIOMUX_INTROUTER0_INTR_ROUTER_CFG_BASE) |
| #define | SAFETY_CHECKERS_RM_BA2_IR (CSL_MAIN_GPIOMUX_INTROUTER0_INTR_ROUTER_CFG_BASE) |
| #define | SAFETY_CHECKERS_RM_BA3_IR (CSL_CMP_EVENT_INTROUTER0_INTR_ROUTER_CFG_BASE) |
| #define | SAFETY_CHECKERS_RM_IR_REG0_NUM (26U) |
| Formula input of IR module to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_IR_REG1_NUM (13U) |
| #define | SAFETY_CHECKERS_RM_IR_REG2_NUM (36U) |
| #define | SAFETY_CHECKERS_RM_IR_REG3_NUM (42U) |
| #define | SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM (2U) |
| Number of registers in IR register group. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_IA_IMAP (CSL_DMASS0_INTAGGR_IMAP_BASE) |
| RM IAIMAP module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_REG0_IA_IMAP (1536U) |
| Formula input of IAIMAP module to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP (1U) |
| Number of registers in IAIMAP register group. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_RA (CSL_DMASS0_BCDMA_RING_BASE) |
| RM RA module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_BA1_RA (CSL_DMASS0_PKTDMA_RING_BASE) |
| #define | SAFETY_CHECKERS_RM_BA2_RA (CSL_DMASS0_RINGACC_CFG_BASE) |
| #define | SAFETY_CHECKERS_RM_RA_REG0_NUM (82U) |
| Formula input of RA module to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_RA_REG1_NUM (150U) |
| #define | SAFETY_CHECKERS_RM_RA_REG2_NUM (20U) |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_RA (3U) |
| Number of registers in RA register group. More... | |
| #define | SAFETY_CHECKERS_RM_RA_SUBMOD1 (5U) |
| #define | SAFETY_CHECKERS_RM_BA0_UDMA_TX (CSL_DMASS0_BCDMA_TCHAN_BASE) |
| RM UDMA TX module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_BA1_UDMA_TX (CSL_DMASS0_PKTDMA_TCHAN_BASE) |
| #define | SAFETY_CHECKERS_RM_REG0_UDMA_TX (22U) |
| Formula input of UDMA TX to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_REG1_UDMA_TX (29U) |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX (5U) |
| Number of registers in UDMA TX register group. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_UDMA_RX (CSL_DMASS0_BCDMA_RCHAN_BASE) |
| RM UDMA RX module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_BA1_UDMA_RX (CSL_DMASS0_PKTDMA_RCHAN_BASE) |
| #define | SAFETY_CHECKERS_RM_REG0_UDMA_RX (28U) |
| Formula input of UDMA RX to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_REG1_UDMA_RX (24U) |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX (4U) |
| Number of registers in UDMA RX register group. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_UDMA_FLW (CSL_DMASS0_PKTDMA_RFLOW_BASE) |
| RM UDMA FLOW module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_REG0_UDMA_FLW (51U) |
| Formula input of UDMA FLOW to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW (1U) |
| Number of registers in UDMA FLOW register group. More... | |
| #define | SAFETY_CHECKERS_RM_BA0_UDMA_GCFG (CSL_DMASS0_BCDMA_GCFG_BASE) |
| RM UDMA GCFG module base addresses. More... | |
| #define | SAFETY_CHECKERS_RM_BA1_UDMA_GCFG (CSL_DMASS0_PKTDMA_GCFG_BASE) |
| #define | SAFETY_CHECKERS_RM_REG0_UDMA_GCFG (1U) |
| Formula input of UDMA GCFG to read relevant registers from register group. More... | |
| #define | SAFETY_CHECKERS_RM_REG1_UDMA_GCFG (1U) |
| #define | SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG (13U) |
| Number of registers in UDMA GCFG register group. More... | |
| #define | SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG (14U) |
Variables | |
| static uint32_t | gSafetyCheckers_PmPllRegOffset0 [] |
| This defines the array holding register offset values for the each PLL's. More... | |
| static uint32_t | gSafetyCheckers_PmPllRegOffset1 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset2 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset8 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset12 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset15 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset16 [] |
| static uint32_t | gSafetyCheckers_PmPllRegOffset17 [] |
| static uint32_t | gSafetyCheckers_PmMcuPllRegOffset0 [] |
| static SafetyCheckers_PmPllData | gSafetyCheckers_PmPllData [] |
| Structure defines PLL register base address and the total length of registers. More... | |
| static SafetyCheckers_PmPscData | gSafetyCheckers_PmPscData [] |
| Structure defines PSC register base address and the total length of registers. More... | |
| static SafetyCheckers_RmRegData | gSafetyCheckers_RmRegData [] |
| Structure defines RM module register base address and the total length of registers. More... | |
1.8.20