AM62Px MCU+ SDK  11.01.00
udma_ch.h
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32 
48 #ifndef UDMA_CH_H_
49 #define UDMA_CH_H_
50 
51 /* ========================================================================== */
52 /* Include Files */
53 /* ========================================================================== */
54 
55 /* None */
56 
57 #ifdef __cplusplus
58 extern "C" {
59 #endif
60 
61 /* ========================================================================== */
62 /* Macros & Typedefs */
63 /* ========================================================================== */
64 
69 #define UDMA_DMA_CH_INVALID ((uint32_t) 0xFFFF0000U)
70 
74 #define UDMA_DMA_CH_ANY ((uint32_t) 0xFFFF0001U)
75 
79 #define UDMA_DMA_CH_NA ((uint32_t) 0xFFFF0002U)
80 
81 #define UDMA_UTC_ID_INVALID ((uint32_t) 0xFFFF0003U)
82 
83 #define UDMA_MAPPED_GROUP_INVALID ((uint32_t) 0xFFFF0004U)
84 
86 #define UDMA_SYSFW_EXTENDED_CH_TYPE_BCDMA_BLK_CPY ((uint8_t) 1U)
87 
89 #define UDMA_SYSFW_EXTENDED_CH_TYPE_BCDMA_SPLIT_TR_TX ((uint8_t) 0U)
90 
91 
101 #define UDMA_CH_FLAG_TX ((uint32_t) 0x0001U)
102 
103 #define UDMA_CH_FLAG_RX ((uint32_t) 0x0002U)
104 
105 #define UDMA_CH_FLAG_BLK_COPY ((uint32_t) 0x0004U)
106 
107 #define UDMA_CH_FLAG_PDMA ((uint32_t) 0x0008U)
108 
109 #define UDMA_CH_FLAG_PSIL ((uint32_t) 0x0010U)
110 
111 #define UDMA_CH_FLAG_UTC ((uint32_t) 0x0020U)
112 
113 #define UDMA_CH_FLAG_HC ((uint32_t) 0x0040U)
114 
115 #define UDMA_CH_FLAG_UHC ((uint32_t) 0x0080U)
116 
117 #define UDMA_CH_FLAG_MAPPED ((uint32_t) 0x0100U)
118 
119 #define UDMA_CH_FLAG_TR ((uint32_t) 0x0200U)
120 
131 #define UDMA_CH_TYPE_TR_BLK_COPY (UDMA_CH_FLAG_BLK_COPY | \
132  UDMA_CH_FLAG_TX | \
133  UDMA_CH_FLAG_RX)
134 
135 #define UDMA_CH_TYPE_TR_BLK_COPY_HC (UDMA_CH_FLAG_BLK_COPY | \
136  UDMA_CH_FLAG_TX | \
137  UDMA_CH_FLAG_RX | \
138  UDMA_CH_FLAG_HC)
139 
140 #define UDMA_CH_TYPE_TR_BLK_COPY_UHC (UDMA_CH_FLAG_BLK_COPY | \
141  UDMA_CH_FLAG_TX | \
142  UDMA_CH_FLAG_RX | \
143  UDMA_CH_FLAG_UHC)
144 
145 #define UDMA_CH_TYPE_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL)
146 
147 #define UDMA_CH_TYPE_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
148 
149 #define UDMA_CH_TYPE_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
150 
152 #define UDMA_CH_TYPE_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL)
153 
154 #define UDMA_CH_TYPE_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC)
155 
156 #define UDMA_CH_TYPE_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC)
157 
159 #define UDMA_CH_TYPE_PDMA_TX (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA)
160 
161 #define UDMA_CH_TYPE_PDMA_TX_HC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
162 
163 #define UDMA_CH_TYPE_PDMA_TX_UHC (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
164 
166 #define UDMA_CH_TYPE_PDMA_RX (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA)
167 
168 #define UDMA_CH_TYPE_PDMA_RX_HC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC)
169 
170 #define UDMA_CH_TYPE_PDMA_RX_UHC (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC)
171 
172 /* Channel Type to submit TR */
174 #define UDMA_CH_TYPE_TX_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_TR)
175 
176 #define UDMA_CH_TYPE_TX_HC_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC | UDMA_CH_FLAG_TR)
177 
178 #define UDMA_CH_TYPE_TX_UHC_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC | UDMA_CH_FLAG_TR)
179 
181 #define UDMA_CH_TYPE_RX_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_TR)
182 
183 #define UDMA_CH_TYPE_RX_HC_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_HC | UDMA_CH_FLAG_TR)
184 
185 #define UDMA_CH_TYPE_RX_UHC_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_UHC | UDMA_CH_FLAG_TR)
186 
188 #define UDMA_CH_TYPE_PDMA_TX_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_TR)
189 
190 #define UDMA_CH_TYPE_PDMA_TX_HC_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC | UDMA_CH_FLAG_TR)
191 
192 #define UDMA_CH_TYPE_PDMA_TX_UHC_TR (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC | UDMA_CH_FLAG_TR)
193 
195 #define UDMA_CH_TYPE_PDMA_RX_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_TR)
196 
197 #define UDMA_CH_TYPE_PDMA_RX_HC_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_HC | UDMA_CH_FLAG_TR)
198 
199 #define UDMA_CH_TYPE_PDMA_RX_UHC_TR (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PDMA | UDMA_CH_FLAG_UHC | UDMA_CH_FLAG_TR)
200 
206 #define UDMA_CH_TYPE_TX_MAPPED (UDMA_CH_FLAG_TX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
207 
212 #define UDMA_CH_TYPE_RX_MAPPED (UDMA_CH_FLAG_RX | UDMA_CH_FLAG_PSIL | UDMA_CH_FLAG_MAPPED)
213 
220 #define UDMA_CH_TYPE_UTC (UDMA_CH_FLAG_UTC)
221 
229 #define UDMA_PDMA_ES_8BITS ((uint32_t) 0x00U)
230 #define UDMA_PDMA_ES_16BITS ((uint32_t) 0x01U)
231 #define UDMA_PDMA_ES_24BITS ((uint32_t) 0x02U)
232 #define UDMA_PDMA_ES_32BITS ((uint32_t) 0x03U)
233 #define UDMA_PDMA_ES_64BITS ((uint32_t) 0x04U)
234 
235 #define UDMA_PDMA_ES_DONTCARE ((uint32_t) 0x00U)
236 
238 #define UDMA_DRV_CH_OBJ_SIZE (178U)
239 /* ========================================================================== */
240 /* Structure Declarations */
241 /* ========================================================================== */
242 
246 typedef struct
247 {
248  uint32_t chNum;
258  uint32_t peerChNum;
276  uint32_t utcId;
284  uint32_t mappedChGrp;
292  void *appData;
311 } Udma_ChPrms;
312 
316 typedef struct
317 {
318  uint8_t pauseOnError;
320  uint8_t filterEinfo;
322  uint8_t filterPsWords;
324  uint8_t addrType;
327  uint8_t chanType;
329  uint16_t fetchWordSize;
331  uint8_t busPriority;
333  uint8_t busQos;
335  uint8_t busOrderId;
337  uint8_t dmaPriority;
341  uint8_t txCredit;
343  uint16_t fifoDepth;
358  uint8_t burstSize;
377  uint8_t supressTdCqPkt;
384 } Udma_ChTxPrms;
385 
389 typedef struct
390 {
391  uint8_t pauseOnError;
393  uint8_t addrType;
396  uint8_t chanType;
398  uint16_t fetchWordSize;
400  uint8_t busPriority;
402  uint8_t busQos;
404  uint8_t busOrderId;
406  uint8_t dmaPriority;
424  uint8_t flowSopOffset;
431  uint8_t ignoreLongPkts;
443  uint8_t burstSize;
462 } Udma_ChRxPrms;
463 
464 
468 typedef struct
469 {
470  uint8_t pauseOnError;
472  uint8_t addrType;
475  uint8_t chanType;
477  uint16_t fetchWordSize;
479  uint8_t busPriority;
481  uint8_t busQos;
483  uint8_t busOrderId;
485  uint8_t dmaPriority;
489  uint8_t burstSize;
502  uint8_t supressTdCqPkt;
510 #if (UDMA_NUM_UTC_INSTANCE > 0)
511  /* Below fields are applicable only for DRU UTC */
512  uint64_t druOwner;
520  uint32_t druQueueId;
528 #endif
530 
531 
535 typedef struct
536 {
537  uint32_t elemSize;
546  uint32_t elemCnt;
565  uint32_t fifoCnt;
582  uint8_t burst;
590  uint8_t acc32;
598  uint8_t eol;
606  uint8_t isAasrcCh;
611  uint8_t groupMode;
618  uint8_t dmaReqReset;
627  uint8_t lastSlot;
634  uint8_t firstSlot;
641  uint16_t dmaReqMask;
655  uint32_t orderTable0;
669  uint32_t orderTable1;
684 
688 typedef struct
689 {
690  uint32_t packetCnt;
694  uint32_t startedByteCnt;
696 } Udma_ChStats;
697 
698 /* ========================================================================== */
699 /* Function Declarations */
700 /* ========================================================================== */
701 
724 int32_t Udma_chOpen(Udma_DrvHandle drvHandle,
725  Udma_ChHandle chHandle,
726  uint32_t chType,
727  const Udma_ChPrms *chPrms);
728 
741 int32_t Udma_chClose(Udma_ChHandle chHandle);
742 
760 int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms);
761 
781 int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms);
782 
800 int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms);
801 
802 #if defined (BUILD_C7X)
803 
814 void Udma_chDruSubmitTr(Udma_ChHandle chHandle, const CSL_UdmapTR *tr);
815 #endif
816 
833  const Udma_ChPdmaPrms *pdmaPrms);
834 
847 int32_t Udma_chEnable(Udma_ChHandle chHandle);
848 
870 int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout);
871 
885 int32_t Udma_chPause(Udma_ChHandle chHandle);
886 
900 int32_t Udma_chResume(Udma_ChHandle chHandle);
901 
914 uint32_t Udma_chGetNum(Udma_ChHandle chHandle);
915 
925 
935 
945 
956 
969 
979 
996 uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger);
997 
1018 
1041 int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger);
1042 
1065 int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle,
1066  Udma_ChHandle chainedChHandle,
1067  uint32_t trigger);
1068 
1081 int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle,
1082  Udma_ChHandle chainedChHandle);
1083 
1084 /*
1085  * Structure Init functions
1086  */
1094 void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType);
1095 
1103 void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType);
1104 
1112 void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType);
1113 
1121 
1133 int32_t Udma_chRingQueueRaw(Udma_ChHandle chHandle, uint8_t *phyDescMem,
1134  uint64_t noEleCnt);
1135 
1145 int32_t Udma_chRingRingDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries);
1146 
1157 int32_t Udma_chRingDeQueueRaw(Udma_ChHandle chHandle, uint64_t noElem,
1158  uint64_t *eleInRing);
1159 
1169 int32_t Udma_chRingRingRvrDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries);
1170 
1178 
1191 int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats);
1192 
1203 int32_t Udma_chDecStats(Udma_ChHandle chHandle, Udma_ChStats *chStats);
1204 
1214 int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData);
1215 
1225 int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData);
1226 
1235 int32_t Udma_chReset(Udma_ChHandle chHandle);
1236 
1246 int32_t Udma_chGetChanEnStatus(Udma_ChHandle chHandle, uint8_t *chEnableStat);
1247 
1248 /* ========================================================================== */
1249 /* Static Function Definitions */
1250 /* ========================================================================== */
1251 
1252 /* None */
1253 
1254 /* ========================================================================== */
1255 /* Internal/Private Structure Declarations */
1256 /* ========================================================================== */
1257 #if (UDMA_NUM_UTC_INSTANCE > 0)
1258 
1264 typedef struct
1265 {
1266  uint32_t utcId;
1268  uint32_t utcType;
1271  uint32_t startCh;
1274  uint32_t numCh;
1276  uint32_t startThreadId;
1278  uint8_t txCredit;
1280  CSL_DRU_t *druRegs;
1283  uint32_t numQueue;
1285 } Udma_UtcInstInfo;
1286 #endif
1287 
1291 typedef struct Udma_ChObject_t
1292 {
1293  uintptr_t rsv[UDMA_DRV_CH_OBJ_SIZE];
1295 } Udma_ChObject;
1296 
1297 #ifdef __cplusplus
1298 }
1299 #endif
1300 
1301 #endif /* #ifndef UDMA_CH_H_ */
1302 
Udma_chGetCqRingHandle
Udma_RingHandle Udma_chGetCqRingHandle(Udma_ChHandle chHandle)
Returns the default completion ring handle of the channel.
Udma_ChPdmaPrms::dmaReqReset
uint8_t dmaReqReset
Definition: udma_ch.h:618
Udma_ChRxPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:391
Udma_ChStats::startedByteCnt
uint32_t startedByteCnt
Definition: udma_ch.h:694
Udma_FlowHandle
void * Udma_FlowHandle
UDMA flow handle.
Definition: udma_types.h:73
Udma_ChRxPrms::flowIdFwRangeStart
uint16_t flowIdFwRangeStart
Definition: udma_ch.h:410
Udma_ChTxPrms
UDMA TX channel parameters.
Definition: udma_ch.h:317
Udma_ChPrms
UDMA channel open parameters.
Definition: udma_ch.h:247
Udma_ChRxPrms::ignoreLongPkts
uint8_t ignoreLongPkts
Definition: udma_ch.h:431
Udma_RingPrms
UDMA ring parameters.
Definition: udma_ring.h:124
Udma_chOpen
int32_t Udma_chOpen(Udma_DrvHandle drvHandle, Udma_ChHandle chHandle, uint32_t chType, const Udma_ChPrms *chPrms)
UDMA open channel.
Udma_ChPdmaPrms::firstSlot
uint8_t firstSlot
Definition: udma_ch.h:634
Udma_ChPdmaPrms::acc32
uint8_t acc32
Definition: udma_ch.h:590
Udma_chReset
int32_t Udma_chReset(Udma_ChHandle chHandle)
Hard reset the channel if teardown fails.
Udma_ChRxPrms::configDefaultFlow
uint32_t configDefaultFlow
Definition: udma_ch.h:435
Udma_ChTxPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:329
Udma_chEnable
int32_t Udma_chEnable(Udma_ChHandle chHandle)
UDMA channel enable API.
Udma_ChHandle
void * Udma_ChHandle
UDMA channel handle.
Definition: udma_types.h:67
Udma_ChRxPrms::flowErrorHandling
uint8_t flowErrorHandling
Definition: udma_ch.h:421
Udma_ChRxPrms
UDMA RX channel parameters.
Definition: udma_ch.h:390
Udma_chGetTdCqRingHandle
Udma_RingHandle Udma_chGetTdCqRingHandle(Udma_ChHandle chHandle)
Returns the teardown completion ring handle of the channel.
Udma_ChTxPrms::txCredit
uint8_t txCredit
Definition: udma_ch.h:341
Udma_ChTxPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:335
Udma_chDisable
int32_t Udma_chDisable(Udma_ChHandle chHandle, uint32_t timeout)
UDMA channel teardown and disable API.
Udma_ChPdmaPrms::elemCnt
uint32_t elemCnt
Definition: udma_ch.h:546
Udma_ChPdmaPrms::groupMode
uint8_t groupMode
Definition: udma_ch.h:611
Udma_ChRxPrms::ignoreShortPkts
uint8_t ignoreShortPkts
Definition: udma_ch.h:427
Udma_chRingDeQueueRaw
int32_t Udma_chRingDeQueueRaw(Udma_ChHandle chHandle, uint64_t noElem, uint64_t *eleInRing)
De Queue elements from the ring.
Udma_ChPdmaPrms
UDMA PDMA channel Static TR parameters.
Definition: udma_ch.h:536
UdmaChPdmaPrms_init
void UdmaChPdmaPrms_init(Udma_ChPdmaPrms *pdmaPrms)
Udma_ChPdmaPrms structure init function.
Udma_ChPdmaPrms::isAasrcCh
uint8_t isAasrcCh
Definition: udma_ch.h:606
Udma_ChPrms::mappedChGrp
uint32_t mappedChGrp
Definition: udma_ch.h:284
Udma_chGetStats
int32_t Udma_chGetStats(Udma_ChHandle chHandle, Udma_ChStats *chStats)
Get real-time channel statistics.
Udma_chGetNum
uint32_t Udma_chGetNum(Udma_ChHandle chHandle)
Returns the channel number offset with in a channel type - TX, RX and External (UTC) channel types.
Udma_chPause
int32_t Udma_chPause(Udma_ChHandle chHandle)
UDMA channel pause API.
Udma_ChPrms::fqRingPrms
Udma_RingPrms fqRingPrms
Definition: udma_ch.h:297
Udma_chGetDefaultFlowHandle
Udma_FlowHandle Udma_chGetDefaultFlowHandle(Udma_ChHandle chHandle)
Returns the default flow handle of the RX channel.
Udma_ChRxPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:400
Udma_ChRxPrms::flowPsInfoPresent
uint8_t flowPsInfoPresent
Definition: udma_ch.h:418
Udma_ChRxPrms::flowSopOffset
uint8_t flowSopOffset
Definition: udma_ch.h:424
Udma_chConfigTx
int32_t Udma_chConfigTx(Udma_ChHandle chHandle, const Udma_ChTxPrms *txPrms)
UDMA configure TX channel.
Udma_chSetSwTrigger
int32_t Udma_chSetSwTrigger(Udma_ChHandle chHandle, uint32_t trigger)
Sets the software trigger register based on the trigger mode provided.
Udma_ChPrms::tdCqRingPrms
Udma_RingPrms tdCqRingPrms
Definition: udma_ch.h:304
Udma_ChPrms::cqRingPrms
Udma_RingPrms cqRingPrms
Definition: udma_ch.h:299
Udma_RingHandle
void * Udma_RingHandle
UDMA ring handle.
Definition: udma_types.h:71
Udma_ChRxPrms::flowEInfoPresent
uint8_t flowEInfoPresent
Definition: udma_ch.h:415
Udma_ChUtcPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:477
Udma_getPeerData
int32_t Udma_getPeerData(Udma_ChHandle chHandle, uint32_t *peerData)
Get real-time peer data which contains number of bytes written.
Udma_ChPdmaPrms::elemSize
uint32_t elemSize
Definition: udma_ch.h:537
Udma_ChObject
Opaque UDMA channel object.
Definition: udma_ch.h:1292
Udma_chResume
int32_t Udma_chResume(Udma_ChHandle chHandle)
UDMA channel resume API.
Udma_ChUtcPrms::supressTdCqPkt
uint8_t supressTdCqPkt
Definition: udma_ch.h:502
Udma_ChPdmaPrms::dmaReqMask
uint16_t dmaReqMask
Definition: udma_ch.h:641
Udma_ChUtcPrms
UDMA UTC channel parameters.
Definition: udma_ch.h:469
Udma_ChTxPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:358
Udma_ChTxPrms::filterPsWords
uint8_t filterPsWords
Definition: udma_ch.h:322
UDMA_DRV_CH_OBJ_SIZE
#define UDMA_DRV_CH_OBJ_SIZE
Definition: udma_ch.h:238
Udma_ChTxPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:331
Udma_ChUtcPrms::busPriority
uint8_t busPriority
Definition: udma_ch.h:479
Udma_chGetSwTriggerRegister
void * Udma_chGetSwTriggerRegister(Udma_ChHandle chHandle)
Returns the software trigger register address for the channel.
Udma_ChPrms::chNum
uint32_t chNum
Definition: udma_ch.h:248
Udma_chDecStats
int32_t Udma_chDecStats(Udma_ChHandle chHandle, Udma_ChStats *chStats)
Decrement real-time channel statistics.
Udma_ChPdmaPrms::fifoCnt
uint32_t fifoCnt
Definition: udma_ch.h:565
UdmaChUtcPrms_init
void UdmaChUtcPrms_init(Udma_ChUtcPrms *utcPrms)
Udma_ChUtcPrms structure init function.
Udma_ChTxPrms::addrType
uint8_t addrType
Definition: udma_ch.h:324
Udma_ChRxPrms::fetchWordSize
uint16_t fetchWordSize
Definition: udma_ch.h:398
Udma_ChUtcPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:489
Udma_chGetTriggerEvent
uint32_t Udma_chGetTriggerEvent(Udma_ChHandle chHandle, uint32_t trigger)
Returns the global trigger event for the channel.
Udma_chGetChanEnStatus
int32_t Udma_chGetChanEnStatus(Udma_ChHandle chHandle, uint8_t *chEnableStat)
Get the channel enable status.
Udma_chGetCqRingNum
uint16_t Udma_chGetCqRingNum(Udma_ChHandle chHandle)
Returns the default completion ring number to be programmed in descriptor.
UdmaChPrms_init
void UdmaChPrms_init(Udma_ChPrms *chPrms, uint32_t chType)
Udma_ChPrms structure init function.
Udma_ChPdmaPrms::lastSlot
uint8_t lastSlot
Definition: udma_ch.h:627
Udma_ChUtcPrms::chanType
uint8_t chanType
Definition: udma_ch.h:475
Udma_chSetChaining
int32_t Udma_chSetChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle, uint32_t trigger)
Chains the trigger channel with the chained channel.
Udma_ChPrms::peerChNum
uint32_t peerChNum
Definition: udma_ch.h:258
UdmaChTxPrms_init
void UdmaChTxPrms_init(Udma_ChTxPrms *txPrms, uint32_t chType)
Udma_ChTxPrms structure init function.
UdmaChRxPrms_init
void UdmaChRxPrms_init(Udma_ChRxPrms *rxPrms, uint32_t chType)
Udma_ChRxPrms structure init function.
Udma_ChUtcPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:485
Udma_ChStats::completedByteCnt
uint32_t completedByteCnt
Definition: udma_ch.h:692
Udma_ChRxPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:406
Udma_ChStats
UDMA channel statistics.
Definition: udma_ch.h:689
Udma_chConfigUtc
int32_t Udma_chConfigUtc(Udma_ChHandle chHandle, const Udma_ChUtcPrms *utcPrms)
UDMA configure UTC channel.
Udma_ChTxPrms::fifoDepth
uint16_t fifoDepth
Definition: udma_ch.h:343
Udma_chRingRingDbRaw
int32_t Udma_chRingRingDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries)
Ring Forward door bell.
Udma_clearPeerData
int32_t Udma_clearPeerData(Udma_ChHandle chHandle, uint32_t peerData)
Clear real-time peer data which contains number of bytes written.
Udma_DrvHandle
void * Udma_DrvHandle
UDMA driver handle.
Definition: udma_types.h:65
Udma_ChTxPrms::supressTdCqPkt
uint8_t supressTdCqPkt
Definition: udma_ch.h:377
Udma_ChUtcPrms::busQos
uint8_t busQos
Definition: udma_ch.h:481
Udma_ChUtcPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:470
Udma_ChUtcPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:483
Udma_ChTxPrms::pauseOnError
uint8_t pauseOnError
Definition: udma_ch.h:318
Udma_ChRxPrms::flowIdFwRangeCnt
uint16_t flowIdFwRangeCnt
Definition: udma_ch.h:412
Udma_ChPdmaPrms::eol
uint8_t eol
Definition: udma_ch.h:598
Udma_chClose
int32_t Udma_chClose(Udma_ChHandle chHandle)
UDMA close channel.
Udma_ChStats::packetCnt
uint32_t packetCnt
Definition: udma_ch.h:690
Udma_chGetFqRingHandle
Udma_RingHandle Udma_chGetFqRingHandle(Udma_ChHandle chHandle)
Returns the default free ring handle of the channel.
Udma_chConfigPdma
int32_t Udma_chConfigPdma(Udma_ChHandle chHandle, const Udma_ChPdmaPrms *pdmaPrms)
UDMA configure PDMA channel (peerChNum as part of Udma_ChPrms) paired with the UDMAP channel.
Udma_ChPdmaPrms::orderTable1
uint32_t orderTable1
Definition: udma_ch.h:669
Udma_ChTxPrms::chanType
uint8_t chanType
Definition: udma_ch.h:327
Udma_ChPrms::appData
void * appData
Definition: udma_ch.h:292
Udma_ChPdmaPrms::orderTable0
uint32_t orderTable0
Definition: udma_ch.h:655
Udma_ChRxPrms::burstSize
uint8_t burstSize
Definition: udma_ch.h:443
Udma_chRingRingRvrDbRaw
int32_t Udma_chRingRingRvrDbRaw(Udma_ChHandle chHandle, uint64_t noOfEntries)
Ring Forward door bell.
Udma_chRingQueueRaw
int32_t Udma_chRingQueueRaw(Udma_ChHandle chHandle, uint8_t *phyDescMem, uint64_t noEleCnt)
Queue TR into channels ring.
Udma_ChTxPrms::dmaPriority
uint8_t dmaPriority
Definition: udma_ch.h:337
Udma_ChRxPrms::busOrderId
uint8_t busOrderId
Definition: udma_ch.h:404
Udma_ChTxPrms::filterEinfo
uint8_t filterEinfo
Definition: udma_ch.h:320
Udma_ChPrms::utcId
uint32_t utcId
Definition: udma_ch.h:276
Udma_ChRxPrms::addrType
uint8_t addrType
Definition: udma_ch.h:393
Udma_ChRxPrms::chanType
uint8_t chanType
Definition: udma_ch.h:396
Udma_ChUtcPrms::addrType
uint8_t addrType
Definition: udma_ch.h:472
Udma_ChPdmaPrms::burst
uint8_t burst
Definition: udma_ch.h:582
Udma_ChTxPrms::busQos
uint8_t busQos
Definition: udma_ch.h:333
Udma_chBreakChaining
int32_t Udma_chBreakChaining(Udma_ChHandle triggerChHandle, Udma_ChHandle chainedChHandle)
Breaks the chaining by resetting the trigger channel's OES.
Udma_chConfigRx
int32_t Udma_chConfigRx(Udma_ChHandle chHandle, const Udma_ChRxPrms *rxPrms)
UDMA configure RX channel.
Udma_ChRxPrms::busQos
uint8_t busQos
Definition: udma_ch.h:402
Udma_chGetFqRingNum
uint16_t Udma_chGetFqRingNum(Udma_ChHandle chHandle)
Returns the default free ring number to be programmed in descriptor.