Detailed Description

UDMA ring parameters.

Data Fields
void *	ringMem

uint32_t	ringMemSize

uint8_t	mode

uint16_t	virtId

uint32_t	elemCnt

uint8_t	elemSize

uint8_t	orderId

uint8_t	asel

uint32_t	mappedRingGrp

uint32_t	mappedChNum

uint64_t	currWrLoc

uint64_t	currRdLoc

Field Documentation

◆ ringMem

void* Udma_RingPrms::ringMem

Pointer to ring memory. Incase of FQ and CQ rings, this cannot be NULL except for DRU direct TR mode where the rings are not used. Incase of TD CQ, this can be NULL when TD response is supressed via supressTdCqPkt channel parameter. Note: This is a virtual pointer.

◆ ringMemSize

uint32_t Udma_RingPrms::ringMemSize

Size of the memory in bytes allocated. This is used by the driver to validate the allocated memory is sufficient or not.

Note: By default this parameter will be set to UDMA_RING_SIZE_CHECK_SKIP by UdmaRingPrms_init API to enable backward combatibility when this is not set rightly by the caller

◆ mode

uint8_t Udma_RingPrms::mode

Ring mode. Refer tisci_msg_rm_ring_cfg_req::mode

◆ virtId

uint16_t Udma_RingPrms::virtId

Ring virt ID. Refer tisci_msg_rm_ring_cfg_req::virtid

◆ elemCnt

uint32_t Udma_RingPrms::elemCnt

Ring element count. Set to queue depth of the ring. Set to 0 for DRU direct TR mode.

◆ elemSize

uint8_t Udma_RingPrms::elemSize

Ring element size. Refer Udma_RingElemSize for supported values.

◆ orderId

uint8_t Udma_RingPrms::orderId

Ring bus order ID value to be programmed into the orderid field of the ring's RING_ORDERID register.

◆ asel

uint8_t Udma_RingPrms::asel

Ring ASEL (address select) value to be set into the ASEL field of the ring's RING_BA_HI register. Refer Udma_RingAccAselEndpointSoc for supported values. This field is not supported on some SoCs. On SoCs that do not support this field the input is quietly ignored. Note: By default this parameter will be set to UDMA_RINGACC_ASEL_ENDPOINT_PHYSADDR by UdmaRingPrms_init API

◆ mappedRingGrp

uint32_t Udma_RingPrms::mappedRingGrp

The Mapped ring group to use when channel type is UDMA_CH_TYPE_TX_MAPPED or UDMA_CH_TYPE_RX_MAPPED.

Refer Udma_MappedTxGrpSoc macro for details about mapped TX ring groups or Udma_MappedRxGrpSoc macro for details about mapped RX ring groups.

For unmapped case, set to UDMA_MAPPED_GROUP_INVALID

◆ mappedChNum

uint32_t Udma_RingPrms::mappedChNum

The assigned mapped channel number when channel type is UDMA_CH_TYPE_TX_MAPPED or UDMA_CH_TYPE_RX_MAPPED.

This is used to allocate the corresponding mapped ring for the particular channel. RM will derive an intersecting pool based on the rings reserved for the core (in rmcfg) and the permissible range for the given channel(rings reserved for specific channels) such that the allocated ring will be from this intersecting pool.

For example, If the rings idx reserved for the core are 10 to 20 and the rings for the channel are 15 to 25. Then the intersecting pool of ring idx will be 15 - 20 and rm will allocate from this range.

◆ currWrLoc

uint64_t Udma_RingPrms::currWrLoc

Current write location - which is empty/available. e.g. when there are NO/zero entries, currWrLoc is 0 when there are 1 entries, currWrLoc is 1 (location 0, is used) when there are 4 entries, currWrLoc is 4 (location 0 to 3, is used) when there are N entries, currWrLoc is N (location 0 to N-1, is used)

◆ currRdLoc

uint64_t Udma_RingPrms::currRdLoc

Current read location - which is expected to be completed next e.g. when there are NO/zero entries, currRdLoc is maximum - 1 when there are 1 entries, currRdLoc is 0 (location 0, is used) when there are 4 entries, currRdLoc is 0 (location 0 to 3, is used)