| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| LwIP | A53 | YES | FreeRTOS | TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping | Other LwIP features |
| Ethernet driver (ENET) | A53 | YES | FreeRTOS | Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav) on CPSW, IET (IEEE 802.1Qbu) on CPSW | RMII mode |
| ID | Head Line | Module |
| EXT_SITMPUSW-242 | AM62L: UDMA : Event notify callback not called with multiple Flows on a single DMA channel | DMA |
| EXT_SITMPUSW-172 | DebugP_assert: change so that it does not lock up the entire core | DPL |
| EXT_SITMPUSW-217 | ClockP_usleep() getting into infinite loop due to timer wraparound | DPL |
| EXT_SITMPUSW-109 | Wrong comments on HwiP_inISR() API | Documentation |
| EXT_SITMPUSW-112 | SysConfig does not generate correct FLASH section parameters. | Flash |
| EXT_SITMPUSW-179 | I2C Target Overrun Test Hangs Waiting for Callback | I2C |
| EXT_SITMPUSW-183 | I2c_transfer not returning correct status when transfer mode is set to polling | I2C |
| EXT_SITMPUSW-191 | I2C_transfer() return not handled properly while i2cLldHandle is NULL | I2C |
| EXT_SITMPUSW-192 | SysConfig does not support configuring both 10-bit own addresses for I2C target mode | I2C |
| EXT_SITMPUSW-194 | NACK is not returned to application when performing i2c write in polling mode | I2C |
| EXT_SITMPUSW-232 | I2C target mode with multiple own addresses transaction fails | I2C |
| EXT_SITMPUSW-211 | DMA channel teardown sequence is not proper in MCASP_disableDmaTx | MCASP |
| EXT_SITMPUSW-188 | [MCSPI]End of Channel Transfer status check is missing for DMA mode | MCSPI |
| EXT_SITMPUSW-200 | [MCSPI] Timeout mechanism missing to prevent Infinite loops in MCSPI driver | MCSPI |
| EXT_SITMPUSW-208 | PDMA channels are not aligned properly with the different MCSPI instants | MCSPI |
| EXT_SITMPUSW-123 | MMCSD driver does not follow the SWITCH command sequence correctly | MMCSD |
| EXT_SITMPUSW-124 | EXTCSD HS_TIMING register is set incorrectly at certain places in the driver | MMCSD |
| EXT_SITMPUSW-125 | MMCSD driver uses infinite loop instead of timeout for checking fields of PRESENTSTATE register | MMCSD |
| EXT_SITMPUSW-126 | Timing issues with MMCSD host controller driver | MMCSD |
| EXT_SITMPUSW-127 | Incorrect handling of the CAPABILITIES register in the eMMC initialization | MMCSD |
| EXT_SITMPUSW-153 | eMMC Driver Error Interrupt Flags accessed in Wrong Register | MMCSD |
| EXT_SITMPUSW-153 | eMMC Init Code ignores early failures and continues Execution | MMCSD |
| EXT_SITMPUSW-155 | eMMC Driver Error Recovery Recursion can lead to System Crashes | MMCSD |
| EXT_SITMPUSW-171 | MMCSD : Read fails when injecting Command time out fault | MMCSD |
| EXT_SITMPUSW-176 | MMCSD : Read fails when injecting Command Index fault | MMCSD |
| EXT_SITMPUSW-185 | MMCSD : Read times out in HS200 mode after writing in SDR50 mode | MMCSD |
| EXT_SITMPUSW-186 | MMCSD : Read fails when injecting Command CRC fault | MMCSD |
| EXT_SITMPUSW-195 | MMCSD : Read fails when passing invalid argument. | MMCSD |
| EXT_SITMPUSW-204 | MMCSD close() is not proper | MMCSD |
| EXT_SITMPUSW-209 | Simultaneous FAT transfer fails for the same instance while being accessed from two different tasks. | MMCSD |
| EXT_SITMPUSW-212 | MMCSD : Write fails when passing invalid argument. | MMCSD |
| EXT_SITMPUSW-215 | MMCSD : Read fails when injecting Command End Bit fault | MMCSD |
| EXT_SITMPUSW-230 | MMCSD close fails after opening the same instance twice. | MMCSD |
| EXT_SITMPUSW-78 | MMCSD Sysconfig provides options to configure PHY type | MMCSD |
| EXT_SITMPUSW-84 | MMCSD error recovery sequence isn't implemented correctly | MMCSD |
| EXT_SITMPUSW-207 | Missing -p flag with strip command to reduce the size of *.out | Makefiles |
| EXT_SITMPUSW-158 | OSPI_flashExecCmd has a couple of checks where the code may get stuck | OSPI |
| EXT_SITMPUSW-181 | Configured dummy cycles in flash driver contradicts flash data sheet | OSPI |
| EXT_SITMPUSW-190 | OSPI_PhyTuneGrapher missing read delay value 4 | OSPI |
| EXT_SITMPUSW-213 | OSPI Phy Status Check Missing | OSPI |
| EXT_SITMPUSW-235 | AM62L : wrong register is reading for the Reset status | SOC |
| EXT_SITMPUSW-121 | FORCE bit not book keeped properly for MCSPI DMA mode of operation | Software |
| EXT_SITMPUSW-226 | Improve Sysconfig tool tips for all drivers | SysConfig |
| EXT_SITMPUSW-174 | UDMA: HC/UHC channel allocation fails due to RM config mismatch with CSL defines | UDMA |
| EXT_SITMPUSW-214 | UDMA multiple channel open for the same channel and invalid instance not handling properly | UDMA |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
The below table captures the list of migration document sections when migrating from one version to another. The migration for a partcluar module will be applicable, if you are migrating from older version listed to newer version listed on the table below.
1.8.20