tisci_lpm.h

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/*
 *  Copyright (C) 2021-2026 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#ifndef TISCI_LPM_H
#define TISCI_LPM_H
 
#ifdef __cplusplus
extern "C"
{
#endif
 
 
 
#define TISCI_MSG_VALUE_SLEEP_MODE_DEEP_SLEEP           0x0U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_MCU_ONLY             0x1U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_IO_ONLY_PLUS_DDR     0x2U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_PARTIAL_IO           0x3U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_STANDBY              0x4U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_SOC_OFF              0x5U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_RTC_PLUS_DDR         0x6U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_RTC_ONLY             0x7U
 
#define TISCI_MSG_VALUE_SLEEP_MODE_DM_MANAGED           0xFDU
 
#define TISCI_MSG_VALUE_SLEEP_MODE_NOT_SELECTED         0xFEU
 
#define TISCI_MSG_VALUE_SLEEP_MODE_INVALID              0xFFU
 
#define MSG_FLAG_CERT_AUTH_PASS                        0x555555U
#define MSG_FLAG_CERT_AUTH_FAIL                        0xffffffU
 
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_00            0x0x00000001
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_01            0x0x00000002
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_02            0x0x00000004
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_03            0x0x00000008
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_04            0x0x00000010
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_05            0x0x00000020
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_06            0x0x00000040
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_07            0x0x00000080
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_08            0x0x00000100
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_09            0x0x00000200
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_10            0x0x00000400
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_11            0x0x00000800
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_12            0x0x00001000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_13            0x0x00002000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_14            0x0x00004000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_15            0x0x00008000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_16            0x0x00010000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_17            0x0x00020000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_18            0x0x00040000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_19            0x0x00080000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_20            0x0x00100000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_21            0x0x00200000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_22            0x0x00400000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_23            0x0x00800000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_24            0x0x01000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_25            0x0x02000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_26            0x0x04000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_27            0x0x08000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_28            0x0x10000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_29            0x0x20000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_30            0x0x40000000
#define TISCI_MSG_VALUE_SLEEP_DEBUG_FLAG_31            0x0x80000000
 
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_I2C0                       0x00U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_UART0                      0x10U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_MCU_GPIO0                       0x20U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_ICEMELTER0                 0x30U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_TIMER0                     0x40U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_TIMER1                     0x41U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_WKUP_RTC0                       0x50U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_RESET                           0x60U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_USB0                            0x70U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_USB1                            0x71U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_MAIN_IO                         0x80U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_MCU_IO                          0x81U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_CAN_IO                          0x82U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_MCU_IPC                         0x90U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_EARLY_WAKE_IPOR                 0xA0U
#define TISCI_MSG_VALUE_LPM_WAKE_SOURCE_INVALID                         0xFFU
 
#define TISCI_MSG_VALUE_LPM_WAKE_PIN_INVALID                            0xFFU
 
#define TISCI_MSG_VALUE_HOST_STATE_ON                                   1U
 
#define TISCI_MSG_VALUE_HOST_STATE_OFF                                  0U
 
#define TISCI_MSG_VALUE_HOST_STATE_INVALID                              0xFFU
 
#define TISCI_MSG_VALUE_IO_ENABLE 1U
 
#define TISCI_MSG_VALUE_IO_DISABLE 0U
 
#define TISCI_MSG_VALUE_STATE_SET       1U
 
#define TISCI_MSG_VALUE_STATE_CLEAR     0U
 
struct tisci_msg_prepare_sleep_req {
    struct tisci_header    hdr;
    uint8_t            mode;
    uint32_t            ctx_lo;
    uint32_t            ctx_hi;
    uint32_t            debug_flags;
} __attribute__((__packed__));
 
struct tisci_msg_prepare_sleep_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_enter_sleep_req {
    struct tisci_header    hdr;
    uint8_t            mode;
    uint8_t            proc_id;
    uint32_t            core_resume_lo;
    uint32_t            core_resume_hi;
} __attribute__((__packed__));
 
struct tisci_msg_enter_sleep_resp {
    struct tisci_header    hdr;
    uint32_t            status;
} __attribute__((__packed__));
 
struct tisci_msg_get_suspend_initiator_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_get_suspend_initiator_resp {
    struct tisci_header    hdr;
    uint32_t            current_initiator;
} __attribute__((__packed__));
 
struct tisci_msg_firmware_load_req {
    struct tisci_header    hdr;
    uint32_t            image_addr;
    uint32_t            image_size;
} __attribute__((__packed__));
 
struct tisci_msg_firmware_load_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_sync_resume_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_sync_resume_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_continue_resume_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_continue_resume_resp {
    struct tisci_header    hdr;
    uint32_t            ctx_lo;
    uint32_t            ctx_hi;
} __attribute__((__packed__));
 
struct tisci_msg_core_resume_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_core_resume_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_dm_abort_sleep_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_dm_abort_sleep_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_wake_reason_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_wake_reason_resp {
    struct tisci_header    hdr;
    uint32_t            wake_source;
    uint64_t            wake_timestamp;
    uint8_t            wake_pin;
    uint8_t            mode;
    uint32_t            rsvd_0;
    uint32_t            rsvd_1;
} __attribute__((__packed__));
 
struct tisci_msg_set_io_isolation_req {
    struct tisci_header    hdr;
    uint8_t            state;
} __attribute__((__packed__));
 
struct tisci_msg_set_io_isolation_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_min_context_restore_req {
    struct tisci_header    hdr;
    uint32_t            ctx_lo;
    uint32_t            ctx_hi;
} __attribute__((__packed__));
 
struct tisci_msg_min_context_restore_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_set_device_constraint_req {
    struct tisci_header    hdr;
    uint32_t            id;
    uint8_t            state;
    uint32_t            rsvd_0;
    uint32_t            rsvd_1;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_set_device_constraint_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_device_constraint_req {
    struct tisci_header    hdr;
    uint32_t            id;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_device_constraint_resp {
    struct tisci_header    hdr;
    uint8_t            state;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_set_latency_constraint_req {
    struct tisci_header    hdr;
    uint16_t            resume_latency;
    uint8_t            state;
    uint32_t            rsvd;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_set_latency_constraint_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_latency_constraint_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_latency_constraint_resp {
    struct tisci_header    hdr;
    uint16_t            resume_latency;
    uint8_t            state;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_next_sys_mode_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_next_sys_mode_resp {
    struct tisci_header    hdr;
    uint8_t            mode;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_next_host_state_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_get_next_host_state_resp {
    struct tisci_header    hdr;
    uint8_t            state;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_abort_req {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_abort_resp {
    struct tisci_header hdr;
} __attribute__((__packed__));
 
struct tisci_msg_lpm_save_ctx_addr_req {
    struct tisci_header    hdr;
    uint64_t            ctx_addr;
    uint32_t            size;
}  __attribute__((__packed__));
 
struct tisci_msg_lpm_save_ctx_addr_resp {
    struct tisci_header hdr;
}  __attribute__((__packed__));
 
 
#ifdef __cplusplus
}
#endif
 
#endif