Detailed Description

Common to all context configuration.

Data Fields
bool	isSoftStoppingOnInterfaceDisable
	If true, when CSIRX_commonDisable is issued, the interface stops after full frames are received in all active contexts. More...

bool	isHeaderErrorCheckEnabled
	If true, enables the Error Correction Code check for the received header (short and long packets for all virtual channel ids). Influences CSIRX_CommonIntr::isOneBitShortPacketErrorCorrect and CSIRX_CommonIntr::isMoreThanOneBitShortPacketErrorCannotCorrect. More...

bool	isSignExtensionEnabled
	If true, enables sign extension of RAW10/12/14 for all contexts whose CSIRX_ContextConfig::format is among those with EXP16 output. More...

bool	isBurstSizeExpand
	If false, then burst size is determined by CSIRX_CommonConfig::burstSize, otherwise (if true), the burst size is 16x64 OCP writes. More...

bool	isNonPostedWrites
	If true, writes are non posted. More...

bool	isOcpAutoIdle
	If true, automatic OCP clock gatingbased on OCP activity is enabled. If false, OCP clock is free running. More...

uint32_t	stopStateFsmTimeoutInNanoSecs
	stop state FSM timeout in Nano seconds. The maximum timeout possible is equal to 1/CSIRX_INTERCONNECT_CLOCK_HZ * 8191 * 16 * 4 seconds. e.g for CSIRX_INTERCONNECT_CLOCK_HZ = 200 MHz, max timeout is 2.621 ms For setting the maximum timeout possible, a special define CSIRX_STOP_STATE_FSM_TIMEOUT_MAX is provided. This is also the CSIRX IP reset default More...

uint8_t	burstSize
	Sets the DMA burst size on the interconnect to one of CSIRX_BURST_SIZE. Only effective if isBurstSizeExpand is false. More...

uint8_t	endianness
	One of CSIRX_ENDIANNESS. More...

uint8_t	startOfFrameIntr0ContextId
	Context Id for generation of SOF Interrupt 0. More...

uint8_t	startOfFrameIntr1ContextId
	Context Id for generation of SOF Interrupt 1. More...

uint8_t	endOfFrameIntr0ContextId
	Context Id for generation of EOF Interrupt 0. More...

uint8_t	endOfFrameIntr1ContextId
	Context Id for generation of EOF Interrupt 1. More...

CSIRX_CommonIntr	enableIntr
	Common interrupt to enable or disable. More...

CSIRX_CommonIntrCallbacks	intrCallbacks
	Common interrupt callbacks. More...

Field Documentation

◆ isSoftStoppingOnInterfaceDisable

bool CSIRX_CommonConfig::isSoftStoppingOnInterfaceDisable

If true, when CSIRX_commonDisable is issued, the interface stops after full frames are received in all active contexts.

◆ isHeaderErrorCheckEnabled

bool CSIRX_CommonConfig::isHeaderErrorCheckEnabled

If true, enables the Error Correction Code check for the received header (short and long packets for all virtual channel ids). Influences CSIRX_CommonIntr::isOneBitShortPacketErrorCorrect and CSIRX_CommonIntr::isMoreThanOneBitShortPacketErrorCannotCorrect.

◆ isSignExtensionEnabled

bool CSIRX_CommonConfig::isSignExtensionEnabled

If true, enables sign extension of RAW10/12/14 for all contexts whose CSIRX_ContextConfig::format is among those with EXP16 output.

◆ isBurstSizeExpand

bool CSIRX_CommonConfig::isBurstSizeExpand

If false, then burst size is determined by CSIRX_CommonConfig::burstSize, otherwise (if true), the burst size is 16x64 OCP writes.

◆ isNonPostedWrites

bool CSIRX_CommonConfig::isNonPostedWrites

If true, writes are non posted.

◆ isOcpAutoIdle

bool CSIRX_CommonConfig::isOcpAutoIdle

If true, automatic OCP clock gatingbased on OCP activity is enabled. If false, OCP clock is free running.

◆ stopStateFsmTimeoutInNanoSecs

uint32_t CSIRX_CommonConfig::stopStateFsmTimeoutInNanoSecs

stop state FSM timeout in Nano seconds. The maximum timeout possible is equal to 1/CSIRX_INTERCONNECT_CLOCK_HZ * 8191 * 16 * 4 seconds. e.g for CSIRX_INTERCONNECT_CLOCK_HZ = 200 MHz, max timeout is 2.621 ms For setting the maximum timeout possible, a special define CSIRX_STOP_STATE_FSM_TIMEOUT_MAX is provided. This is also the CSIRX IP reset default

◆ burstSize

uint8_t CSIRX_CommonConfig::burstSize

Sets the DMA burst size on the interconnect to one of CSIRX_BURST_SIZE. Only effective if isBurstSizeExpand is false.

◆ endianness

uint8_t CSIRX_CommonConfig::endianness

One of CSIRX_ENDIANNESS.

◆ startOfFrameIntr0ContextId

uint8_t CSIRX_CommonConfig::startOfFrameIntr0ContextId

Context Id for generation of SOF Interrupt 0.

◆ startOfFrameIntr1ContextId

uint8_t CSIRX_CommonConfig::startOfFrameIntr1ContextId

Context Id for generation of SOF Interrupt 1.

◆ endOfFrameIntr0ContextId

uint8_t CSIRX_CommonConfig::endOfFrameIntr0ContextId

Context Id for generation of EOF Interrupt 0.

◆ endOfFrameIntr1ContextId

uint8_t CSIRX_CommonConfig::endOfFrameIntr1ContextId

Context Id for generation of EOF Interrupt 1.

◆ enableIntr

CSIRX_CommonIntr CSIRX_CommonConfig::enableIntr

Common interrupt to enable or disable.

◆ intrCallbacks

CSIRX_CommonIntrCallbacks CSIRX_CommonConfig::intrCallbacks

Common interrupt callbacks.