Macros
#define	SDL_STC_NUM_INSTANCES 2U

#define	SDL_DSP_PD_WAKEUP_MASK0_WAKEUP_MASK0 (0xEFFFFFFFU)

#define	MSS_RCM_BaseAddress (SDL_MSS_RCM_U_BASE)

#define	MSS_CTRL_BaseAddress (SDL_MSS_CTRL_U_BASE)

#define	DSS_RCM_BaseAddress (SDL_DSS_RCM_U_BASE)

#define	DSS_CTRL_BaseAddress (SDL_DSS_CTRL_U_BASE)

#define	DSS_DSP_ICFG_PDCCMD (0x01810000U)

Enumerations
enum	SDL_STC_Inst { SDL_STC_INST_MAINR5F0, SDL_STC_INST_DSP, INVALID_INSTANCE }

Functions
static void	SDL_STC_resetCauseClear (void)
	This API is used to clear the reset cause bits for processor core. More...

Variables
static uint32_t	SDL_STC_baseAddress [SDL_STC_NUM_INSTANCES] = {SDL_MSS_R5SS_STC_U_BASE, SDL_DSS_DSP_STC_U_BASE}

Macro Definition Documentation

◆ SDL_STC_NUM_INSTANCES

#define SDL_STC_NUM_INSTANCES 2U

#define SDL_DSP_PD_WAKEUP_MASK0_WAKEUP_MASK0 (0xEFFFFFFFU)

#define MSS_RCM_BaseAddress (SDL_MSS_RCM_U_BASE)

#define MSS_CTRL_BaseAddress (SDL_MSS_CTRL_U_BASE)

#define DSS_RCM_BaseAddress (SDL_DSS_RCM_U_BASE)

#define DSS_CTRL_BaseAddress (SDL_DSS_CTRL_U_BASE)

#define DSS_DSP_ICFG_PDCCMD (0x01810000U)

uint32_t SDL_STC_baseAddress[SDL_STC_NUM_INSTANCES] = {SDL_MSS_R5SS_STC_U_BASE, SDL_DSS_DSP_STC_U_BASE}

static