AM273x MCU+ SDK  09.02.00

Introduction

Macros that define values for the destination of interrupt (CPU or DMA) when the paramset is completed. The interrupt type HWA_PARAMDONE_INTERRUPT_TYPE_CPU may not be supported on all versions of the IP - see HWA_Attrs::isConcurrentAccessAllowed.

Macros

#define HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR1   ((uint8_t)1U)
 
#define HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR2   ((uint8_t)2U)
 
#define HWA_PARAMDONE_INTERRUPT_TYPE_DMA   ((uint8_t)4U)
 

Macro Definition Documentation

◆ HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR1

#define HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR1   ((uint8_t)1U)

CPU Interrupt 1 when paramset is completed

◆ HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR2

#define HWA_PARAMDONE_INTERRUPT_TYPE_CPU_INTR2   ((uint8_t)2U)

CPU Interrupt 2 when paramset is completed

◆ HWA_PARAMDONE_INTERRUPT_TYPE_DMA

#define HWA_PARAMDONE_INTERRUPT_TYPE_DMA   ((uint8_t)4U)

Trigger DMA when paramset is completed