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Macros
#define	SDL_ECC_BUS_SAFETY_MSS_BUS_CFG (uint32_t)SDL_MSS_CTRL_U_BASE

#define	SDL_ECC_BUS_SAFETY_DSS_BUS_CFG (uint32_t)SDL_DSS_CTRL_U_BASE

#define	DWORD (0x20U)

#define	SDL_DSS_CMC_COMP_U_END (SDL_DSS_CMC_COMP_U_BASE + 0X3FFCU-DWORD)

#define	SDL_DSS_MCRC_U_END (SDL_DSS_MCRC_U_BASE + 0x144U-DWORD)

#define	SDL_DSS_CBUFF_FIFO_U_END (SDL_DSS_CBUFF_FIFO_U_BASE + 0X3FFCU-DWORD)

#define	SDL_DSS_MDO_FIFO_U_END (SDL_DSS_MDO_FIFO_U_BASE + SDL_DSS_MDO_FIFO_U_SIZE-DWORD)

#define	SDL_DSS_L3_BANKA_ADDRESS SDL_DSS_L3_U_BASE

#define	SDL_DSS_L3_BANK_SIZE (0x100000U)

#define	SDL_DSS_L3_BANKB_ADDRESS SDL_DSS_L3_BANKA_ADDRESS+SDL_DSS_L3_BANK_SIZE

#define	SDL_DSS_L3_BANKC_ADDRESS SDL_DSS_L3_BANKB_ADDRESS+SDL_DSS_L3_BANK_SIZE

#define	SDL_DSS_L3_BANKD_ADDRESS SDL_DSS_L3_BANKC_ADDRESS+SDL_DSS_L3_BANK_SIZE

#define	SDL_DSS_L3_END_ADDRESS (SDL_DSS_L3_U_BASE+SDL_DSS_L3_U_SIZE)

#define	SDL_DSS_L3_BANKA_ADDRESS_END (SDL_DSS_L3_BANKB_ADDRESS-DWORD)

#define	SDL_DSS_L3_BANKB_ADDRESS_END (SDL_DSS_L3_BANKC_ADDRESS-DWORD)

#define	SDL_DSS_L3_BANKC_ADDRESS_END (SDL_DSS_L3_BANKD_ADDRESS-DWORD)

#define	SDL_DSS_L3_BANKD_ADDRESS_END (SDL_DSS_L3_END_ADDRESS-DWORD)

#define	SDL_DSS_HWA_DMA0_U_BASE_END (SDL_DSS_HWA_DMA0_U_BASE+SDL_DSS_HWA_DMA0_U_SIZE-DWORD)

#define	SDL_DSS_HWA_DMA1_U_BASE_END (SDL_DSS_HWA_DMA1_U_BASE+SDL_DSS_HWA_DMA1_U_SIZE-DWORD)

#define	SDL_DSS_MAILBOX_U_BASE_END (SDL_DSS_MAILBOX_U_BASE+SDL_DSS_MAILBOX_U_SIZE-DWORD)

#define	SDL_DSS_L2_U_BASE_END (SDL_DSS_L2_U_BASE+SDL_DSS_L2_U_SIZE-DWORD)

#define	SDL_MSS_DMM_A_DATA_U_BASE_END (SDL_MSS_DMM_A_DATA_U_BASE+0x90U-DWORD)

#define	SDL_MSS_GPADC_DATA_RAM_U_BASE_END (SDL_MSS_GPADC_DATA_RAM_U_BASE+SDL_MSS_GPADC_DATA_RAM_U_SIZE-DWORD)

#define	SDL_MSS_L2_U_BASE_END (SDL_MSS_L2_U_BASE+SDL_MSS_L2_U_SIZE-DWORD)

#define	SDL_MSS_L2_A_BASE_START (0x10200000U)

#define	SDL_MSS_L2_A_BASE_END (SDL_MSS_L2_A_BASE_START+0X7FFFCU-DWORD)

#define	SDL_MSS_L2_B_BASE_START (0x102E0000U)

#define	SDL_MSS_L2_B_BASE_END (SDL_MSS_L2_B_BASE_START+0X6FFFCU-DWORD)

#define	SDL_MSS_DMM_A_DATA_U_BASE (0xCD000000U)

#define	SDL_MSS_DMM_B_DATA_U_BASE (0xCD010000U)

#define	SDL_MSS_CTRL_R5SS0_CORE0_AHB_BASE (SDL_MSS_CTRL_R5A_AHB_BASE )

#define	SDL_MSS_CTRL_R5SS0_CORE0_AHB_END (SDL_MSS_CTRL_R5A_AHB_BASE + SDL_MSS_CTRL_R5A_AHB_SIZE-DWORD)

#define	SDL_MSS_CTRL_R5SS1_CORE0_AHB_BASE (SDL_MSS_CTRL_R5B_AHB_BASE )

#define	SDL_MSS_CTRL_R5SS1_CORE0_AHB_END (SDL_MSS_CTRL_R5B_AHB_BASE + SDL_MSS_CTRL_R5B_AHB_SIZE-DWORD)

#define	SDL_MSS_MBOX_U_END (SDL_MSS_MBOX_U_BASE+ 0x00001FFCU-DWORD)

#define	SDL_MSS_QSPI_U_END (0xC8000070U-DWORD)

#define	SDL_MSS_MCRC_U_SIZE (0x00000144U)

#define	SDL_MSS_MCRC_U_END (SDL_MSS_MCRC_U_BASE + SDL_MSS_MCRC_U_SIZE-DWORD)

#define	SDL_MSS_SWBUF_U_BASE (SDL_MSS_RETRAM_U_BASE)

#define	SDL_MSS_SWBUF_U_SIZE (0x000007FCU)

#define	SDL_MSS_SWBUF_U_END (SDL_MSS_SWBUF_U_BASE + SDL_MSS_SWBUF_U_SIZE-DWORD)

#define	SDL_MSS_TO_MDO_U_BASE (0xCA000000U)

#define	SDL_MSS_TO_MDO_U_END (0xCA00FFFCU-DWORD)

#define	SDL_ECC_BUS_SAFETY_DSS_DSP_MDMA 0U

#define	SDL_ECC_BUS_SAFETY_DSS_L3_BANKA 1U

#define	SDL_ECC_BUS_SAFETY_DSS_L3_BANKB 2U

#define	SDL_ECC_BUS_SAFETY_DSS_L3_BANKC 3U

#define	SDL_ECC_BUS_SAFETY_DSS_L3_BANKD 4U

#define	SDL_ECC_BUS_SAFETY_DSS_DSP_SDMA 5U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_A0_RD 6U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_A1_RD 7U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_B0_RD 8U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_B1_RD 9U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C0_RD 10U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C1_RD 11U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C2_RD 12U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C3_RD 13U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C4_RD 14U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C5_RD 15U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_A0_WR 16U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_A1_WR 17U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_B0_WR 18U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_B1_WR 19U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C0_WR 20U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C1_WR 21U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C2_WR 22U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C3_WR 23U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C4_WR 24U

#define	SDL_ECC_BUS_SAFETY_DSS_TPTC_C5_WR 25U

#define	SDL_ECC_BUS_SAFETY_DSS_CBUFF_FIFO 26U

#define	SDL_ECC_BUS_SAFETY_DSS_MCRC 27U

#define	SDL_ECC_BUS_SAFETY_DSS_PCR 28U

#define	SDL_ECC_BUS_SAFETY_DSS_HWA_DMA0 29U

#define	SDL_ECC_BUS_SAFETY_DSS_HWA_DMA1 30U

#define	SDL_ECC_BUS_SAFETY_DSS_MBOX 31U

#define	SDL_ECC_BUS_SAFETY_DSS_MDO_FIFO 32U

#define	SDL_ECC_BUS_SAFETY_MSS_MBOX 0U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_A0_RD 1U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_A1_RD 2U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_B0_RD 3U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_A0_WR 4U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_A1_WR 5U

#define	SDL_ECC_BUS_SAFETY_MSS_TPTC_B0_WR 6U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5A_AHB 7U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5B_AHB 8U

#define	SDL_ECC_BUS_SAFETY_MSS_SCRP 9U

#define	SDL_ECC_BUS_SAFETY_MSS_DMM 10U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_WR 11U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_WR 12U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_RD 13U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_RD 14U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5A_AXI_S 15U

#define	SDL_ECC_BUS_SAFETY_MSS_CR5B_AXI_S 16U

#define	SDL_ECC_BUS_SAFETY_MSS_QSPI 17U

#define	SDL_ECC_BUS_SAFETY_MSS_CPSW 18U

#define	SDL_ECC_BUS_SAFETY_MSS_MCRC 19U

#define	SDL_ECC_BUS_SAFETY_MSS_PCR 20U

#define	SDL_ECC_BUS_SAFETY_MSS_PCR2 21U

#define	SDL_ECC_BUS_SAFETY_MSS_L2_A 22U

#define	SDL_ECC_BUS_SAFETY_MSS_L2_B 23U

#define	SDL_ECC_BUS_SAFETY_MSS_SWBUF 24U

#define	SDL_ECC_BUS_SAFETY_MSS_GPADC 25U

#define	SDL_ECC_BUS_SAFETY_MSS_DMM_SLV 26U

#define	SDL_ECC_BUS_SAFETY_MSS_TO_MDO 27U

#define	SDL_ECC_BUS_SAFETY_DAP_R232 28U

Macros