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AM273x MCU+ SDK
08.02.00
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62 #define CSIRX_DATA_LANES_MAX (4U)
71 #define CSIRX_COMPLEXIO_POWER_COMMAND_OFF (0U)
74 #define CSIRX_COMPLEXIO_POWER_COMMAND_ON (1U)
77 #define CSIRX_COMPLEXIO_POWER_COMMAND_ULP (2U)
88 #define CSIRX_COMPLEXIO_POWER_STATUS_OFF (0U)
91 #define CSIRX_COMPLEXIO_POWER_STATUS_ON (1U)
94 #define CSIRX_COMPLEXIO_POWER_STATUS_ULP (2U)
105 #define CSIRX_LANE_POLARITY_PLUS_MINUS (0U)
108 #define CSIRX_LANE_POLARITY_MINUS_PLUS (1U)
119 #define CSIRX_LANE_POSITION_LANE_NOT_USED (0U)
122 #define CSIRX_LANE_POSITION_1 (1U)
125 #define CSIRX_LANE_POSITION_2 (2U)
128 #define CSIRX_LANE_POSITION_3 (3U)
131 #define CSIRX_LANE_POSITION_4 (4U)
134 #define CSIRX_LANE_POSITION_5 (5U)
149 #define CSIRX_STOP_STATE_FSM_TIMEOUT_MAX (200000U)
159 #define CSIRX_ENDIANNESS_NATIVE_MIPI_CSI2 (0U)
162 #define CSIRX_ENDIANNESS_LITTLE_ENDIAN (1U)
165 #define CSIRX_ENDIANNESS_MAX (1U)
176 #define CSIRX_BURST_SIZE_1X64 (0U)
179 #define CSIRX_BURST_SIZE_2X64 (1U)
182 #define CSIRX_BURST_SIZE_4X64 (2U)
185 #define CSIRX_BURST_SIZE_8X64 (3U)
188 #define CSIRX_BURST_SIZE_MAX (3U)
202 #define CSIRX_CONTEXTS_MAX (8U)
206 #define CSIRX_PING_PONG_ADDRESS_LINEOFFSET_ALIGNMENT_IN_BYTES (32U)
209 #define CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE (0U)
213 #define CSIRX_NUM_FRAMES_TO_ACQUIRE_INFINITE (0U)
222 #define CSIRX_CONTEXT_PINGPONG_STATUS_PING_DONE (0U)
224 #define CSIRX_CONTEXT_PINGPONG_STATUS_PONG_DONE (1U)
235 #define CSIRX_PING_PONG_FRAME_SWITCHING (0U)
238 #define CSIRX_PING_PONG_LINE_SWITCHING (1U)
249 #define CSIRX_TRANSCODE_FORMAT_NO_TRANSCODE (0U)
252 #define CSIRX_TRANSCODE_FORMAT_IN_RAW10_ALAW_OUT_RAW8 (3U)
255 #define CSIRX_TRANSCODE_FORMAT_IN_RAW8_OUT_RAW8 (4U)
258 #define CSIRX_TRANSCODE_FORMAT_IN_RAW10_OUT_RAW10_EXP16 (5U)
261 #define CSIRX_TRANSCODE_FORMAT_IN_RAW10_OUT_RAW10_PACKED (6U)
264 #define CSIRX_TRANSCODE_FORMAT_IN_RAW12_OUT_RAW12_EXP16 (7U)
267 #define CSIRX_TRANSCODE_FORMAT_IN_RAW12_OUT_RAW12_PACKED (8U)
270 #define CSIRX_TRANSCODE_FORMAT_IN_RAW14_OUT_RAW14 (9U)
281 #define CSIRX_FORMAT_OTHERS_EXCEPT_NULL_AND_BLANKING (0x000U)
284 #define CSIRX_FORMAT_EMBEDDED_8_BIT_NON_IMAGE (0x012U)
287 #define CSIRX_FORMAT_YUV420_8_BIT (0x018U)
290 #define CSIRX_FORMAT_YUV420_10_BIT (0x019U)
293 #define CSIRX_FORMAT_YUV420_8_BIT_LEGACY (0x01AU)
296 #define CSIRX_FORMAT_YUV420_8_BIT_CSPS (0x01CU)
299 #define CSIRX_FORMAT_YUV420_10_BIT_CSPS (0x01DU)
302 #define CSIRX_FORMAT_YUV422_8_BIT (0x01EU)
305 #define CSIRX_FORMAT_YUV422_10_BIT (0x01FU)
308 #define CSIRX_FORMAT_RGB565 (0x022U)
311 #define CSIRX_FORMAT_RGB888 (0x024U)
314 #define CSIRX_FORMAT_RAW6 (0x028U)
317 #define CSIRX_FORMAT_RAW7 (0x029U)
320 #define CSIRX_FORMAT_RAW8 (0x02AU)
323 #define CSIRX_FORMAT_RAW10 (0x02BU)
326 #define CSIRX_FORMAT_RAW12 (0x02CU)
329 #define CSIRX_FORMAT_RAW14 (0x02DU)
335 #define CSIRX_FORMAT_RGB666_EXP32_24 (0x033U)
338 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_1 (0x040U)
341 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_2 (0x041U)
344 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_3 (0x042U)
347 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_4 (0x043U)
350 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_5 (0x044U)
353 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_6 (0x045U)
356 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_7 (0x046U)
359 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_8 (0x047U)
362 #define CSIRX_FORMAT_RAW6_EXP8 (0x068U)
365 #define CSIRX_FORMAT_RAW7_EXP8 (0x069U)
369 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_1_EXP8 (0x080U)
373 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_2_EXP8 (0x081U)
377 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_3_EXP8 (0x082U)
381 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_4_EXP8 (0x083U)
385 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_5_EXP8 (0x084U)
389 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_6_EXP8 (0x085U)
393 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_7_EXP8 (0x086U)
397 #define CSIRX_FORMAT_USER_DEFINED_8_BIT_DATA_TYPE_8_EXP8 (0x087U)
402 #define CSIRX_FORMAT_RGB444_EXP16 (0x0A0U)
407 #define CSIRX_FORMAT_RGB555_EXP16 (0x0A1U)
412 #define CSIRX_FORMAT_RAW10_EXP16 (0x0ABU)
417 #define CSIRX_FORMAT_RAW12_EXP16 (0x0ACU)
422 #define CSIRX_FORMAT_RAW14_EXP16 (0x0ADU)
427 #define CSIRX_FORMAT_RGB666_EXP32 (0x0E3U)
432 #define CSIRX_FORMAT_RGB888_EXP32 (0x0E4U)
443 #define CSIRX_USER_DEFINED_FORMAT_RAW6 (0U)
446 #define CSIRX_USER_DEFINED_FORMAT_RAW7 (1U)
451 #define CSIRX_USER_DEFINED_FORMAT_RAW8 (2U)
465 #define CSIRX_INTERRUPT_NOT_CONNECTED_ID (0xFFFFU)
474 #define CSIRX_FIFODEPTH_8X68 (2U)
477 #define CSIRX_FIFODEPTH_16X68 (3U)
480 #define CSIRX_FIFODEPTH_32X68 (4U)
483 #define CSIRX_FIFODEPTH_64X68 (5U)
486 #define CSIRX_FIFODEPTH_128X68 (6U)
489 #define CSIRX_FIFODEPTH_256X68 (7U)
514 struct CSIRX_CommonIntr_s;
561 typedef struct CSIRX_DphyConfig_s
570 uint8_t triggerEscapeCode[4];
582 typedef struct CSIRX_ComplexioLaneConfig_s
598 typedef struct CSIRX_ComplexioLaneIntr_s
627 typedef struct CSIRX_ComplexioLanesIntr_s
644 typedef struct CSIRX_ComplexioLanesConfig_s
685 typedef struct CSIRX_CommonIntr_s
735 typedef struct CSIRX_CommonIntrCallbacks_s
814 typedef struct CSIRX_CommonConfig_s {
890 typedef struct CSIRX_ContextPingPongConfig_s
927 typedef struct CSIRX_ContextCropConfig_s
950 typedef struct CSIRX_ContextTranscodeConfig_s
969 typedef struct CSIRX_ContextIntr_s {
1005 typedef struct CSIRX_ContextConfig_s {
1093 typedef struct CSIRX_Info_s {
1118 typedef struct CSIRX_Object_s {
1159 typedef struct CSIRX_HwAttrs_s {
1196 typedef struct CSIRX_Config_s {
1754 uint8_t virtualChannelId,
1755 uint32_t numOfFrames,
1756 uint32_t numLinesPerFrame,
1757 uint32_t numBytesPerLine);
uint8_t endianness
One of CSIRX_ENDIANNESS.
Definition: csirx/v0/csirx.h:857
int32_t CSIRX_commonEnable(CSIRX_Handle handle)
Enable CSIRX interface.
int32_t CSIRX_contextDisable(CSIRX_Handle handle, uint8_t contextId)
Disable context.
int32_t CSIRX_complexioGetPendingIntr(CSIRX_Handle handle, CSIRX_ComplexioLanesIntr *intrStatus)
Get all pending complex IO interrupts.
static int32_t CSIRX_complexioUltraLowPower(CSIRX_Handle handle)
Put complex IO in ULP (Ultra Low Power) state.
Definition: csirx/v0/csirx.h:1480
uint32_t ctrlClockHz
CSI interface control clock in Hz. In AM723x, this is 96000000 Hz.
Definition: csirx/v0/csirx.h:1170
void * startOfFrameIntr0CallbackArgs
Argument for CSIRX_CommonIntrCallbacks::startOfFrameIntr0Callback.
Definition: csirx/v0/csirx.h:794
bool isHorizontalDownscalingBy2Enabled
If true, horizontal down scaling by 2 is enabled, else disabled.
Definition: csirx/v0/csirx.h:956
ping-pong related configuration for each context. Note specified ping and pong addresses can be ident...
Definition: csirx/v0/csirx.h:891
int32_t CSIRX_complexioClearAllIntr(CSIRX_Handle handle)
Celar all pending complex IO interrupts.
bool isLongPacketOneBitErrorCorrect
If true, 1-bit error was detected and corrected in long packet. Influenced by CSIRX_CommonConfig::isH...
Definition: csirx/v0/csirx.h:1000
uint32_t endOfFrameIntr0ContextId
NOT to used by end users.
Definition: csirx/v0/csirx.h:1133
void * combinedEndOfLineCallbackArgs
Argument for CSIRX_CommonIntrCallbacks::combinedEndOfLineCallback.
Definition: csirx/v0/csirx.h:746
bool isOneBitShortPacketErrorCorrect
if true, ECC has been used to do the correction of 1-bit error (short packet only)....
Definition: csirx/v0/csirx.h:702
void * startOfFrameIntr1CallbackArgs
Argument for CSIRX_CommonIntrCallbacks::startOfFrameIntr1Callback.
Definition: csirx/v0/csirx.h:807
int32_t CSIRX_complexioSetConfig(CSIRX_Handle handle, CSIRX_ComplexioConfig *config)
Configure Complex IO.
Context interrupts.
Definition: csirx/v0/csirx.h:969
uint16_t startOfFrameIntr0IntNum
CPU Interrupt number, if interrupt not connected, set to CSIRX_INTERRUPT_NOT_CONNECTED_ID.
Definition: csirx/v0/csirx.h:1185
uint16_t startOfFrameIntr1IntNum
CPU Interrupt number, if interrupt not connected, set to CSIRX_INTERRUPT_NOT_CONNECTED_ID.
Definition: csirx/v0/csirx.h:1188
void CSIRX_ContextConfig_init(CSIRX_ContextConfig *config)
Sets default values for configuration.
uint8_t endOfFrameIntr0ContextId
Context Id for generation of EOF Interrupt 0.
Definition: csirx/v0/csirx.h:866
uint16_t numFramesToAcquire
number of frames to acquire. Special value CSIRX_NUM_FRAMES_TO_ACQUIRE_INFINITE for infinite frames
Definition: csirx/v0/csirx.h:1019
CSIRX Instance Config Object.
Definition: csirx/v0/csirx.h:1196
uint32_t stopStateFsmTimeoutInNanoSecs
stop state FSM timeout in Nano seconds. The maximum timeout possible is equal to 1/CSIRX_INTERCONNECT...
Definition: csirx/v0/csirx.h:849
int32_t CSIRX_complexioAssertForceRxModeOn(CSIRX_Handle handle)
Assert Force Rx Mode on complex IO.
int32_t CSIRX_commonDisable(CSIRX_Handle handle)
Disable CSIRX interface.
bool isOpen
0: instance is not opened, 1: instance is open
Definition: csirx/v0/csirx.h:1121
uint8_t virtualChannelId
Virtual channel Id as per MIPI spec.
Definition: csirx/v0/csirx.h:1008
int32_t CSIRX_contextSetLineOffset(CSIRX_Handle handle, uint8_t contextId, int32_t lineOffset)
Set context line offset.
CSIRX Instance information.
Definition: csirx/v0/csirx.h:1093
int32_t CSIRX_debugModeDisable(CSIRX_Handle handle)
Disable debug mode.
uint16_t format
Data format, one of CSIRX_DATA_FORMAT.
Definition: csirx/v0/csirx.h:1011
bool isGenerateIntrEveryNumLinesForIntr
see description of CSIRX_ContextIntr::isNumLines
Definition: csirx/v0/csirx.h:1054
CSIRX_ComplexioLaneIntr clockLane
clock lane interrupt configuration
Definition: csirx/v0/csirx.h:640
int32_t CSIRX_close(CSIRX_Handle handle)
Close CSIRX instance.
bool isFifoOverflow
if true, it indicates data input rate is higher than the data output rate resulting in the receive FI...
Definition: csirx/v0/csirx.h:720
bool isEndOfLinePulseEnabled
if enabled, end of line pulse is generated at the end of the line. This controls the combined End of ...
Definition: csirx/v0/csirx.h:1047
void(* CSIRX_ContextCallback)(CSIRX_Handle handle, void *arg, uint8_t contextId)
Context interrupt callback.
Definition: csirx/v0/csirx.h:550
int32_t CSIRX_contextClearAllIntr(CSIRX_Handle handle, uint8_t contextId)
Clear all pending context interrupts.
uint8_t burstSize
Sets the DMA burst size on the interconnect to one of CSIRX_BURST_SIZE. Only effective if isBurstSize...
Definition: csirx/v0/csirx.h:854
int32_t CSIRX_dphySetConfig(CSIRX_Handle handle, CSIRX_DphyConfig *config)
Configure DPHY.
Common to all context configuration.
Definition: csirx/v0/csirx.h:814
CSIRX Instance Object. Used internally, not to be used by end users.
Definition: csirx/v0/csirx.h:1118
#define CSIRX_COMPLEXIO_POWER_COMMAND_ON
Power on ComplexIO.
Definition: csirx/v0/csirx.h:74
uint16_t combinedEndOfFrameIntNum
CPU Interrupt number, if interrupt not connected, set to CSIRX_INTERRUPT_NOT_CONNECTED_ID.
Definition: csirx/v0/csirx.h:1182
void * commonCallbackArgs
Argument for CSIRX_CommonIntrCallbacks::commonCallback.
Definition: csirx/v0/csirx.h:781
bool isPayloadChecksumEnable
If true, enables checksum checking of long packet payload. Influenced by CSIRX_ContextIntr::isPayload...
Definition: csirx/v0/csirx.h:1051
uint8_t position
position, one of CSIRX_LANE_POSITION
Definition: csirx/v0/csirx.h:588
bool isComplexioError
if true, one or more of complex IO errors defined in CSIRX_ComplexioLanesIntr happened....
Definition: csirx/v0/csirx.h:712
int32_t CSIRX_contextGetPendingIntr(CSIRX_Handle handle, uint8_t contextId, CSIRX_ContextIntr *intrStatus)
Get all pending context interrupts.
int32_t CSIRX_complexioDeassertReset(CSIRX_Handle handle)
Deaasert complex IO reset.
Complex IO all (logical) lanes interrupts.
Definition: csirx/v0/csirx.h:628
int32_t CSIRX_contextEnable(CSIRX_Handle handle, uint8_t contextId)
Enable context.
uint16_t alpha
controls the padding for *_EXP16, *_EXP32 and *_EXP32_24 data formats of the format field
Definition: csirx/v0/csirx.h:1026
bool isGenericEnabled
If true, data is received as per format and the long packet code transmitted in the MIPI stream is ig...
Definition: csirx/v0/csirx.h:1038
bool isAllLanesExitULPM
true if at least one of the active lanes has exit ULPM (Ultra Low Power Mode)
Definition: csirx/v0/csirx.h:634
bool isStartOfTransmissionError
true if Start of Transmission (SOT) error happened, else false
Definition: csirx/v0/csirx.h:615
static int32_t CSIRX_complexioPowerOff(CSIRX_Handle handle)
Power OFF complex IO.
Definition: csirx/v0/csirx.h:1468
static int32_t CSIRX_complexioPowerOn(CSIRX_Handle handle)
Power ON complex IO.
Definition: csirx/v0/csirx.h:1456
int32_t CSIRX_reset(CSIRX_Handle handle)
Reset CSIRX instance.
bool isNumLines
If true, indicates number of lines specified in CSIRX_ContextConfig::numLinesForIntr were received....
Definition: csirx/v0/csirx.h:976
int32_t CSIRX_init()
Initialize CSIRX driver.
uint16_t numLinesForIntr
see description of CSIRX_ContextIntr::isNumLines
Definition: csirx/v0/csirx.h:1022
CSIRX_Callback combinedEndOfFrameCallback
Combined End of Frame call back function definition.
Definition: csirx/v0/csirx.h:755
bool isFramesToAcquire
If true, indicates CSIRX_ContextConfig::numFramesToAcquire frames have been acquired.
Definition: csirx/v0/csirx.h:980
CSIRX_Config gCsirxConfig[]
Array of CSIRX instance enabled via SysConfig.
uint32_t startOfFrameIntr1ContextId
NOT to used by end users.
Definition: csirx/v0/csirx.h:1130
HwiP_Object combinedEndOfLineIntrObj
NOT to used by end users.
Definition: csirx/v0/csirx.h:1145
int32_t CSIRX_getInfo(CSIRX_Handle handle, CSIRX_Info *info)
Get CSIRX instance info.
Transcoding configuration.
Definition: csirx/v0/csirx.h:951
CSIRX HW Attributes. Generated when using sysconfig.
Definition: csirx/v0/csirx.h:1159
int32_t CSIRX_commonGetPendingIntr(CSIRX_Handle handle, CSIRX_CommonIntr *intrStatus)
Get all pending common to all context interrupts.
CSIRX_CommonIntr enableIntr
Common interrupt to enable or disable.
Definition: csirx/v0/csirx.h:872
bool isLineEndCodeDetect
If true, triggers when Line End sync Code is detected.
Definition: csirx/v0/csirx.h:990
int32_t CSIRX_complexioIsResetDone(CSIRX_Handle handle, bool *isDone)
Check if complex IO reset is done.
uint8_t numContexts
Number of contexts.
Definition: csirx/v0/csirx.h:1102
uint16_t verticalCount
13-bit field that indicates lines to output per frame when value is between 1 and 8191....
Definition: csirx/v0/csirx.h:943
bool isHeaderErrorCheckEnabled
If true, enables the Error Correction Code check for the received header (short and long packets for ...
Definition: csirx/v0/csirx.h:825
int32_t CSIRX_commonClearAllIntr(CSIRX_Handle handle)
Clear all pending common to all context interrupts.
CSIRX_CommonCallback commonCallback
Common interrupt call back function definition.
Definition: csirx/v0/csirx.h:778
bool isGenericShortPacketReceive
true if short packet was received other than the MIPI sync events: Frame Start Code (0x0) Frame E...
Definition: csirx/v0/csirx.h:697
int32_t CSIRX_dphyIsByteClockResetDone(CSIRX_Handle handle, bool *isDone)
Check if DPHY byte clock reset is done.
uint32_t startOfFrameIntr0ContextId
NOT to used by end users.
Definition: csirx/v0/csirx.h:1127
CSIRX_ContextCallback startOfFrameIntr0Callback
Start of Frame (SOF) Interrupt 0 call back function definition.
Definition: csirx/v0/csirx.h:791
bool isAllLanesEnterULPM
true if all lanes transitioned to ULPM (Ultra Low Power Mode)
Definition: csirx/v0/csirx.h:630
uint8_t startOfFrameIntr1ContextId
Context Id for generation of SOF Interrupt 1.
Definition: csirx/v0/csirx.h:863
bool isOcpError
reserved, keep this as 0
Definition: csirx/v0/csirx.h:688
bool isPayloadChecksumMismatch
If true, long packet payoad check-sum mismatched. Influenced by CSIRX_ContextConfig::isPayloadChecksu...
Definition: csirx/v0/csirx.h:984
CSIRX_ContextCropConfig crop
Cropping configuration.
Definition: csirx/v0/csirx.h:959
bool isClockMissingDetectionEnabled
Set to true if wanting to enable clock missing detector.
Definition: csirx/v0/csirx.h:567
DPHY configuration.
Definition: csirx/v0/csirx.h:562
#define CSIRX_COMPLEXIO_POWER_COMMAND_ULP
Put ComplexIO in ULP (Ultra Low Power) state.
Definition: csirx/v0/csirx.h:77
HwiP_Object commonIntrObj
NOT to used by end users.
Definition: csirx/v0/csirx.h:1142
CSIRX_ContextTranscodeConfig transcodeConfig
Transcode configuration.
Definition: csirx/v0/csirx.h:1057
All lanes configuration.
Definition: csirx/v0/csirx.h:645
int32_t CSIRX_complexioSetPowerCommand(CSIRX_Handle handle, uint8_t powerCommand)
Set Complex IO power command.
bool isMoreThanOneBitShortPacketErrorCannotCorrect
if true, more than 1-bit error that cannot be ECC corrected and was detected in the short packet or l...
Definition: csirx/v0/csirx.h:707
uint8_t userDefinedMapping
Selects the pixel format of USER_DEFINED in CSIRX_DATA_FORMAT configuration. One of CSIRX_USER_DEFINE...
Definition: csirx/v0/csirx.h:1015
uint32_t pingAddress
ping address in which the frame/line data is received, must have 5 LSBs 0. User must provision for su...
Definition: csirx/v0/csirx.h:895
int32_t CSIRX_deinit()
De-Initialize CSIRX driver.
#define CSIRX_COMPLEXIO_POWER_COMMAND_OFF
Power off ComplexIO.
Definition: csirx/v0/csirx.h:71
bool isStartOfTransmissionSyncError
true if Start of Transmission (SOT) Synchronization error happened, else false
Definition: csirx/v0/csirx.h:612
int32_t CSIRX_debugModeSetLongPacketPayload(CSIRX_Handle handle, uint32_t payload)
Set long packet payload.
void * eolCallbackArgs
Arguments for CSIRX_ContextConfig::eolCallback.
Definition: csirx/v0/csirx.h:1080
CSIRX_Object * object
Instance Object.
Definition: csirx/v0/csirx.h:1199
uint16_t horizontalCount
13-bit field that indicates pixels to output per line when value is between 1 and 8191....
Definition: csirx/v0/csirx.h:934
uint8_t transcodeFormat
Transcoding format, one of CSIRX_TRANSCODE_FORMAT.
Definition: csirx/v0/csirx.h:953
bool isStateTransitionToULPM
true if lane transitioned to ULPM (Ultra Low Power Mode), else false
Definition: csirx/v0/csirx.h:602
CSIRX_HwAttrs const * hwAttrs
Instance HW Attributes.
Definition: csirx/v0/csirx.h:1202
int32_t CSIRX_debugModeSetShortPacket(CSIRX_Handle handle, uint32_t shortPacket)
Set short packet header.
#define CSIRX_CONTEXTS_MAX
Max possible CSIRX contexts.
Definition: csirx/v0/csirx.h:202
bool isByteSwapEnabled
If true, enables byte swapping of payload data when it is multiples of 16-bits. Byte swapping is perf...
Definition: csirx/v0/csirx.h:1032
int32_t CSIRX_complexioDeassertForceRxModeOn(CSIRX_Handle handle)
De-assert Force Rx Mode on complex IO.
CSIRX_Callback combinedEndOfLineCallback
Combined End of Line call back function definition.
Definition: csirx/v0/csirx.h:743
bool isFrameEndCodeDetect
If true, triggers when Frame End sync Code is detected.
Definition: csirx/v0/csirx.h:996
Lane configuration.
Definition: csirx/v0/csirx.h:583
Context configuration.
Definition: csirx/v0/csirx.h:1005
CSIRX_CommonIntrCallbacks intrCallbacks
NOT to used by end users.
Definition: csirx/v0/csirx.h:1139
void CSIRX_ComplexioConfig_init(CSIRX_ComplexioConfig *config)
Sets default values for configuration.
uint8_t startOfFrameIntr0ContextId
Context Id for generation of SOF Interrupt 0.
Definition: csirx/v0/csirx.h:860
uint32_t ddrClockInHz
DDR clock speed in Hz.
Definition: csirx/v0/csirx.h:564
uint8_t endOfFrameIntr1ContextId
Context Id for generation of EOF Interrupt 1.
Definition: csirx/v0/csirx.h:869
uint8_t pingPongSwitchMode
ping-pong switching mode, one of CSIRX_PING_PONG_SWITCHING_MODE. If line based, ping-pong switch happ...
Definition: csirx/v0/csirx.h:915
CSIRX_CommonIntrCallbacks intrCallbacks
Common interrupt callbacks.
Definition: csirx/v0/csirx.h:875
int32_t CSIRX_contextGetFrameNumber(CSIRX_Handle handle, uint8_t contextId, uint16_t *frameNumber)
Get current frame number as decoded from within CSIRX long packet.
bool isSoftStoppingOnInterfaceDisable
If true, when CSIRX_commonDisable is issued, the interface stops after full frames are received in al...
Definition: csirx/v0/csirx.h:819
uint32_t rcssCtrlRegs
Additional CSIRX control registers, located in SOC top level CTRL regs.
Definition: csirx/v0/csirx.h:1164
uint32_t pingAddress
Current programmed ping address.
Definition: csirx/v0/csirx.h:1110
int32_t CSIRX_debugModeEnable(CSIRX_Handle handle)
Enable debug mode.
HwiP_Object startOfFrameIntr1IntrObj
NOT to used by end users.
Definition: csirx/v0/csirx.h:1154
Complex IO per lane interrupt.
Definition: csirx/v0/csirx.h:599
uint32_t hwInstId
HW instance ID, 0: CSI2A, 1: CSI2B as so on.
Definition: csirx/v0/csirx.h:1167
uint8_t polarity
polarity, one of CSIRX_LANE_POLARITY
Definition: csirx/v0/csirx.h:585
int32_t CSIRX_contextGetRecvAddress(CSIRX_Handle handle, uint8_t contextId, uint32_t *bufAddress)
Get current completed receive address.
void CSIRX_debugModeGenerateFrames(CSIRX_Handle handle, uint16_t txFormat, uint8_t virtualChannelId, uint32_t numOfFrames, uint32_t numLinesPerFrame, uint32_t numBytesPerLine)
Generate frames in debug mode.
int32_t lineOffset
line offset as defined in the TRM (CSI2_CTX_DAT_OFST::OFST). Special value CSIRX_LINEOFFSET_CONTIGUOU...
Definition: csirx/v0/csirx.h:908
bool isOcpAutoIdle
If true, automatic OCP clock gatingbased on OCP activity is enabled. If false, OCP clock is free runn...
Definition: csirx/v0/csirx.h:841
uint32_t csirxRegs
CSIRX IP registers.
Definition: csirx/v0/csirx.h:1161
int32_t CSIRX_commonSetConfig(CSIRX_Handle handle, CSIRX_CommonConfig *config)
Configure common to all context settings.
Cropping configuration.
Definition: csirx/v0/csirx.h:928
CSIRX_ContextPingPongConfig pingPongConfig
ping-pong configuration
Definition: csirx/v0/csirx.h:1060
int32_t CSIRX_complexioIsDeassertForceRxModeOn(CSIRX_Handle handle, bool *isDeasserted)
Check if force RX mode on is deasserted.
int32_t CSIRX_contextSetPingPongAddress(CSIRX_Handle handle, uint8_t contextId, uint32_t pingAddress, uint32_t pongAddress)
Set context ping and pong address.
#define CSIRX_DATA_LANES_MAX
Max possible data lanes.
Definition: csirx/v0/csirx.h:62
uint32_t endOfFrameIntr1ContextId
NOT to used by end users.
Definition: csirx/v0/csirx.h:1136
uint16_t horizontalSkip
Pixels to skip horizontally between 0 and 8191.
Definition: csirx/v0/csirx.h:937
uint32_t interconnectClockHz
CSI interconnect control clock in Hz. In AM723x, this is 200000000 Hz.
Definition: csirx/v0/csirx.h:1173
Context specific state information, not to be used by end users.
Definition: csirx/v0/csirx.h:1107
bool isFrameStartCodeDetect
If true, triggers when Frame Start sync Code is detected.
Definition: csirx/v0/csirx.h:993
HwiP_Object combinedEndOfFrameIntrObj
NOT to used by end users.
Definition: csirx/v0/csirx.h:1148
int32_t CSIRX_commonGetGenericShortPacket(CSIRX_Handle handle, uint32_t *shortPacket)
Get generic short packet header.
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
CSIRX_ContextCallback startOfFrameIntr1Callback
Start of Frame (SOF) Interrupt 1 call back function definition.
Definition: csirx/v0/csirx.h:804
uint16_t verticalSkip
Pixels to skip vertically between 0 and 8191.
Definition: csirx/v0/csirx.h:946
uint16_t numLinesForLineBasedPingPongSwitching
number of lines for line based ping-pong switching. Typically used in radar for multi-chirp (when chi...
Definition: csirx/v0/csirx.h:923
HwiP_Object startOfFrameIntr0IntrObj
NOT to used by end users.
Definition: csirx/v0/csirx.h:1151
void CSIRX_DphyConfig_init(CSIRX_DphyConfig *config)
Sets default values for configuration.
uint8_t numFramesForFrameBasedPingPongSwitching
number of frames for frame based ping-pong switching. Typically used in interlaced mode (=2)....
Definition: csirx/v0/csirx.h:919
bool isEscapeEntryError
true if escape entry error happened, else false
Definition: csirx/v0/csirx.h:608
CSIRX_ComplexioLaneConfig clockLane
clock lanes configuration
Definition: csirx/v0/csirx.h:650
Complex IO configuration.
Definition: csirx/v0/csirx.h:655
int32_t CSIRX_debugModeSetLongPacketHeader(CSIRX_Handle handle, uint32_t longPacketHeader)
Set long packet header.
uint16_t combinedEndOfLineIntNum
CPU Interrupt number, if interrupt not connected, set to CSIRX_INTERRUPT_NOT_CONNECTED_ID.
Definition: csirx/v0/csirx.h:1179
uint8_t fifoDepth
Output FIFO depth, one of CSIRX_FIFODEPTH.
Definition: csirx/v0/csirx.h:1099
uint32_t pongAddress
Current programmed pong address.
Definition: csirx/v0/csirx.h:1113
bool isEndOfFramePulseEnabled
if enabled, end of frame pulse is generated at the end of the frame. This controls the combined End o...
Definition: csirx/v0/csirx.h:1042
int32_t CSIRX_complexioGetPowerStatus(CSIRX_Handle handle, uint8_t *powerStatus)
Query about ComplexIO power status.
uint32_t gCsirxConfigNum
Number of CSIRX instances enabled via SysConfig.
CSIRX_ContextIntr enableIntr
Context interrupts to enable/disable.
Definition: csirx/v0/csirx.h:1063
bool isPowerAuto
If true, automatically switches between ULP and ON states based on ULPM signals from complex IO.
Definition: csirx/v0/csirx.h:664
uint8_t revisionId
4-bit Major Revision ID + 4-bit minor revision ID
Definition: csirx/v0/csirx.h:1096
Callbacks and callback arguments for various common interrupt event.
Definition: csirx/v0/csirx.h:736
Common (across contexts) interrupts.
Definition: csirx/v0/csirx.h:686
int32_t CSIRX_dphyIsControlClockResetDone(CSIRX_Handle handle, bool *isDone)
Check if DPHY control clock reset is done.
bool isNonPostedWrites
If true, writes are non posted.
Definition: csirx/v0/csirx.h:837
void(* CSIRX_CommonCallback)(CSIRX_Handle handle, void *arg, struct CSIRX_CommonIntr_s *irq)
Common interrupt callback.
Definition: csirx/v0/csirx.h:525
bool isControlError
true if control error happened, else false
Definition: csirx/v0/csirx.h:605
bool isLineStartCodeDetect
If true, triggers when Line Start sync Code is detected.
Definition: csirx/v0/csirx.h:987
CSIRX_ComplexioLanesIntr enableIntr
enable/disable lanes interrupts
Definition: csirx/v0/csirx.h:660
CSIRX_ComplexioLanesConfig lanesConfig
lanes configuration
Definition: csirx/v0/csirx.h:657
void CSIRX_CommonConfig_init(CSIRX_CommonConfig *config)
Sets default values for configuration.
bool isSignExtensionEnabled
If true, enables sign extension of RAW10/12/14 for all contexts whose CSIRX_ContextConfig::format is ...
Definition: csirx/v0/csirx.h:830
bool isBurstSizeExpand
If false, then burst size is determined by CSIRX_CommonConfig::burstSize, otherwise (if true),...
Definition: csirx/v0/csirx.h:834
struct CSIRX_Config_s * CSIRX_Handle
CSIRX driver handle.
Definition: csirx/v0/csirx.h:494
int32_t CSIRX_contextSetConfig(CSIRX_Handle handle, uint8_t contextId, CSIRX_ContextConfig *config)
Configure context.
CSIRX_Handle CSIRX_open(uint32_t instanceId)
Open CSIRX driver.
CSIRX_ContextCallback eolCallback
Context End of Line interrupt call back function definition - NOT SUPPORTED AS OF NOW.
Definition: csirx/v0/csirx.h:1077
int32_t CSIRX_dphyIsClockMissingDetectorError(CSIRX_Handle handle, bool *isError)
Check if DPHY clock missing detector error.
void * combinedEndOfFrameCallbackArgs
Argument for CSIRX_CommonIntrCallbacks::combinedEndOfFrameCallback.
Definition: csirx/v0/csirx.h:758
int32_t CSIRX_contextGetPingPongStatus(CSIRX_Handle handle, uint8_t contextId, uint8_t *pingPongStatus)
Get status if ping or pong buffer write is done.
uint32_t pongAddress
pong address in which the frame/line data is received, must have 5 LSBs 0. User must provision for su...
Definition: csirx/v0/csirx.h:900
void(* CSIRX_Callback)(CSIRX_Handle handle, void *arg)
Generic Interrupt callback.
Definition: csirx/v0/csirx.h:533
uint16_t commonIntNum
CPU Interrupt number, if interrupt not connected, set to CSIRX_INTERRUPT_NOT_CONNECTED_ID.
Definition: csirx/v0/csirx.h:1176