AM273x MCU+ SDK  08.02.00
CSIRX_ContextPingPongConfig Struct Reference

Detailed Description

ping-pong related configuration for each context. Note specified ping and pong addresses can be identical which will effectively disable double buffering.

Data Fields

uint32_t pingAddress
 ping address in which the frame/line data is received, must have 5 LSBs 0. User must provision for sufficient size to cover multiple lines/frames depending on configuration More...
 
uint32_t pongAddress
 pong address in which the frame/line data is received, must have 5 LSBs 0. User must provision for sufficient size to cover multiple lines/frames depending on configuration More...
 
int32_t lineOffset
 line offset as defined in the TRM (CSI2_CTX_DAT_OFST::OFST). Special value CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE for contiguous storage, otherwise line offset sets the destination offset between the first pixel of the previous line and the first pixel of the current line. Units in bytes. This is a 17-bit signed number (line offset can be negative) and must must have 5 LSBs as 0 More...
 
uint8_t pingPongSwitchMode
 ping-pong switching mode, one of CSIRX_PING_PONG_SWITCHING_MODE. If line based, ping-pong switch happens every CSIRX_ContextPingPongConfig::numLinesForLineBasedPingPongSwitching lines. If frame based,ping-pong switch happens every CSIRX_ContextPingPongConfig::numFramesForFrameBasedPingPongSwitching More...
 
uint8_t numFramesForFrameBasedPingPongSwitching
 number of frames for frame based ping-pong switching. Typically used in interlaced mode (=2). For progressive mode is set to 1 More...
 
uint16_t numLinesForLineBasedPingPongSwitching
 number of lines for line based ping-pong switching. Typically used in radar for multi-chirp (when chirp is a line) processing More...
 

Field Documentation

◆ pingAddress

uint32_t CSIRX_ContextPingPongConfig::pingAddress

ping address in which the frame/line data is received, must have 5 LSBs 0. User must provision for sufficient size to cover multiple lines/frames depending on configuration

◆ pongAddress

uint32_t CSIRX_ContextPingPongConfig::pongAddress

pong address in which the frame/line data is received, must have 5 LSBs 0. User must provision for sufficient size to cover multiple lines/frames depending on configuration

◆ lineOffset

int32_t CSIRX_ContextPingPongConfig::lineOffset

line offset as defined in the TRM (CSI2_CTX_DAT_OFST::OFST). Special value CSIRX_LINEOFFSET_CONTIGUOUS_STORAGE for contiguous storage, otherwise line offset sets the destination offset between the first pixel of the previous line and the first pixel of the current line. Units in bytes. This is a 17-bit signed number (line offset can be negative) and must must have 5 LSBs as 0

◆ pingPongSwitchMode

uint8_t CSIRX_ContextPingPongConfig::pingPongSwitchMode

ping-pong switching mode, one of CSIRX_PING_PONG_SWITCHING_MODE. If line based, ping-pong switch happens every CSIRX_ContextPingPongConfig::numLinesForLineBasedPingPongSwitching lines. If frame based,ping-pong switch happens every CSIRX_ContextPingPongConfig::numFramesForFrameBasedPingPongSwitching

◆ numFramesForFrameBasedPingPongSwitching

uint8_t CSIRX_ContextPingPongConfig::numFramesForFrameBasedPingPongSwitching

number of frames for frame based ping-pong switching. Typically used in interlaced mode (=2). For progressive mode is set to 1

◆ numLinesForLineBasedPingPongSwitching

uint16_t CSIRX_ContextPingPongConfig::numLinesForLineBasedPingPongSwitching

number of lines for line based ping-pong switching. Typically used in radar for multi-chirp (when chirp is a line) processing