qspi/v0/qspi.h

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/*
 *  Copyright (C) 2021 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef QSPI_H_
#define QSPI_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <stdint.h>
#include <stdbool.h>
#include <kernel/dpl/HwiP.h>
#include <kernel/dpl/SemaphoreP.h>
#include <drivers/hw_include/cslr_qspi.h>
#include <drivers/edma.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
 
typedef void *QSPI_Handle;
 
#define QSPI_CS0  (0U)
#define QSPI_CS1  (1U)
#define QSPI_CS2  (2U)
#define QSPI_CS3  (3U)
 
#define QSPI_CMD_INVALID_OPCODE  (0xFFU)
#define QSPI_CMD_INVALID_ADDR    (0xFFFFFFFFU)
 
#define QSPI_TRANSFER_COMPLETED        (0U)
#define QSPI_TRANSFER_STARTED          (1U)
#define QSPI_TRANSFER_CANCELLED        (2U)
#define QSPI_TRANSFER_FAILED           (3U)
#define QSPI_TRANSFER_CSN_DEASSERT     (4U)
#define QSPI_TRANSFER_TIMEOUT          (5U)
 
#define QSPI_RX_LINES_SINGLE    (0U)
#define QSPI_RX_LINES_DUAL      (1U)
#define QSPI_RX_LINES_QUAD      (2U)
 
#define QSPI_FF_POL0_PHA0   ((CSL_QSPI_SPI_DC_REG_CKPH0_CKP_0_SHIFT_OUT_FALLING_EDGE \
                            << CSL_QSPI_SPI_DC_REG_CKPH0_SHIFT) |                    \
                            (CSL_QSPI_SPI_DC_REG_CKP0_DATA_INACTIVE <<               \
                            CSL_QSPI_SPI_DC_REG_CKP0_SHIFT))
#define QSPI_FF_POL0_PHA1   ((CSL_QSPI_SPI_DC_REG_CKPH0_CKP_0_SHIFT_OUT_RISING_EDGE  \
                            << CSL_QSPI_SPI_DC_REG_CKPH0_SHIFT) |                    \
                            (CSL_QSPI_SPI_DC_REG_CKP0_DATA_INACTIVE <<               \
                            CSL_QSPI_SPI_DC_REG_CKP0_SHIFT))
#define QSPI_FF_POL1_PHA0   ((CSL_QSPI_SPI_DC_REG_CKPH0_CKP_1_SHIFT_OUT_RISING_EDGE  \
                            << CSL_QSPI_SPI_DC_REG_CKPH0_SHIFT) |                    \
                            (CSL_QSPI_SPI_DC_REG_CKP0_DATA_ACTIVE <<                 \
                            CSL_QSPI_SPI_DC_REG_CKP0_SHIFT))
#define QSPI_FF_POL1_PHA1   ((CSL_QSPI_SPI_DC_REG_CKPH0_CKP_1_SHIFT_OUT_FALLING_EDGE \
                            << CSL_QSPI_SPI_DC_REG_CKPH0_SHIFT) |                    \
                            (CSL_QSPI_SPI_DC_REG_CKP0_DATA_ACTIVE <<                 \
                            CSL_QSPI_SPI_DC_REG_CKP0_SHIFT))
 
#define QSPI_CS_POL_ACTIVE_LOW    (CSL_QSPI_SPI_DC_REG_CSP0_ACTIVE_LOW)
#define QSPI_CS_POL_ACTIVE_HIGH   (CSL_QSPI_SPI_DC_REG_CSP0_ACTIVE_HIGH)
 
#define QSPI_DATA_DELAY_0   (CSL_QSPI_SPI_DC_REG_DD0_CS_TO_DATA_DELAY_0)
#define QSPI_DATA_DELAY_1   (CSL_QSPI_SPI_DC_REG_DD0_CS_TO_DATA_DELAY_1)
#define QSPI_DATA_DELAY_2   (CSL_QSPI_SPI_DC_REG_DD0_CS_TO_DATA_DELAY_2)
#define QSPI_DATA_DELAY_3   (CSL_QSPI_SPI_DC_REG_DD0_CS_TO_DATA_DELAY_3)
 
/* ========================================================================== */
/*                             Structure Definitions                          */
/* ========================================================================== */
 
typedef struct
{
    uint32_t                count;
    void                   *buf;
    uint32_t                addrOffset;
    uint32_t                status;
    uint32_t                transferTimeout;
} QSPI_Transaction;
 
typedef struct
{
    uint8_t cmd;
    uint32_t cmdAddr;
    uint8_t numAddrBytes;
    void *rxDataBuf;
    uint32_t rxDataLen;
} QSPI_ReadCmdParams;
 
typedef struct
{
    uint8_t cmd;
    uint32_t cmdAddr;
    uint8_t numAddrBytes;
    void *txDataBuf;
    uint32_t txDataLen;
} QSPI_WriteCmdParams;
 
typedef struct
{
    uint32_t edmaInst;
} QSPI_Params;
 
typedef struct
{
    uint32_t edmaTcc;
    uint32_t edmaChId;
    uint32_t edmaParam;
    uint32_t edmaRegionId;
    uint32_t edmaBaseAddr;
    uint32_t isIntEnabled;
    Edma_IntrObject edmaIntrObj;
    SemaphoreP_Object gEdmaTransferDoneSem;
} QSPI_EdmaParams;
 
typedef struct
{
    /*
     * User params
     */
    QSPI_Handle     handle;
    uint32_t        transferMode;
    uint32_t        rxLines;
    uint8_t         readCmd;
    uint8_t         writeCmd;
    uint32_t        frmLength;
    uint32_t        numAddrBytes;
    uint32_t        numDummyBits;
    QSPI_EdmaParams qspiEdmaParams;
    void*           qspiEdmaHandle;
    /*
     * State variables
     */
    uint32_t            isOpen;
    SemaphoreP_Object   lockObj;
    SemaphoreP_Object   transferSemObj;
    HwiP_Object         hwiObj;
    QSPI_Transaction    *transaction;
} QSPI_Object;
 
 
typedef struct
{
    /*
     * SOC configuration
     */
    uintptr_t   baseAddr;
    uintptr_t   memMapBaseAddr;
    uint32_t    inputClkFreq;
    uint32_t    baudRateDiv;
    uint32_t    chipSelect;
    uint32_t    csPol;
    uint32_t    frmFmt;
    uint32_t    dataDelay;
    uint32_t    rxLines;
    uint32_t    wrdLen;
    uint32_t    intrNum;
    uint32_t    intrEnable;
    uint8_t     intrPriority;
    uint32_t    dmaEnable;
} QSPI_Attrs;
 
typedef struct
{
    const QSPI_Attrs *attrs;
    QSPI_Object *object;
} QSPI_Config;
 
extern QSPI_Config gQspiConfig[];
extern uint32_t    gQspiConfigNum;
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
void QSPI_init(void);
 
void QSPI_deinit(void);
 
void QSPI_Params_init( QSPI_Params *qspiParams);
 
QSPI_Handle QSPI_open(uint32_t index, const QSPI_Params *openParams);
 
void QSPI_close(QSPI_Handle handle);
 
QSPI_Handle QSPI_getHandle(uint32_t index);
 
int32_t QSPI_readMemMapMode(QSPI_Handle handle, QSPI_Transaction *trans);
 
int32_t QSPI_writeConfigMode(QSPI_Handle handle, QSPI_Transaction *trans);
void QSPI_transaction_init(QSPI_Transaction *trans);
 
void QSPI_readCmdParams_init(QSPI_ReadCmdParams *rdParams);
 
void QSPI_writeCmdParams_init(QSPI_WriteCmdParams *wrParams);
 
int32_t QSPI_readCmd(QSPI_Handle handle, QSPI_ReadCmdParams *rdParams);
 
int32_t QSPI_writeCmd(QSPI_Handle handle, QSPI_WriteCmdParams *wrParams);
 
int32_t QSPI_setWriteCmd(QSPI_Handle handle, uint8_t command);
 
int32_t QSPI_setReadCmd(QSPI_Handle handle, uint8_t command);
 
int32_t QSPI_setAddressByteCount(QSPI_Handle handle, uint32_t count);
 
int32_t QSPI_setDummyBitCount(QSPI_Handle handle, uint32_t count);
 
int32_t QSPI_setMemAddrSpace(QSPI_Handle handle, uint32_t memMappedPortSwitch);
 
int32_t QSPI_intEnable(QSPI_Handle handle, uint32_t intFlag);
 
int32_t QSPI_intDisable(QSPI_Handle handle, uint32_t intFlag);
 
int32_t QSPI_intClear(QSPI_Handle handle, uint32_t intFlag);
 
int32_t QSPI_setPreScaler(QSPI_Handle handle, uint32_t clkDividerVal);
 
void OSPI_phyGetTuningData(uint32_t *tuningData, uint32_t *tuningDataSize);
 
#ifdef __cplusplus
}
#endif
 
#endif /* #ifndef QSPI_H_ */