This module contains APIs to program and use the ADC module.
Files | |
| file | adc/v0/adc.h |
| This file contains the prototypes of the APIs present in the device abstraction layer file of ADC. This also contains some related macros. | |
Data Structures | |
| struct | adcRevisionId_t |
| Structure for accessing Revision ID of ADC module. More... | |
| struct | adcStepConfig_t |
| Structure containing parameters for ADC step configuration. More... | |
| struct | adcSequencerStatus_t |
| Structure for reporting ADC sequencer status. More... | |
Functions | |
| void | ADCPowerUp (uint32_t baseAddr, uint32_t powerUp) |
| This API will power up ADC Module. More... | |
| uint32_t | AdcIsPoweredUp (uint32_t baseAddr) |
| This function checks if the ADC module is powered up. More... | |
| int32_t | ADCSetClkDivider (uint32_t baseAddr, uint32_t clkDivider) |
| This API will configure clock divider for the ADC Module. More... | |
| void | ADCInit (uint32_t baseAddr, uint32_t errCorrection, uint32_t errOffset, uint32_t calibration) |
| This API is used to initialize the ADC module. More... | |
| void | ADCFIFODMAAccessEnable (uint32_t baseAddr, uint32_t fifoNum, uint32_t dmaLineEnable) |
| This API will enable DMA access for FIFO. More... | |
| int32_t | ADCSetStepParams (uint32_t baseAddr, uint32_t stepId, const adcStepConfig_t *configParams) |
| This API will configure a step for analog to digital conversion. More... | |
| void | ADCStepEnable (uint32_t baseAddr, uint32_t stepId, uint32_t stepEnable) |
| This API will enable ADC step. More... | |
| void | ADCClearAllSteps (uint32_t baseAddr) |
| This API will clear all the ADC steps. More... | |
| void | ADCStart (uint32_t baseAddr, uint32_t adcEnable) |
| This API will start ADC. More... | |
| void | ADCStepIdTagEnable (uint32_t baseAddr, uint32_t stepIdTag) |
| This API is used to configure the ADC module for storing step ID along with ADC data. More... | |
| uint32_t | ADCGetFIFOData (uint32_t baseAddr, uint32_t fifoNum) |
| This API will read and return FIFO data. More... | |
| uint32_t | ADCGetFIFOWordCount (uint32_t baseAddr, uint32_t fifoNum) |
| This API will return number of word present in the FIFO. More... | |
| int32_t | ADCSetCPUFIFOThresholdLevel (uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold) |
| This API will configure threshold level for a FIFO. More... | |
| uint32_t | ADCGetCPUFIFOThresholdLevel (uint32_t baseAddr, uint32_t fifoNum) |
| This API will read and return threshold level for a FIFO. More... | |
| int32_t | ADCSetDMAFIFOThresholdLevel (uint32_t baseAddr, uint32_t fifoNum, uint32_t threshold) |
| This API will configure DMA request level for a FIFO. More... | |
| uint32_t | ADCGetDMAFIFOThresholdLevel (uint32_t baseAddr, uint32_t fifoNum) |
| This API will read and return DMA request level for a FIFO. More... | |
| void | ADCEnableIntr (uint32_t baseAddr, uint32_t intrMask) |
| This API is used to enable interrupts. More... | |
| void | ADCDisableIntr (uint32_t baseAddr, uint32_t intrMask) |
| This API is used to disable interrupts. More... | |
| void | ADCWriteEOI (uint32_t baseAddr) |
| This API is used for EOI for ADC. More... | |
| uint32_t | ADCGetIntrStatus (uint32_t baseAddr) |
| This API is used to get the pending interrupts. More... | |
| void | ADCClearIntrStatus (uint32_t baseAddr, uint32_t intrMask) |
| This API is used to clear the interrupt status. More... | |
| uint32_t | ADCGetIntrRawStatus (uint32_t baseAddr) |
| This API is used to get the raw interrupt status. More... | |
| int32_t | ADCSetRange (uint32_t baseAddr, uint32_t highRange, uint32_t lowRange) |
| This API is used to configure the range for ADC. More... | |
| void | ADCGetRange (uint32_t baseAddr, uint32_t *highRange, uint32_t *lowRange) |
| This API is used to get the range for conversion. More... | |
| void | ADCGetSequencerStatus (uint32_t baseAddr, adcSequencerStatus_t *status) |
| This API is used to get the Sequencer status. More... | |
| void | ADCSetIdleMode (uint32_t baseAddr, uint32_t idleMode) |
| This API is used to configure ADC idle mode. More... | |
| void | ADCGetRevisionId (uint32_t baseAddr, adcRevisionId_t *revId) |
| This API is used get the ADC revision ID. More... | |
Macros | |
| #define | ADC_INTR_STATUS_ALL |
| Macro defines mask for all the interrupts status for ADC. More... | |
| #define | ADC_INTR_ENABLE_ALL |
| Macro defines mask for all the interrupts to enable for ADC. More... | |
| #define | ADC_INTR_DISABLE_ALL |
| Macro defines mask for all the interrupts to disable for ADC. More... | |
| #define | ADC_INTR_ALL (ADC_INTR_STATUS_ALL) |
| Macro defines mask for all the interrupts for ADC. More... | |
| #define | ADC_OPENDELAY_MAX (0x3FFFFU) |
| Macro defines the maximum value of open delay for a step for ADC. More... | |
| #define | ADC_SAMPLEDELAY_MAX (0xFFU) |
| Macro defines the maximum value of sample delay for a step for ADC. More... | |
| #define | ADC_RANGE_MAX (0x3FFU) |
| Macro defines the maximum allowable range for ADC. More... | |
| #define | ADC_RANGE_MIN (0x0U) |
| Macro defines the minimum allowable range for ADC. More... | |
| #define | ADC_FIFO_SIZE (64U) |
| Macro defines the maximum number of samples FIFO0 can store. More... | |
| #define | ADC_MAX_NUM_CHN (uint32_t)(8U) |
| Macro defines the maximum number of channels in ADC. More... | |
| #define | ADC_GET_RANGE(bit) (((uint32_t) 1U) << (bit)) |
| Returns the ADC max range given the bit support. More... | |
ADC Fifo Num | |
| typedef uint32_t | adcChannel_t |
| Enum to select the channel for input. More... | |
| typedef uint32_t | adcFIFONum_t |
| Enum to select FIFO to store the data. More... | |
| #define | ADC_CHANNEL_1 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_1) |
| #define | ADC_CHANNEL_2 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_2) |
| #define | ADC_CHANNEL_3 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_3) |
| #define | ADC_CHANNEL_4 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_4) |
| #define | ADC_CHANNEL_5 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_5) |
| #define | ADC_CHANNEL_6 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_6) |
| #define | ADC_CHANNEL_7 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_7) |
| #define | ADC_CHANNEL_8 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_8) |
| #define | ADC_FIFO_NUM_0 (0x0U) |
| #define | ADC_FIFO_NUM_1 (0x1U) |
ADC Step Id | |
| typedef uint32_t | adcStepId_t |
| Enum to select the step for operation. More... | |
| #define | ADC_STEP_1 (ADC_ADCSTAT_STEP_ID_STEP1) |
| #define | ADC_STEP_2 (ADC_ADCSTAT_STEP_ID_STEP2) |
| #define | ADC_STEP_3 (ADC_ADCSTAT_STEP_ID_STEP3) |
| #define | ADC_STEP_4 (ADC_ADCSTAT_STEP_ID_STEP4) |
| #define | ADC_STEP_5 (ADC_ADCSTAT_STEP_ID_STEP5) |
| #define | ADC_STEP_6 (ADC_ADCSTAT_STEP_ID_STEP6) |
| #define | ADC_STEP_7 (ADC_ADCSTAT_STEP_ID_STEP7) |
| #define | ADC_STEP_8 (ADC_ADCSTAT_STEP_ID_STEP8) |
| #define | ADC_STEP_9 (ADC_ADCSTAT_STEP_ID_STEP9) |
| #define | ADC_STEP_10 (ADC_ADCSTAT_STEP_ID_STEP10) |
| #define | ADC_STEP_11 (ADC_ADCSTAT_STEP_ID_STEP11) |
| #define | ADC_STEP_12 (ADC_ADCSTAT_STEP_ID_STEP12) |
| #define | ADC_STEP_13 (ADC_ADCSTAT_STEP_ID_STEP13) |
| #define | ADC_STEP_14 (ADC_ADCSTAT_STEP_ID_STEP14) |
| #define | ADC_STEP_15 (ADC_ADCSTAT_STEP_ID_STEP15) |
| #define | ADC_STEP_16 (ADC_ADCSTAT_STEP_ID_STEP16) |
ADC Operation Mode | |
| typedef uint32_t | adcOperationMode_t |
| Enum to select the ADC Operation Mode. More... | |
| #define | ADC_OPERATION_MODE_SINGLE_SHOT (ADC_STEPCONFIG_MODE_SW_EN_ONESHOT) |
| #define | ADC_OPERATION_MODE_CONTINUOUS (ADC_STEPCONFIG_MODE_SW_EN_CONTINUOUS) |
ADC Averaging | |
| typedef uint32_t | adcAveraging_t |
| Enum to number of samplings to average. More... | |
| #define | ADC_AVERAGING_NONE (ADC_STEPCONFIG_AVERAGING_NOAVG) |
| #define | ADC_AVERAGING_2_SAMPLES (ADC_STEPCONFIG_AVERAGING_2_SAMPLESAVG) |
| #define | ADC_AVERAGING_4_SAMPLES (ADC_STEPCONFIG_AVERAGING_4_SAMPLESAVG) |
| #define | ADC_AVERAGING_8_SAMPLES (ADC_STEPCONFIG_AVERAGING_8_SAMPLESAVG) |
| #define | ADC_AVERAGING_16_SAMPLES (ADC_STEPCONFIG_AVERAGING_16_SAMPLESAV) |
ADC Interrupt source | |
| typedef uint32_t | adcIntrSrc_t |
| Enum for ADC interrupts. More... | |
| #define | ADC_INTR_SRC_END_OF_SEQUENCE (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK) |
| #define | ADC_INTR_SRC_FIFO0_THRESHOLD (ADC_IRQENABLE_SET_FIFO0_THR_MASK) |
| #define | ADC_INTR_SRC_FIFO0_OVERRUN (ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK) |
| #define | ADC_INTR_SRC_FIFO0_UNDERFLOW (ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK) |
| #define | ADC_INTR_SRC_FIFO1_THRESHOLD (ADC_IRQENABLE_SET_FIFO1_THR_MASK) |
| #define | ADC_INTR_SRC_FIFO1_OVERRUN (ADC_IRQSTATUS_FIFO1_OVERRUN_MASK) |
| #define | ADC_INTR_SRC_FIFO1_UNDERFLOW (ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK) |
| #define | ADC_INTR_SRC_OUT_OF_RANGE (ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK) |
ADC Idle mode | |
| typedef uint32_t | adcIdleMode_t |
| Enum to configure ADC idle mode.Applicable for TDA3XX Only. More... | |
| #define | ADC_IDLE_MODE_FORCE_IDLE (ADC_SYSCONFIG_IDLEMODE_FORCE) |
| #define | ADC_IDLE_MODE_NO_IDLE (ADC_SYSCONFIG_IDLEMODE_NO_IDLE) |
| #define | ADC_IDLE_MODE_SMART_IDLE (ADC_SYSCONFIG_IDLEMODE_SMART_IDLE) |
| #define ADC_INTR_STATUS_ALL |
Macro defines mask for all the interrupts status for ADC.
| #define ADC_INTR_ENABLE_ALL |
Macro defines mask for all the interrupts to enable for ADC.
| #define ADC_INTR_DISABLE_ALL |
Macro defines mask for all the interrupts to disable for ADC.
| #define ADC_INTR_ALL (ADC_INTR_STATUS_ALL) |
Macro defines mask for all the interrupts for ADC.
| #define ADC_OPENDELAY_MAX (0x3FFFFU) |
Macro defines the maximum value of open delay for a step for ADC.
| #define ADC_SAMPLEDELAY_MAX (0xFFU) |
Macro defines the maximum value of sample delay for a step for ADC.
| #define ADC_RANGE_MAX (0x3FFU) |
Macro defines the maximum allowable range for ADC.
| #define ADC_RANGE_MIN (0x0U) |
Macro defines the minimum allowable range for ADC.
| #define ADC_FIFO_SIZE (64U) |
Macro defines the maximum number of samples FIFO0 can store.
| #define ADC_MAX_NUM_CHN (uint32_t)(8U) |
Macro defines the maximum number of channels in ADC.
| #define ADC_GET_RANGE | ( | bit | ) | (((uint32_t) 1U) << (bit)) |
Returns the ADC max range given the bit support.
| #define ADC_CHANNEL_1 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_1) |
Select channel 1 for input
| #define ADC_CHANNEL_2 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_2) |
Select channel 2 for input
| #define ADC_CHANNEL_3 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_3) |
Select channel 3 for input
| #define ADC_CHANNEL_4 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_4) |
Select channel 4 for input
| #define ADC_CHANNEL_5 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_5) |
Select channel 5 for input
| #define ADC_CHANNEL_6 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_6) |
Select channel 6 for input
| #define ADC_CHANNEL_7 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_7) |
Select channel 7 for input
| #define ADC_CHANNEL_8 (ADC_STEPCONFIG_SEL_INM_SWC_CHANNEL_8) |
Select channel 8 for input
| #define ADC_STEP_1 (ADC_ADCSTAT_STEP_ID_STEP1) |
Select step 1
| #define ADC_STEP_2 (ADC_ADCSTAT_STEP_ID_STEP2) |
Select step 2
| #define ADC_STEP_3 (ADC_ADCSTAT_STEP_ID_STEP3) |
Select step 3
| #define ADC_STEP_4 (ADC_ADCSTAT_STEP_ID_STEP4) |
Select step 4
| #define ADC_STEP_5 (ADC_ADCSTAT_STEP_ID_STEP5) |
Select step 5
| #define ADC_STEP_6 (ADC_ADCSTAT_STEP_ID_STEP6) |
Select step 6
| #define ADC_STEP_7 (ADC_ADCSTAT_STEP_ID_STEP7) |
Select step 7
| #define ADC_STEP_8 (ADC_ADCSTAT_STEP_ID_STEP8) |
Select step 8
| #define ADC_STEP_9 (ADC_ADCSTAT_STEP_ID_STEP9) |
Select step 9
| #define ADC_STEP_10 (ADC_ADCSTAT_STEP_ID_STEP10) |
Select step 10
| #define ADC_STEP_11 (ADC_ADCSTAT_STEP_ID_STEP11) |
Select step 11
| #define ADC_STEP_12 (ADC_ADCSTAT_STEP_ID_STEP12) |
Select step 12
| #define ADC_STEP_13 (ADC_ADCSTAT_STEP_ID_STEP13) |
Select step 13
| #define ADC_STEP_14 (ADC_ADCSTAT_STEP_ID_STEP14) |
Select step 14
| #define ADC_STEP_15 (ADC_ADCSTAT_STEP_ID_STEP15) |
Select step 15
| #define ADC_STEP_16 (ADC_ADCSTAT_STEP_ID_STEP16) |
Select step 16
| #define ADC_OPERATION_MODE_SINGLE_SHOT (ADC_STEPCONFIG_MODE_SW_EN_ONESHOT) |
Configure ADC operation mode to software enabled single shot
| #define ADC_OPERATION_MODE_CONTINUOUS (ADC_STEPCONFIG_MODE_SW_EN_CONTINUOUS) |
Configure ADC operation mode to software enabled continuous
| #define ADC_AVERAGING_NONE (ADC_STEPCONFIG_AVERAGING_NOAVG) |
Disable averaging
| #define ADC_AVERAGING_2_SAMPLES (ADC_STEPCONFIG_AVERAGING_2_SAMPLESAVG) |
Set number of samplings to average to 2
| #define ADC_AVERAGING_4_SAMPLES (ADC_STEPCONFIG_AVERAGING_4_SAMPLESAVG) |
Set number of samplings to average to 4
| #define ADC_AVERAGING_8_SAMPLES (ADC_STEPCONFIG_AVERAGING_8_SAMPLESAVG) |
Set number of samplings to average to 8
| #define ADC_AVERAGING_16_SAMPLES (ADC_STEPCONFIG_AVERAGING_16_SAMPLESAV) |
Set number of samplings to average to 16
| #define ADC_FIFO_NUM_0 (0x0U) |
Select FIFO 0 to store data
| #define ADC_FIFO_NUM_1 (0x1U) |
Select FIFO 1 to store data
| #define ADC_INTR_SRC_END_OF_SEQUENCE (ADC_IRQENABLE_SET_END_OF_SEQUENCE_MASK) |
End of sequence interrupt
| #define ADC_INTR_SRC_FIFO0_THRESHOLD (ADC_IRQENABLE_SET_FIFO0_THR_MASK) |
FIFO0 threshold interrupt
| #define ADC_INTR_SRC_FIFO0_OVERRUN (ADC_IRQENABLE_SET_FIFO0_OVERRUN_MASK) |
FIFO0 overrun interrupt
| #define ADC_INTR_SRC_FIFO0_UNDERFLOW (ADC_IRQENABLE_SET_FIFO0_UNDERFLOW_MASK) |
FIFO0 underrun interrupt
| #define ADC_INTR_SRC_FIFO1_THRESHOLD (ADC_IRQENABLE_SET_FIFO1_THR_MASK) |
FIFO1 threshold interrupt
| #define ADC_INTR_SRC_FIFO1_OVERRUN (ADC_IRQSTATUS_FIFO1_OVERRUN_MASK) |
FIFO1 overrun interrupt
| #define ADC_INTR_SRC_FIFO1_UNDERFLOW (ADC_IRQENABLE_SET_FIFO1_UNDERFLOW_MASK) |
FIFO1 underrun interrupt
| #define ADC_INTR_SRC_OUT_OF_RANGE (ADC_IRQENABLE_SET_OUT_OF_RANGE_MASK) |
Out of interrupt
| #define ADC_IDLE_MODE_FORCE_IDLE (ADC_SYSCONFIG_IDLEMODE_FORCE) |
Force idle mode
| #define ADC_IDLE_MODE_NO_IDLE (ADC_SYSCONFIG_IDLEMODE_NO_IDLE) |
No idle mode
| #define ADC_IDLE_MODE_SMART_IDLE (ADC_SYSCONFIG_IDLEMODE_SMART_IDLE) |
Smart idle mode
| typedef uint32_t adcChannel_t |
Enum to select the channel for input.
ADC have 8 channels from which it can take input.
| typedef uint32_t adcStepId_t |
Enum to select the step for operation.
| typedef uint32_t adcOperationMode_t |
Enum to select the ADC Operation Mode.
ADC can either operate in software enabled single shot mode or
software enabled continuous mode.
| typedef uint32_t adcAveraging_t |
Enum to number of samplings to average.
ADC allows user to program the number of samplings to average.
| typedef uint32_t adcFIFONum_t |
Enum to select FIFO to store the data.
| typedef uint32_t adcIntrSrc_t |
Enum for ADC interrupts.
| typedef uint32_t adcIdleMode_t |
Enum to configure ADC idle mode.Applicable for TDA3XX Only.
| void ADCPowerUp | ( | uint32_t | baseAddr, |
| uint32_t | powerUp | ||
| ) |
This API will power up ADC Module.
| baseAddr | Base Address of the ADC Registers. |
| powerUp | ADC is powered up if it is TRUE. ADC is powered down if it is FALSE. |
| uint32_t AdcIsPoweredUp | ( | uint32_t | baseAddr | ) |
This function checks if the ADC module is powered up.
| baseAddr | Base Address of the ADC Registers. |
| state | Returns TRUE if ADC is powered up. Else returns FALSE. |
| int32_t ADCSetClkDivider | ( | uint32_t | baseAddr, |
| uint32_t | clkDivider | ||
| ) |
This API will configure clock divider for the ADC Module.
| baseAddr | Base Address of the ADC Registers. |
| clkDivider | Clock divider value. |
| void ADCInit | ( | uint32_t | baseAddr, |
| uint32_t | errCorrection, | ||
| uint32_t | errOffset, | ||
| uint32_t | calibration | ||
| ) |
This API is used to initialize the ADC module.
| baseAddr | Base Address of the ADC Registers. |
| errCorrection | Error Correction is enabled if it is TRUE. Error Correction is disabled if it is FALSE. |
| errOffset | Write 0 to use internal calibration. Write 1 to use EFUSE code. |
| calibration | Writing 0 does not start internal calibration. Writing 1 starts internal calibration. |
| void ADCFIFODMAAccessEnable | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum, | ||
| uint32_t | dmaLineEnable | ||
| ) |
This API will enable DMA access for FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO from which data is to be read. Refer enum adcFIFONum_t. |
| dmaLineEnable | DMA Line is enabled if it is TRUE. DMA Line is disabled if it is FALSE. |
| int32_t ADCSetStepParams | ( | uint32_t | baseAddr, |
| uint32_t | stepId, | ||
| const adcStepConfig_t * | configParams | ||
| ) |
This API will configure a step for analog to digital conversion.
| baseAddr | Base Address of the ADC Registers. |
| stepId | Id of step to be configured. Refer enum adcStepId_t. |
| configParams | Configuration parameters for ADC step. Refer struct adcStepConfig_t. |
| void ADCStepEnable | ( | uint32_t | baseAddr, |
| uint32_t | stepId, | ||
| uint32_t | stepEnable | ||
| ) |
This API will enable ADC step.
| baseAddr | Base Address of the ADC Registers. |
| stepId | Id of step to be enabled. Refer enum adcStepId_t. |
| stepEnable | Step is enabled if it is TRUE. Step is disabled if it is FALSE. |
| void ADCClearAllSteps | ( | uint32_t | baseAddr | ) |
This API will clear all the ADC steps.
| baseAddr | Base Address of the ADC Registers. |
| void ADCStart | ( | uint32_t | baseAddr, |
| uint32_t | adcEnable | ||
| ) |
This API will start ADC.
| baseAddr | Base Address of the ADC Registers. |
| adcEnable | ADC is enabled/started if it is TRUE. ADC is disabled/stopped if it is FALSE. |
| void ADCStepIdTagEnable | ( | uint32_t | baseAddr, |
| uint32_t | stepIdTag | ||
| ) |
This API is used to configure the ADC module for storing step ID along with ADC data.
| baseAddr | Base Address of the ADC Registers. |
| stepIdTag | Step ID is stored along with ADC data in FIFO, if it is TRUE. Step ID is not stored along with ADC data in FIFO, if it is FALSE. |
| uint32_t ADCGetFIFOData | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum | ||
| ) |
This API will read and return FIFO data.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO from which data is to be read. Refer enum adcFIFONum_t. |
| uint32_t ADCGetFIFOWordCount | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum | ||
| ) |
This API will return number of word present in the FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO for which word count is needed. Refer enum adcFIFONum_t. |
| int32_t ADCSetCPUFIFOThresholdLevel | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum, | ||
| uint32_t | threshold | ||
| ) |
This API will configure threshold level for a FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO for which threshold level is to be set. Refer enum adcFIFONum_t. |
| threshold | Number of words in FIFO after which interrupt to CPU will be generated. It can take value from 1 to ADC_FIFO_SIZE. |
| uint32_t ADCGetCPUFIFOThresholdLevel | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum | ||
| ) |
This API will read and return threshold level for a FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO number. Refer enum adcFIFONum_t. |
| int32_t ADCSetDMAFIFOThresholdLevel | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum, | ||
| uint32_t | threshold | ||
| ) |
This API will configure DMA request level for a FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO for which DMA request level is to be set. Refer enum adcFIFONum_t. |
| threshold | Number of words in FIFO after which DMA request will be generated. It can take value from 1 to ADC_FIFO_SIZE. |
| uint32_t ADCGetDMAFIFOThresholdLevel | ( | uint32_t | baseAddr, |
| uint32_t | fifoNum | ||
| ) |
This API will read and return DMA request level for a FIFO.
| baseAddr | Base Address of the ADC Registers. |
| fifoNum | FIFO number. Refer enum adcFIFONum_t. |
| void ADCEnableIntr | ( | uint32_t | baseAddr, |
| uint32_t | intrMask | ||
| ) |
This API is used to enable interrupts.
| baseAddr | Base Address of the ADC Registers. |
| intrMask | Interrupts to enable. Refer enum adcIntrSrc_t. |
| void ADCDisableIntr | ( | uint32_t | baseAddr, |
| uint32_t | intrMask | ||
| ) |
This API is used to disable interrupts.
| baseAddr | Base Address of the ADC Registers. |
| intrMask | Interrupts to disable. |
| void ADCWriteEOI | ( | uint32_t | baseAddr | ) |
This API is used for EOI for ADC.
| baseAddr | Base Address of the ADC Registers. |
| uint32_t ADCGetIntrStatus | ( | uint32_t | baseAddr | ) |
This API is used to get the pending interrupts.
| baseAddr | Base Address of the ADC Registers. |
| void ADCClearIntrStatus | ( | uint32_t | baseAddr, |
| uint32_t | intrMask | ||
| ) |
This API is used to clear the interrupt status.
| baseAddr | Base Address of the ADC Registers. |
| intrMask | Interrupts to clear status. |
| uint32_t ADCGetIntrRawStatus | ( | uint32_t | baseAddr | ) |
This API is used to get the raw interrupt status.
| baseAddr | Base Address of the ADC Registers. |
| int32_t ADCSetRange | ( | uint32_t | baseAddr, |
| uint32_t | highRange, | ||
| uint32_t | lowRange | ||
| ) |
This API is used to configure the range for ADC.
| baseAddr | Base Address of the ADC Registers. |
| highRange | Allowable upper range of data. |
| lowRange | Allowable lower range of data. |
| void ADCGetRange | ( | uint32_t | baseAddr, |
| uint32_t * | highRange, | ||
| uint32_t * | lowRange | ||
| ) |
This API is used to get the range for conversion.
| baseAddr | Base Address of the ADC Registers. |
| highRange | Allowable upper range of data. |
| lowRange | Allowable lower range of data. |
| void ADCGetSequencerStatus | ( | uint32_t | baseAddr, |
| adcSequencerStatus_t * | status | ||
| ) |
This API is used to get the Sequencer status.
| baseAddr | Base Address of the ADC Registers. |
| status | Current status of the sequencer. Refer struct adcSequencerStatus_t. |
| void ADCSetIdleMode | ( | uint32_t | baseAddr, |
| uint32_t | idleMode | ||
| ) |
This API is used to configure ADC idle mode.
| baseAddr | Base Address of the ADC Registers. |
| idleMode | Idle mode to be configured for ADC module. Refer enum adcIdleMode_t. |
| void ADCGetRevisionId | ( | uint32_t | baseAddr, |
| adcRevisionId_t * | revId | ||
| ) |
This API is used get the ADC revision ID.
| baseAddr | Base Address of the ADC Registers. |
| revId | Contains Revision ID of ADC module.. Refer struct adcRevisionId_t. |