|
AM243x MCU+ SDK
08.06.00
|
|
Go to the documentation of this file.
55 #include <drivers/hw_include/csl_types.h>
66 #define ICSS_EMAC_MAX_PORTS_PER_INSTANCE (2)
75 #define ICSS_EMAC_MODE_MAC1 (1U)
77 #define ICSS_EMAC_MODE_MAC2 (2U)
79 #define ICSS_EMAC_MODE_SWITCH (3U)
81 #define ICSS_EMAC_MODE_DUALMAC (4U)
91 #define ICSS_EMAC_MII_MODE (0U)
93 #define ICSS_EMAC_RGMII_MODE (1U)
103 #define ICSS_EMAC_LEARNING_DISABLE (0U)
105 #define ICSS_EMAC_LEARNING_ENABLE (1U)
115 #define ICSS_EMAC_ENABLE_PACING (0)
117 #define ICSS_EMAC_DISABLE_PACING (1)
127 #define ICSS_EMAC_INTR_PACING_MODE1 (0)
137 #define ICSS_EMAC_QUEUE1 ((uint32_t)0U)
139 #define ICSS_EMAC_QUEUE2 ((uint32_t)1U)
141 #define ICSS_EMAC_QUEUE3 ((uint32_t)2U)
143 #define ICSS_EMAC_QUEUE4 ((uint32_t)3U)
145 #define ICSS_EMAC_QUEUE5 ((uint32_t)4U)
147 #define ICSS_EMAC_QUEUE6 ((uint32_t)5U)
149 #define ICSS_EMAC_QUEUE7 ((uint32_t)6U)
151 #define ICSS_EMAC_QUEUE8 ((uint32_t)7U)
153 #define ICSS_EMAC_QUEUE9 ((uint32_t)8U)
155 #define ICSS_EMAC_QUEUE10 ((uint32_t)9U)
157 #define ICSS_EMAC_QUEUE11 ((uint32_t)10U)
159 #define ICSS_EMAC_QUEUE12 ((uint32_t)11U)
161 #define ICSS_EMAC_QUEUE13 ((uint32_t)12U)
163 #define ICSS_EMAC_QUEUE14 ((uint32_t)13U)
165 #define ICSS_EMAC_QUEUE15 ((uint32_t)14U)
167 #define ICSS_EMAC_QUEUE16 ((uint32_t)15U)
169 #define ICSS_EMAC_COLQUEUE ((uint32_t)16U)
173 #define ICSS_EMAC_NUMQUEUES ((uint32_t)17U)
182 #define ICSS_EMAC_SWITCH_ERROR_BASE ((uint32_t)0x21Fu)
184 #define ICSS_EMAC_SWITCH_ERROR_CODE (ICSS_EMAC_SWITCH_ERROR_BASE)
186 #define ICSS_EMAC_SWITCH_ERROR_INFO (ICSS_EMAC_SWITCH_ERROR_CODE)
188 #define ICSS_EMAC_SWITCH_ERROR_WARNING (ICSS_EMAC_SWITCH_ERROR_CODE | 0x1000u)
190 #define ICSS_EMAC_SWITCH_ERROR_MINOR (ICSS_EMAC_SWITCH_ERROR_CODE | 0x2000u)
192 #define ICSS_EMAC_SWITCH_ERROR_MAJOR (ICSS_EMAC_SWITCH_ERROR_CODE | 0x3000u)
194 #define ICSS_EMAC_SWITCH_ERROR_CRITICAL (ICSS_EMAC_SWITCH_ERROR_CODE | 0x4000u)
197 #define ICSS_EMAC_SWITCH_SUCCESS (0u)
201 #define ICSS_EMAC_ERR_DEV_NOT_INSTANTIATED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 1u)
203 #define ICSS_EMAC_ERR_SWITCH_INVALID_PARAM (ICSS_EMAC_SWITCH_ERROR_MAJOR + 2u)
205 #define ICSS_EMAC_ERR_CH_INVALID (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 3u)
207 #define ICSS_EMAC_ERR_CH_ALREADY_INIT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 4u)
209 #define ICSS_EMAC_ERR_TX_CH_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 5u)
211 #define ICSS_EMAC_ERR_TX_CH_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 6u)
213 #define ICSS_EMAC_ERR_TX_NO_LINK (ICSS_EMAC_SWITCH_ERROR_MAJOR + 7u)
215 #define ICSS_EMAC_ERR_TX_OUT_OF_BD (ICSS_EMAC_SWITCH_ERROR_MAJOR + 8u)
217 #define ICSS_EMAC_ERR_RX_CH_INVALID (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 9u)
219 #define ICSS_EMAC_ERR_RX_CH_ALREADY_INIT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 10u)
221 #define ICSS_EMAC_ERR_RX_CH_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 11u)
223 #define ICSS_EMAC_ERR_RX_CH_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 12u)
225 #define ICSS_EMAC_ERR_DEV_ALREADY_CREATED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 13u)
227 #define ICSS_EMAC_ERR_DEV_NOT_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 14u)
229 #define ICSS_EMAC_ERR_DEV_ALREADY_CLOSED (ICSS_EMAC_SWITCH_ERROR_MAJOR + 15u)
231 #define ICSS_EMAC_ERR_DEV_ALREADY_OPEN (ICSS_EMAC_SWITCH_ERROR_MAJOR + 16u)
233 #define ICSS_EMAC_ERR_RX_BUFFER_ALLOC_FAIL (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 17u)
235 #define ICSS_EMAC_SWITCH_INTERNAL_FAILURE (ICSS_EMAC_SWITCH_ERROR_MAJOR + 18u)
237 #define ICSS_EMAC_SWITCH_VLAN_UNAWARE_MODE (ICSS_EMAC_SWITCH_ERROR_MAJOR + 19u)
239 #define ICSS_EMAC_SWITCH_ALE_TABLE_FULL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 20u)
241 #define ICSS_EMAC_SWITCH_ADDR_NOTFOUND (ICSS_EMAC_SWITCH_ERROR_MAJOR + 21u)
243 #define ICSS_EMAC_SWITCH_INVALID_VLANID (ICSS_EMAC_SWITCH_ERROR_MAJOR + 22u)
245 #define ICSS_EMAC_SWITCH_INVALID_PORT (ICSS_EMAC_SWITCH_ERROR_MAJOR + 23u)
247 #define ICSS_EMAC_SWITCH_BD_ALLOC_FAIL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 24u)
249 #define ICSS_EMAC_ERR_BADPACKET (ICSS_EMAC_SWITCH_ERROR_MAJOR + 25u)
251 #define ICSS_EMAC_ERR_COLLISION_FAIL (ICSS_EMAC_SWITCH_ERROR_MAJOR + 26u)
253 #define ICSS_EMAC_ERR_MACFATAL (ICSS_EMAC_SWITCH_ERROR_CRITICAL + 26u)
257 #define ICSS_EMAC_MAXMTU (1518U)
259 #define ICSS_EMAC_MINMTU (14U)
264 #define ICSS_EMAC_PORT_0 (0)
269 #define ICSS_EMAC_PORT_1 (1U)
274 #define ICSS_EMAC_PORT_2 (2U)
279 #define ICSS_EMAC_IOCTL_PORT_CTRL_DISABLE (0u)
282 #define ICSS_EMAC_IOCTL_PORT_CTRL_ENABLE (1u)
291 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE (0u)
293 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE (1u)
295 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS (2u)
297 #define ICSS_EMAC_STORM_PREV_CTRL_INIT (3u)
299 #define ICSS_EMAC_STORM_PREV_CTRL_RESET (4u)
301 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_BC (5u)
303 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_BC (6u)
305 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_BC (7u)
307 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_BC (8u)
309 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_BC (9u)
311 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_MC (10u)
313 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_MC (11u)
315 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_MC (12u)
317 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_MC (13u)
319 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_MC (14u)
321 #define ICSS_EMAC_STORM_PREV_CTRL_ENABLE_UC (15u)
323 #define ICSS_EMAC_STORM_PREV_CTRL_DISABLE_UC (16u)
325 #define ICSS_EMAC_STORM_PREV_CTRL_SET_CREDITS_UC (17u)
327 #define ICSS_EMAC_STORM_PREV_CTRL_INIT_UC (18u)
329 #define ICSS_EMAC_STORM_PREV_CTRL_RESET_UC (19u)
339 #define ICSS_EMAC_LEARN_CTRL_UPDATE_TABLE (0u)
341 #define ICSS_EMAC_LEARN_CTRL_CLR_TABLE (1u)
343 #define ICSS_EMAC_LEARN_CTRL_AGEING (2u)
345 #define ICSS_EMAC_LEARN_CTRL_FIND_MAC (3u)
347 #define ICSS_EMAC_LEARN_CTRL_REMOVE_MAC (4u)
349 #define ICSS_EMAC_LEARN_CTRL_INC_COUNTER (5u)
351 #define ICSS_EMAC_LEARN_CTRL_INIT_TABLE (6u)
353 #define ICSS_EMAC_LEARN_CTRL_SET_PORTSTATE (7u)
363 #define ICSS_EMAC_IOCTL_STAT_CTRL_GET (0u)
365 #define ICSS_EMAC_IOCTL_STAT_CTRL_CLEAR (1u)
375 #define ICSS_EMAC_IOCTL_PORT_CTRL (0u)
377 #define ICSS_EMAC_IOCTL_LEARNING_CTRL (1u)
379 #define ICSS_EMAC_IOCTL_STORM_PREV_CTRL (2u)
381 #define ICSS_EMAC_IOCTL_STATS_CTRL (3u)
383 #define ICSS_EMAC_IOCTL_PROMISCUOUS_CTRL (4u)
385 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL (5u)
387 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL (6u)
389 #define ICSS_EMAC_IOCTL_PORT_FLUSH_CTRL (7u)
399 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ENABLE (0u)
401 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_DISABLE (1u)
403 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_OVERRIDE_HASHMASK (2u)
405 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_ADD_MACID (3u)
407 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_REMOVE_MACID (4u)
409 #define ICSS_EMAC_IOCTL_MULTICAST_FILTER_CTRL_GET_DROPPED (5u)
419 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ENABLE_CMD (0u)
421 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_DISABLE_CMD (1u)
423 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_ALL_CMD (2u)
425 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_UNTAG_HOST_RCV_NAL_CMD (3u)
427 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_ALL_CMD (4u)
429 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_PRIOTAG_HOST_RCV_NAL_CMD (5u)
431 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_ADD_VID_CMD (6u)
433 #define ICSS_EMAC_IOCTL_VLAN_FILTER_CTRL_REMOVE_VID_CMD (7u)
440 #define ICSS_EMAC_LEARNING_PORT_STATE_LEARNING (0U)
441 #define ICSS_EMAC_LEARNING_PORT_STATE_NOT_LEARNING (1U)
442 #define ICSS_EMAC_LEARNING_PORT_STATE_LOCKED (2U)
444 #define ICSS_EMAC_OBJECT_SIZE_IN_BYTES (42000)
467 typedef struct ICSS_EMAC_FwStaticMmap_s
494 typedef struct ICSS_EMAC_FwDynamicMmap_s
517 typedef struct ICSS_EMAC_FwVlanFilterParams_s
530 typedef struct ICSS_EMAC_FwMulticastFilterParams_s
549 typedef struct ICSS_EMAC_Attrs_s
622 typedef struct ICSS_EMAC_InternalObject_t
632 typedef struct ICSS_EMAC_Config_s
647 typedef struct ICSS_EMAC_CallBackConfig_s
662 typedef struct ICSS_EMAC_CallBackObject_s
700 typedef struct ICSS_EMAC_Params_s
729 typedef struct ICSS_EMAC_RxArgument_s
747 typedef struct ICSS_EMAC_TxArgument_s
764 typedef struct ICSS_EMAC_IoctlCmd_s
774 typedef struct ICSS_EMAC_PruStatistics_s
898 uint32_t ioctlCommand,
931 int32_t *queueNumber);
volatile uint32_t tx128_255byte
Definition: icss_emac.h:793
uint8_t portMask
Definition: icss_emac.h:586
uint32_t p0ColBufferOffset
Definition: icss_emac.h:506
uint8_t intrPacingMode
Definition: icss_emac.h:571
uint32_t p0ColQueueDescOffset
Definition: icss_emac.h:484
uint32_t rxTaskPriority
Definition: icss_emac.h:611
Tx packet processing information block that needs to passed into call to ICSS_EMAC_txPacket.
Definition: icss_emac.h:748
ICSS_EMAC_CallBackConfig rxNRTCallBack
Definition: icss_emac.h:668
struct ICSS_EMAC_Config_s * ICSS_EMAC_Handle
Alias for ICSS EMAC Handle containing base addresses and modules.
Definition: icss_emac.h:449
uint32_t portMacAddr
Definition: icss_emac.h:479
volatile uint32_t rxBcast
Definition: icss_emac.h:786
volatile uint32_t defTx
Definition: icss_emac.h:817
uint8_t learningEnable
Definition: icss_emac.h:582
Rx packet processing information block that needs to passed into call to ICSS_EMAC_RxPktGet.
Definition: icss_emac.h:730
volatile uint32_t rxUcast
Definition: icss_emac.h:788
volatile uint32_t TXqueueLevel
Definition: icss_emac.h:829
uint32_t portStatusOffset
Definition: icss_emac.h:477
volatile uint32_t droppedPackets
Definition: icss_emac.h:823
uint32_t p1Q1SwitchTxContextOffset
Definition: icss_emac.h:508
uint8_t queueNumber
Definition: icss_emac.h:735
uint32_t p0QueueDescOffset
Definition: icss_emac.h:483
int32_t ICSS_EMAC_txPacket(const ICSS_EMAC_TxArgument *txArg, void *userArg)
API to queue a frame which has to be transmitted on the specified port queue.
uint8_t port
Definition: icss_emac.h:737
uint32_t l3OcmcBaseAddr
Definition: icss_emac.h:605
uint32_t p0ColBufferDescOffset
Definition: icss_emac.h:503
void ICSS_EMAC_Params_init(ICSS_EMAC_Params *params)
Initialize the parmeters data structure with defaults.
uint32_t ctrlUntagHostRcvAllowBit
Definition: icss_emac.h:521
#define ICSS_EMAC_NUMQUEUES
Total Queues available.
Definition: icss_emac.h:173
uint32_t overrideStatusOffset
Definition: icss_emac.h:536
uint32_t stormPreventionOffsetBC
Definition: icss_emac.h:475
volatile uint32_t rxUnderSizedFrames
Definition: icss_emac.h:820
int32_t ICSS_EMAC_ioctl(ICSS_EMAC_Handle icssEmacHandle, uint32_t ioctlCommand, uint8_t portNo, void *ioctlParams)
IOCTL Function for ICSS EMAC.
volatile uint32_t tx64byte
Definition: icss_emac.h:791
uint32_t l3OcmcSize
Definition: icss_emac.h:607
uint32_t collisionQueueSize
Definition: icss_emac.h:501
uint32_t hostQ1RxContextOffset
Definition: icss_emac.h:507
uint8_t txInterruptEnable
Definition: icss_emac.h:591
uint32_t more
Definition: icss_emac.h:739
uint32_t txIntNum
Definition: icss_emac.h:602
#define ICSS_EMAC_OBJECT_SIZE_IN_BYTES
Definition: icss_emac.h:444
ICSS_EMAC_CallBackConfig learningExCallBack
Definition: icss_emac.h:678
uint32_t transmitQueuesBufferOffset
Definition: icss_emac.h:505
uint16_t pacingThreshold
Definition: icss_emac.h:575
volatile uint32_t rxOctets
Definition: icss_emac.h:789
uint16_t lengthOfPacket
Definition: icss_emac.h:757
uint8_t portNumber
Definition: icss_emac.h:753
uint32_t maskInitVal
Definition: icss_emac.h:534
volatile uint32_t rx512_1023byte
Definition: icss_emac.h:802
uint32_t emacTtsConfigBaseOffset
Definition: icss_emac.h:485
volatile uint32_t sqeTestError
Definition: icss_emac.h:828
volatile uint32_t singleColl
Definition: icss_emac.h:806
volatile uint32_t macRxError
Definition: icss_emac.h:814
uint32_t p0Q1BufferDescOffset
Definition: icss_emac.h:502
void ICSS_EMAC_init(void)
This function initializes the ICSS_EMAC module.
uint32_t ctrlOffset
Definition: icss_emac.h:532
ICSS EMAC Dynamic Firmware Memory Map offsets.
Definition: icss_emac.h:495
uint8_t command
Definition: icss_emac.h:766
ICSS_EMAC_CallBackConfig port0LinkCallBack
Definition: icss_emac.h:664
void * object
Definition: icss_emac.h:634
int32_t(* ICSS_EMAC_CallBack)(void *arg0, void *arg1, void *arg2)
Definition for a generic callback function used in ICSS-EMAC. While calling this,...
Definition: icss_emac.h:457
volatile uint32_t tx65_127byte
Definition: icss_emac.h:792
volatile uint32_t CSError
Definition: icss_emac.h:830
uint32_t ctrlEnableBit
Definition: icss_emac.h:520
uint32_t statisticsOffset
Definition: icss_emac.h:473
uint32_t filterTableBaseAddress
Definition: icss_emac.h:523
const PRUICSS_IntcInitData * pruicssIntcInitData
Definition: icss_emac.h:704
uint32_t phySpeedOffset
Definition: icss_emac.h:476
void * ioctlVal
Definition: icss_emac.h:767
uint32_t hostRcvAllowedValue
Definition: icss_emac.h:542
uint32_t p0Q1BufferOffset
Definition: icss_emac.h:504
volatile uint32_t lateColl
Definition: icss_emac.h:805
void * userArg
Definition: icss_emac.h:651
uint32_t colStatusAddr
Definition: icss_emac.h:487
uint32_t maskOverrideSetValue
Definition: icss_emac.h:540
uint32_t portControlAddr
Definition: icss_emac.h:478
uint32_t rxInterruptStatusOffset
Definition: icss_emac.h:480
volatile uint32_t rx65_127byte
Definition: icss_emac.h:799
uint32_t stormPreventionOffsetUC
Definition: icss_emac.h:482
int32_t ICSS_EMAC_rxPktGet(ICSS_EMAC_RxArgument *rxArg, void *userArg)
Retrieves a frame from a host queue and copies it in the allocated stack buffer.
volatile uint32_t rx64byte
Definition: icss_emac.h:798
uint32_t maskOffset
Definition: icss_emac.h:535
uint8_t emacMode
Definition: icss_emac.h:551
uint32_t futureFeatureOffset
Definition: icss_emac.h:472
uint32_t versionOffset
Definition: icss_emac.h:469
ICSS_EMAC_FwDynamicMmap * fwDynamicMMap
Definition: icss_emac.h:708
volatile uint32_t rxOverSizedFrames
Definition: icss_emac.h:819
volatile uint32_t multiColl
Definition: icss_emac.h:807
uint32_t ctrlBitmapOffset
Definition: icss_emac.h:519
ICSS_EMAC_FwMulticastFilterParams * fwMulticastFilterParams
Definition: icss_emac.h:712
ICSS EMAC VLAN Filtering Parameters.
Definition: icss_emac.h:518
volatile uint32_t txOverFlow
Definition: icss_emac.h:826
uint32_t q1EmacTxContextOffset
Definition: icss_emac.h:510
ICSS_EMAC_Handle ICSS_EMAC_open(uint32_t idx, const ICSS_EMAC_Params *params)
API to initialize and configure ICSS in MAC/Switch Mode.
uint32_t txTaskPriority
Definition: icss_emac.h:613
volatile uint32_t txUcast
Definition: icss_emac.h:783
Statistics structure for capturing statistics on PRU.
Definition: icss_emac.h:775
volatile uint32_t txUnderFlow
Definition: icss_emac.h:827
uint8_t ethPrioQueue
Definition: icss_emac.h:577
volatile uint32_t rx1024byte
Definition: icss_emac.h:803
volatile uint32_t excessColl
Definition: icss_emac.h:808
uint32_t numQueues
Definition: icss_emac.h:511
uint32_t interfaceMacAddrOffset
Definition: icss_emac.h:486
ICSS_EMAC_CallBackConfig rxRTCallBack
Definition: icss_emac.h:672
ICSS_EMAC_CallBackConfig customRxCallBack
Definition: icss_emac.h:684
uint32_t tableOffset
Definition: icss_emac.h:537
volatile uint32_t rxCRCFrames
Definition: icss_emac.h:821
const uint8_t * srcAddress
Definition: icss_emac.h:751
uint16_t reserved
Definition: tisci_boardcfg_rm.h:2
uint32_t maskOverrideNotSetValue
Definition: icss_emac.h:541
volatile uint32_t stormPrevCounter
Definition: icss_emac.h:811
void ICSS_EMAC_close(ICSS_EMAC_Handle icssEmacHandle)
API to stop MAC/Switch Mode.
uint32_t ctrlEnabledValue
Definition: icss_emac.h:538
ICSS_EMAC_CallBackConfig customTxCallBack
Definition: icss_emac.h:680
const ICSS_EMAC_Attrs * attrs
Definition: icss_emac.h:636
PRUICSS Interrupt controller initialisation data structure.
Definition: pruicss/g_v0/pruicss.h:274
uint32_t linkIntNum
Definition: icss_emac.h:598
int32_t ICSS_EMAC_rxPktInfo(ICSS_EMAC_Handle icssEmacHandle, int32_t *portNumber, int32_t *queueNumber)
API to retrieve the information about the received frame which is then used to dequeue the frame from...
volatile uint32_t txOctets
Definition: icss_emac.h:784
void ICSS_EMAC_deinit(void)
This function de-initializes the ICSS_EMAC module.
uint8_t phyToMacInterfaceMode
Definition: icss_emac.h:558
uint32_t destAddress
Definition: icss_emac.h:733
uint32_t maskSizeBytes
Definition: icss_emac.h:533
volatile uint32_t rx256_511byte
Definition: icss_emac.h:801
volatile uint32_t macTxError
Definition: icss_emac.h:818
uint8_t halfDuplexEnable
Definition: icss_emac.h:562
volatile uint32_t SFDError
Definition: icss_emac.h:816
uint32_t featureOffset
Definition: icss_emac.h:471
uint32_t vidMaxValue
Definition: icss_emac.h:524
uint32_t splitQueue
Definition: icss_emac.h:615
volatile uint32_t stormPrevCounterMC
Definition: icss_emac.h:812
uint32_t linkTaskPriority
Definition: icss_emac.h:609
Different callbacks which can be registered. While calling the function set in ICSS_EMAC_CallBack,...
Definition: icss_emac.h:663
uint32_t hostRcvNotAllowedValue
Definition: icss_emac.h:543
uint32_t queueSizeOffset
Definition: icss_emac.h:496
volatile uint32_t rxMisAlignmentFrames
Definition: icss_emac.h:810
uint32_t ctrlPriotagHostRcvAllowBit
Definition: icss_emac.h:522
volatile uint32_t txBcast
Definition: icss_emac.h:781
volatile uint32_t txMcast
Definition: icss_emac.h:782
uint8_t enableIntrPacing
Definition: icss_emac.h:567
ICSS EMAC Static Firmware Memory Map offsets. These are offsets for PRU0 and PRU1 DRAM memory.
Definition: icss_emac.h:468
Opaque ICSS EMAC driver object.
Definition: icss_emac.h:623
ICSS_EMAC_CallBackConfig txCallBack
Definition: icss_emac.h:676
uint32_t ctrlDisabledValue
Definition: icss_emac.h:539
ICSS_EMAC_CallBack callBack
Definition: icss_emac.h:649
Definition: icss_emac.h:550
volatile uint32_t stormPrevCounterUC
Definition: icss_emac.h:813
ICSS EMAC Multicast Filtering Parameters.
Definition: icss_emac.h:531
volatile uint32_t tx256_511byte
Definition: icss_emac.h:794
ICSS_EMAC Parameters.
Definition: icss_emac.h:701
volatile uint32_t rx128_255byte
Definition: icss_emac.h:800
uint32_t rxIntNum
Definition: icss_emac.h:600
Generic callback configuration for protocol specific callbacks. ICSS_EMAC_CallBack is the function ...
Definition: icss_emac.h:648
uint32_t version2Offset
Definition: icss_emac.h:470
void * ETHPHY_Handle
Handle to the ETHPHY driver returned by ETHPHY_open()
Definition: ethphy.h:173
IOCTL command members for configuring switch/EMAC.
Definition: icss_emac.h:765
ICSS_EMAC_CallBackObject callBackObject
Definition: icss_emac.h:714
volatile uint32_t tx512_1023byte
Definition: icss_emac.h:795
uint32_t queueOffset
Definition: icss_emac.h:497
PRUICSS_Handle pruicssHandle
Definition: icss_emac.h:702
uint32_t stormPreventionOffsetMC
Definition: icss_emac.h:481
struct PRUICSS_Config_s * PRUICSS_Handle
A handle that is returned from a PRUICSS_open() call. This handle is required for calling other APIs.
Definition: pruicss/g_v0/pruicss.h:235
ICSS_EMAC_CallBackConfig port1LinkCallBack
Definition: icss_emac.h:666
uint32_t promiscuousModeOffset
Definition: icss_emac.h:488
ICSS_EMAC_Handle icssEmacHandle
Definition: icss_emac.h:749
uint32_t statisticsSize
Definition: icss_emac.h:474
uint8_t queuePriority
Definition: icss_emac.h:755
volatile uint32_t rxMcast
Definition: icss_emac.h:787
uint32_t portQueueDescOffset
Definition: icss_emac.h:509
volatile uint32_t tx1024byte
Definition: icss_emac.h:796
ICSS_EMAC_FwStaticMmap * fwStaticMMap
Definition: icss_emac.h:706
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE
Maximum number of Ports in a single ICSS
Definition: icss_emac.h:66
ICSS_EMAC_FwVlanFilterParams * fwVlanFilterParams
Definition: icss_emac.h:710
uint32_t queueDescriptorOffset
Definition: icss_emac.h:498
Base EMAC handle containing pointers to all modules required for driver to work.
Definition: icss_emac.h:633
ICSS_EMAC_Handle icssEmacHandle
Definition: icss_emac.h:731