|
AM243x MCU+ SDK
08.06.00
|
|
Go to the documentation of this file.
62 #define DEFAULT_DLR_PACKET_SIZE 60
64 #define ETHERNET_FRAME_SIZE_60 60
67 #define IEP_WD_PRE_DIV_10US 2000
70 #define PORT0_WATCH_DOG_ID 0
72 #define PORT1_WATCH_DOG_ID 1
74 #define IS_A_LINK_STATUS_FRAME DLR_TRUE
75 #define IS_A_NEIGHBOR_STAT_FRAME DLR_FALSE
78 #define BOTH_LINKS_UP 0x0
79 #define PORT0_IS_DOWN 0x2
80 #define PORT1_IS_DOWN 0x1
81 #define BOTH_LINKS_DOWN 0x3
84 #define PORT0_WD_ISR_MASK 0x2000000
86 #define PORT1_WD_ISR_MASK 0x4000000
92 #define PDI_WD_TRIGGER_RX_SOF (0 << 4)
98 #define PDI_WD_TRIGGER_LATCH_IN (1 << 4)
104 #define PDI_WD_TRIGGER_SYNC0_OUT (2 << 4)
110 #define PDI_WD_TRIGGER_SYNC1_OUT (3 << 4)
113 #define MAX_EVENTS_CAPTURED 1000
116 #define LINK1_BREAK 1
117 #define LINK2_BREAK 2
118 #define BOTH_LINK_DISABLED 3
119 #define EMPTY_SIGNON_FRAME_RCVD 4
120 #define COMPLETE_SIGNON_FRAME_RCVD 5
122 #define RING_FAULT_RCVD_PORT0 6
123 #define RING_FAULT_RCVD_PORT1 7
125 #define RING_FAULT_TRANSITION_PORT0 8
126 #define RING_FAULT_TRANSITION_PORT1 9
128 #define RING_NORMAL_TRANSITION_PORT0 10
129 #define RING_NORMAL_TRANSITION_PORT1 11
131 #define START_TIMER0 12
132 #define START_TIMER1 13
134 #define NCRES_RCVD_PORT0 14
135 #define NCRES_RCVD_PORT1 15
137 #define NCREQ_RCVD_PORT0 16
138 #define NCREQ_RCVD_PORT1 17
140 #define LOCFAULT_RCVD_PORT0 18
141 #define LOCFAULT_RCVD_PORT1 19
143 #define BEACON0_MISSED_FAULT 20
144 #define BEACON1_MISSED_FAULT 21
145 #define BEACON0_MISSED_NORMAL 22
146 #define BEACON1_MISSED_NORMAL 23
148 #define LINK1_FAULT_BREAK 24
149 #define LINK2_FAULT_BREAK 25
151 #define LINK1_NORMAL_BREAK 27
152 #define LINK2_NORMAL_BREAK 28
154 #define NEIGHBOR_TIMEOUT_PORT0_RETRY 29
155 #define NEIGHBOR_TIMEOUT_PORT1_RETRY 30
156 #define NEIGHBOR_TIMEOUT_PORT0_MAX 31
157 #define NEIGHBOR_TIMEOUT_PORT1_MAX 32
159 #define DLR_RESET_MACHINE 33
161 #define BEACON0_MISSED 34
162 #define BEACON1_MISSED 35
164 #define STOP_BOTH_TIMERS_PORT0 36
165 #define STOP_BOTH_TIMERS_PORT1 37
167 #define PORT0_BEACON_STALL 38
168 #define PORT1_BEACON_STALL 39
172 #define DEFAULT_BEACON_INTERVAL_VARIABLE 400
173 #define DEFAULT_BEACON_TIMEOUT_VARIABLE (DEFAULT_BEACON_INTERVAL_VARIABLE * 4)
175 #define DEFAULT_NEIGHBOR_TIMEOUT_INTERVAL 100
177 #define DEFAULT_DLR_PERIODIC_INTERVAL 100
180 #define MAX_NUM_RETRIES 2
183 #define BEACON_CPU_STALL_THRESHOLD 4
188 #define DLR_DEFAULT_CAPABILITIES (1 << 7) | (1 << 1)
197 #define DLR_SIGNON_FRAME_SIZE (ICSS_EMAC_MAXMTU - 10U)
200 #define DLR_COMMON_FRAME_HEADER_SIZE 18
201 #define DLR_COMMON_FRAME_OFFSET 12
204 #define ICSS_DLR_PORT0_INT_FLAG 0x200000
206 #define ICSS_DLR_PORT1_INT_FLAG 0x400000
344 uint8_t supMACAddress[6];
387 #ifdef IS_A_DLR_SUPERVISOR
424 #ifdef IS_A_DLR_SUPERVISOR
426 uint32_t numRingFaultsPowerUp;
429 uint16_t ringParticipantsCount;
438 typedef struct dlr_Config_s
605 uint32_t sequenceId);
622 uint8_t linkOrNeighbor, uint8_t linkStatus);
661 uint8_t portNum, uint16_t
size);
727 void genSeqOfEvents(uint8_t event);
808 uint16_t periodInMicroSec, uint8_t
id);
dlrStruct * dlrObj
Definition: icss_dlr.h:440
uint16_t vLanId
Definition: icss_dlr.h:330
State machine variables, part of DLR Object and L2 implementation.
Definition: icss_dlr.h:300
ClockP_Object dlrPeriodicTimerObject
Definition: icss_dlr.h:454
uint8_t beaconTimeoutIntNum_P0
Definition: icss_dlr.h:419
struct ICSS_EMAC_Config_s * ICSS_EMAC_Handle
Alias for ICSS EMAC Handle containing base addresses and modules.
Definition: icss_emac.h:449
uint16_t size
Definition: tisci_boardcfg.h:1
void EIP_DLR_setTimeout_WD_IEP(EIP_DLRHandle dlrHandle, uint16_t periodInMicroSec, uint8_t id)
Set the timeout value in watchdog.
void EIP_DLR_beaconTimeoutISR_P1(uintptr_t arg)
ISR for beacon timeout for Port 1.
void EIP_DLR_beaconTimeoutISR_P0(uintptr_t arg)
ISR for beacon timeout for Port 0.
void EIP_DLR_stop(EIP_DLRHandle dlrHandle)
API to stop the DLR driver Halt DLR. Calling this disables DLR on the device.
uint8_t supPrecedence
Definition: icss_dlr.h:333
nwStatus
network status : possible values for Attribute ID 2
Definition: icss_dlr.h:248
uint32_t tracePktIntervalCount
Definition: icss_dlr.h:459
void EIP_DLR_enable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Enable the IEP Watch dog timers.
@ FEATURE_UNSUPPORTED
Definition: icss_dlr.h:276
uint8_t port0IntNum
Definition: icss_dlr.h:413
PRUICSS_Handle pruicssHandle
Definition: icss_dlr.h:444
@ NODE_NORMAL
Definition: icss_dlr.h:220
uint32_t supIPAddress
Definition: icss_dlr.h:347
Opaque clock object used with the clock APIs.
Definition: ClockP.h:63
nodeState
node state machine states
Definition: icss_dlr.h:214
uint8_t checkForLoop
Definition: icss_dlr.h:458
void EIP_DLR_neighborTimeoutISR1(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 1.
void EIP_DLR_processDLRFrame(EIP_DLRHandle dlrHandle, uint8_t *pktBuffer, uint8_t portNum, uint16_t size)
Processes a sign on and Neighbor check request frame.
@ BACKUP_NODE
Definition: icss_dlr.h:267
struct dlr_Config_s * EIP_DLRHandle
Definition: icss_dlr.h:208
#define DEFAULT_DLR_PACKET_SIZE
Definition: icss_dlr.h:62
@ NODE_IDLE
Definition: icss_dlr.h:216
uint16_t deviceNum
Definition: icss_dlr.h:363
int32_t EIP_DLR_isrInit(EIP_DLRHandle dlrHandle)
@ UNEXPECTED_LOOP
Definition: icss_dlr.h:254
uint32_t deviceIP
Definition: icss_dlr.h:446
void EIP_DLR_port1ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port1.
HwiP_Object port1IntObject
Definition: icss_dlr.h:408
@ NORMAL_STAT
Definition: icss_dlr.h:250
void EIP_DLR_genNCReqFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort)
supervisorStatus
device role: possible values for Attribute ID 3
Definition: icss_dlr.h:265
HwiP_Object beaconTimeoutIntP0Object
Definition: icss_dlr.h:409
activeSuperAddr addr
Definition: icss_dlr.h:383
uint8_t numExceptions
Definition: icss_dlr.h:292
void EIP_DLR_setDefaultValue(EIP_DLRHandle dlrHandle)
ICSS_EMAC_Handle emacHandle
Definition: icss_dlr.h:441
void EIP_DLR_genNeighborLinkStatFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort, uint8_t linkOrNeighbor, uint8_t linkStatus)
void EIP_DLR_addToExceptionList(EIP_DLRHandle dlrHandle, uint8_t *macId)
@ RING_NORMAL
Definition: icss_dlr.h:228
HwiP_Object beaconTimeoutIntP1Object
Definition: icss_dlr.h:410
void EIP_DLR_addSignOnNumNodes(uint8_t *src, uint16_t numNodes)
void EIP_DLR_switchToNormal(EIP_DLRHandle dlrHandle)
uint8_t port1IntNum
Definition: icss_dlr.h:416
@ RING_NODE
Definition: icss_dlr.h:271
@ RING_TOP
Definition: icss_dlr.h:241
void EIP_DLR_neighborTimeoutISR0(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 0.
uint32_t sequenceID
Definition: icss_dlr.h:448
@ RING_FAULT_STAT
Definition: icss_dlr.h:252
uint8_t beaconTimeoutIntNum_P1
Definition: icss_dlr.h:422
Supervisor configuration. Attribute ID 4.
Definition: icss_dlr.h:318
dlrStateMachineVar SMVariables
Definition: icss_dlr.h:385
void EIP_DLR_resetStateMachine(EIP_DLRHandle dlrHandle)
Initialize the state machine when it goes back to idle state.
uint32_t dlrCapabilities
Definition: icss_dlr.h:402
void EIP_DLR_setDivider_WD_IEP(EIP_DLRHandle dlrHandle)
Sets the clock divider to 1us for IEP watch dog timers.
ringState
ring state values
Definition: icss_dlr.h:226
uint8_t superStatus
Definition: icss_dlr.h:310
void EIP_DLR_start(EIP_DLRHandle dlrHandle)
API to start the DLR driver Calling this enables DLR on the device.
uint32_t ipAddr
Definition: icss_dlr.h:371
superConfig supConfig
Definition: icss_dlr.h:381
void EIP_DLR_disable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Disable the IEP Watch dog timers.
@ NON_DLR
Definition: icss_dlr.h:273
Definition: icss_dlr.h:439
uint8_t EIP_DLR_checkSupervisorException(uint8_t *macId, EIP_DLRHandle dlrHandle)
void EIP_DLR_init(EIP_DLRHandle dlrHandle)
API to initialize the DLR driver.
void EIP_DLR_clearExceptionList(EIP_DLRHandle dlrHandle)
uint8_t status
Definition: icss_dlr.h:308
void EIP_DLR_port1ISR(uintptr_t arg)
Fast ISR for Port 1, bypasses the buffer copy and NDK.
void EIP_DLR_switchToFault(EIP_DLRHandle dlrHandle)
uint8_t topology
Definition: icss_dlr.h:306
char mode[32]
Definition: tisci_pm_core.h:1
List of MAC ID's which are exempted from Learning, this is for DLR implementation.
Definition: icss_dlr.h:288
nwTopology
network topology : possible values for Attribute ID 1
Definition: icss_dlr.h:237
@ NODE_FAULT
Definition: icss_dlr.h:218
uint8_t activeSuperPred
Definition: icss_dlr.h:405
IP and MAC of the Ring devices. Attribute ID 9.
Definition: icss_dlr.h:370
HwiP_Object port0IntObject
Definition: icss_dlr.h:407
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
@ RAPID_FAULT
Definition: icss_dlr.h:258
uint32_t beaconTimeout
Definition: icss_dlr.h:327
Last active node at the end of the chain Class for Attributes 6 and 7.
Definition: icss_dlr.h:356
void EIP_DLR_initDLRFrameHeader(uint8_t *src, uint8_t *header)
uint32_t ipAddr
Definition: icss_dlr.h:358
exceptionList * exclusionList
Definition: icss_dlr.h:450
uint8_t pktSendCounter
Definition: icss_dlr.h:461
@ RING_FAULT
Definition: icss_dlr.h:230
void EIP_DLR_addModuleIPAddress(EIP_DLRHandle dlrHandle, uint32_t newIP)
uint8_t node_state
Definition: icss_dlr.h:302
uint32_t beaconInterval
Definition: icss_dlr.h:325
@ ACTIVE_RING_SUPERVISOR
Definition: icss_dlr.h:269
void EIP_DLR_periodicProcessing(ClockP_Object *obj, void *userArg)
uint8_t superEnable
Definition: icss_dlr.h:323
DLR parent structure through which all other structures can be accessed.
Definition: icss_dlr.h:379
void EIP_DLR_set_pdi_wd_trigger_mode(EIP_DLRHandle dlrHandle, uint32_t mode)
Set the PDI WD trigger mode.
void EIP_DLR_deinit(EIP_DLRHandle dlrHandle)
API to de-initialize the DLR driver.
struct PRUICSS_Config_s * PRUICSS_Handle
A handle that is returned from a PRUICSS_open() call. This handle is required for calling other APIs.
Definition: pruicss/g_v0/pruicss.h:235
Supervisor address, part of DLR Object. Attribute ID 10.
Definition: icss_dlr.h:341
uint32_t stateMachineCount
Definition: icss_dlr.h:460
uint8_t ring_state
Definition: icss_dlr.h:304
void EIP_DLR_port0ISR(uintptr_t arg)
Fast ISR for Port 0, bypasses the buffer copy and NDK.
@ PARTIAL_FAULT
Definition: icss_dlr.h:256
void EIP_DLR_genNCResFrame(uint8_t *src, uint8_t sourcePort, uint8_t reqSrcPort, uint32_t sequenceId)
void EIP_DLR_port0ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port0.
void EIP_DLR_dRAMInit(EIP_DLRHandle dlrHandle)
void EIP_DLR_addVlanID(uint8_t *src, uint16_t vlanID)
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE
Maximum number of Ports in a single ICSS
Definition: icss_emac.h:66
@ LINEAR_TOP
Definition: icss_dlr.h:239