Here is the list of APIs used for EnDAT encoder communication protocol
Functions | |
void | HDSL_iep_init (PRUICSS_Handle gPruIcss0Handle, void *gPru_cfg, void *gPru_dramx) |
Initialize IEP and Use OCP as IEP CLK src. More... | |
int | HDSL_enable_sync_signal (uint8_t ES, uint32_t period) |
Enable IEP *Enable SYNC0 and program pulse width Enable cyclic mod Program CMP1 TSR configuration More... | |
uint64_t | HDSL_get_pos (int position_id) |
Calculate fast position,safe position1,safe position2. More... | |
uint8_t | HDSL_get_qm () |
Taking quality monitoring value. More... | |
uint16_t | HDSL_get_events () |
taking values of High bytes event(EVENT_H),Low bytes event(EVENT_L) More... | |
uint8_t | HDSL_get_sum () |
Getting Summarized slave status. More... | |
uint8_t | HDSL_get_acc_err_cnt () |
Acceleration error counter. More... | |
uint8_t | HDSL_get_rssi () |
Read RSSI value. More... | |
int | HDSL_write_pc_short_msg (uint32_t gPc_addr, uint32_t gPc_data) |
Write Response of Short message parameters channel Read for safe1 channel(S_PC_DATA) with gPc_data and Short message control value(SLAVE_REG_CTRL) in hdsl interface. More... | |
uint32_t | HDSL_read_pc_short_msg (uint32_t gPc_addr) |
Read Response of Short message parameters channel Read for safe1 channel(S_PC_DATA) and write Short message control value(SLAVE_REG_CTRL) with gPc_addr in hdsl interface. More... | |
void | HDSL_set_pc_addr (uint8_t gPc_addrh, uint8_t gPc_addrl, uint8_t gPc_offh, uint8_t gPc_offl) |
Write PC_AAD_L ,PC_ADD_H ,PC_OFF_L,PC_OFF_H and PC_CTRL values in hdsl interface. More... | |
void | HDSL_set_pc_ctrl (uint8_t value) |
To set the direction read/write for long message communication. More... | |
void | HDSL_write_pc_buffer (uint8_t gPc_buf0, uint8_t gPc_buf1, uint8_t gPc_buf2, uint8_t gPc_buf3, uint8_t gPc_buf4, uint8_t gPc_buf5, uint8_t gPc_buf6, uint8_t gPc_buf7) |
Write Parameters channel buffer for different bytes(bytes 0-7) More... | |
uint8_t | HDSL_read_pc_buffer (uint8_t buff_off) |
read Parameters channel buffer for different bytes(bytes 0-7) More... | |
uint8_t | HDSL_get_sync_ctrl () |
read Synchronization control value More... | |
void | HDSL_set_sync_ctrl (uint8_t val) |
write Synchronization control value More... | |
uint8_t | HDSL_get_master_qm () |
read Quality monitoring value More... | |
uint8_t | HDSL_get_edges () |
read Cable bit sampling time control More... | |
uint8_t | HDSL_get_delay () |
read Run time delay of system cable and signal strength More... | |
uint8_t | HDSL_get_enc_id (int byte) |
Read encoder id bytes(byte no. 0-2) More... | |
void | HDSL_generate_memory_image (void) |
void * | HDSL_get_src_loc () |
uint32_t | HDSL_get_length () |
Macros | |
#define | MAX_WAIT 20000 |
#define | HWREG(x) (*((volatile uint32_t *)(x))) |
#define | HWREGB(x) (*((volatile uint8_t *)(x))) |
#define | HWREGH(x) (*((volatile uint16_t *)(x))) |
#define | SYNCEVENT_INTRTR_IN_27 27 |
#define | SYNCEVT_RTR_SYNC28_EVT 0x64 |
#define | SYNCEVT_RTR_SYNC29_EVT 0x68 |
#define | SYNCEVT_RTR_SYNC30_EVT 0x6C |
#define | SYNCEVT_RTR_SYNC31_EVT 0x70 |
#define | SYNCEVT_RTR_SYNC10_EVT 0x2C |
#define MAX_WAIT 20000 |
#define HWREG | ( | x | ) | (*((volatile uint32_t *)(x))) |
#define HWREGB | ( | x | ) | (*((volatile uint8_t *)(x))) |
#define HWREGH | ( | x | ) | (*((volatile uint16_t *)(x))) |
#define SYNCEVENT_INTRTR_IN_27 27 |
#define SYNCEVT_RTR_SYNC28_EVT 0x64 |
#define SYNCEVT_RTR_SYNC29_EVT 0x68 |
#define SYNCEVT_RTR_SYNC30_EVT 0x6C |
#define SYNCEVT_RTR_SYNC31_EVT 0x70 |
#define SYNCEVT_RTR_SYNC10_EVT 0x2C |
anonymous enum |
void HDSL_iep_init | ( | PRUICSS_Handle | gPruIcss0Handle, |
void * | gPru_cfg, | ||
void * | gPru_dramx | ||
) |
Initialize IEP and Use OCP as IEP CLK src.
[in] | gPruIcss0Handle | |
[in] | gPru_cfg | |
[in] | gPru_dramx |
int HDSL_enable_sync_signal | ( | uint8_t | ES, |
uint32_t | period | ||
) |
Enable IEP
*Enable SYNC0 and program pulse width
Enable cyclic mod
Program CMP1
TSR configuration
[in] | ES | |
[in] | period |
1 | for successful enable sync signal |
uint64_t HDSL_get_pos | ( | int | position_id | ) |
Calculate fast position,safe position1,safe position2.
[in] | position_id |
position | value in integer for successful position return, -1 for error in position return |
uint8_t HDSL_get_qm | ( | ) |
Taking quality monitoring value.
[in] | None |
8 | bit integer QM value |
uint16_t HDSL_get_events | ( | ) |
taking values of High bytes event(EVENT_H),Low bytes event(EVENT_L)
[in] | None |
16 | bit integer concatenated values of both EVENT_H,EVENT_L |
uint8_t HDSL_get_sum | ( | ) |
Getting Summarized slave status.
[in] | None |
8 | bit integer value of summarized status |
uint8_t HDSL_get_acc_err_cnt | ( | ) |
Acceleration error counter.
[in] | None |
8 | bit integer value of acceleration error counter |
uint8_t HDSL_get_rssi | ( | ) |
Read RSSI value.
[in] | None |
8 | bit RSSI integer value |
int HDSL_write_pc_short_msg | ( | uint32_t | gPc_addr, |
uint32_t | gPc_data | ||
) |
Write Response of Short message parameters channel Read for safe1 channel(S_PC_DATA) with gPc_data and Short message control value(SLAVE_REG_CTRL) in hdsl interface.
[in] | gPc_addr | |
[in] | gPc_data |
1 | for successfully write of pc short messege in hdsl interface |
uint32_t HDSL_read_pc_short_msg | ( | uint32_t | gPc_addr | ) |
Read Response of Short message parameters channel Read for safe1 channel(S_PC_DATA) and write Short message control value(SLAVE_REG_CTRL) with gPc_addr in hdsl interface.
[in] | gPc_addr |
S_PC_DATA | from hdsl interface |
void HDSL_set_pc_addr | ( | uint8_t | gPc_addrh, |
uint8_t | gPc_addrl, | ||
uint8_t | gPc_offh, | ||
uint8_t | gPc_offl | ||
) |
Write PC_AAD_L ,PC_ADD_H ,PC_OFF_L,PC_OFF_H and PC_CTRL values in hdsl interface.
[in] | gPc_addrh | |
[in] | gPc_addrl | |
[in] | gPc_offh | |
[in] | gPc_offl |
void HDSL_set_pc_ctrl | ( | uint8_t | value | ) |
To set the direction read/write for long message communication.
[in] | value |
void HDSL_write_pc_buffer | ( | uint8_t | gPc_buf0, |
uint8_t | gPc_buf1, | ||
uint8_t | gPc_buf2, | ||
uint8_t | gPc_buf3, | ||
uint8_t | gPc_buf4, | ||
uint8_t | gPc_buf5, | ||
uint8_t | gPc_buf6, | ||
uint8_t | gPc_buf7 | ||
) |
Write Parameters channel buffer for different bytes(bytes 0-7)
[in] | gPc_buf0 | |
[in] | gPc_buf1 | |
[in] | gPc_buf2 | |
[in] | gPc_buf3 | |
[in] | gPc_buf4 | |
[in] | gPc_buf5 | |
[in] | gPc_buf6 | |
[in] | gPc_buf7 |
uint8_t HDSL_read_pc_buffer | ( | uint8_t | buff_off | ) |
read Parameters channel buffer for different bytes(bytes 0-7)
[in] | buff_off |
8 | bit integer value of PC_BUFFER from hdsl interface |
uint8_t HDSL_get_sync_ctrl | ( | ) |
read Synchronization control value
8 | bit integer value of SYNC_CTRL from hdsl interface |
void HDSL_set_sync_ctrl | ( | uint8_t | val | ) |
write Synchronization control value
[in] | val |
uint8_t HDSL_get_master_qm | ( | ) |
read Quality monitoring value
[in] | None |
8 | bit integer value of MASTER_QM from hdsl interface |
uint8_t HDSL_get_edges | ( | ) |
read Cable bit sampling time control
[in] | None |
8 | bit integer value of EDGES from hdsl interface |
uint8_t HDSL_get_delay | ( | ) |
read Run time delay of system cable and signal strength
[in] | buff |
8 | bit integer value of DELAY from hdsl interface |
uint8_t HDSL_get_enc_id | ( | int | byte | ) |
Read encoder id bytes(byte no. 0-2)
[in] | byte |
8 | bit encoder bytes data from hdsl interface |
void HDSL_generate_memory_image | ( | void | ) |
void* HDSL_get_src_loc | ( | ) |
uint32_t HDSL_get_length | ( | ) |