sdl_dcc.h

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/*
 *  @file  dl_dcc.h
 *
 *  @brief This file contains the prototypes of the APIs present in the
 *  device abstraction layer file of DCC.
 *   This also contains some related macros.
 *   Copyright (c) Texas Instruments Incorporated 2021-2025
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#ifndef SDL_DCC_H_
#define SDL_DCC_H_



/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */

#include <sdl_types.h>
#include <tistdtypes.h>
#include <stdint.h>
#include <stdbool.h>
#include <src/sdl/hw_types.h>

#if defined (SOC_J721E)
#include <src/sdl/dcc/soc/j721e/sdl_soc_dcc.h>
#include <include/soc/j721e/sdlr_soc_baseaddress.h>
#endif /* SOC_J721E */

#if defined (SOC_J7200)
#include <src/sdl/dcc/soc/j7200/sdl_soc_dcc.h>
#include <include/soc/j7200/sdlr_soc_baseaddress.h>
#endif /* SOC_J7200 */

#if defined (SOC_J721S2)
#include <src/sdl/dcc/soc/j721s2/sdl_soc_dcc.h>
#include <include/soc/j721s2/sdlr_soc_baseaddress.h>
#endif /* SOC_J721S2 */

#if defined (SOC_J784S4)
#include <src/sdl/dcc/soc/j784s4/sdl_soc_dcc.h>
#include <include/soc/j784s4/sdlr_soc_baseaddress.h>
#endif /* SOC_J784S4 */

#ifdef __cplusplus
extern "C" {
#endif

/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */

#define DCC_SRC0_COUNT_MAX      (0xFFFFFU)

#define DCC_SRC0_VALID_MAX      (0x0FFFFU)

#define DCC_SRC1_COUNT_MAX      (0xFFFFFU)

#define MIN_CLK0_VLD_SEED       (4u)


typedef uint32_t SDL_DCC_mode;

#define SDL_DCC_MODE_SINGLE_SHOT_1     (DCC_DCCGCTRL_SINGLESHOT_MODE1)

#define SDL_DCC_MODE_SINGLE_SHOT_2     (DCC_DCCGCTRL_SINGLESHOT_MODE2)

#define SDL_DCC_MODE_CONTINUOUS        (DCC_DCCGCTRL_SINGLESHOT_DISABLE)



typedef uint32_t SDL_DCC_clkSrc0;

#define SDL_DCC_CLK0_SRC_CLOCK0_0               (DCC_DCCCLKSRC0_CLKSRC0_0)

#define SDL_DCC_CLK0_SRC_CLOCK0_1               (DCC_DCCCLKSRC0_CLKSRC0_1)

#define SDL_DCC_CLK0_SRC_CLOCK0_2               (DCC_DCCCLKSRC0_CLKSRC0_2)



typedef uint32_t SDL_DCC_clkSrc1;
#define SDL_DCC_CLK1_SRC_CLOCK1                  (DCC_DCCCLKSRC1_CLKSRC_0)

#define SDL_DCC_CLK1_SRC_CLOCKSRC0               (DCC_DCCCLKSRC1_CLKSRC_1)

#define SDL_DCC_CLK1_SRC_CLOCKSRC1               (DCC_DCCCLKSRC1_CLKSRC_2)

#define SDL_DCC_CLK1_SRC_CLOCKSRC2               (DCC_DCCCLKSRC1_CLKSRC_3)

#define SDL_DCC_CLK1_SRC_CLOCKSRC3               (DCC_DCCCLKSRC1_CLKSRC_4)

#define SDL_DCC_CLK1_SRC_CLOCKSRC4               (DCC_DCCCLKSRC1_CLKSRC_5)

#define SDL_DCC_CLK1_SRC_CLOCKSRC5               (DCC_DCCCLKSRC1_CLKSRC_6)

#define SDL_DCC_CLK1_SRC_CLOCKSRC6               (DCC_DCCCLKSRC1_CLKSRC_7)

#define SDL_DCC_CLK1_SRC_CLOCKSRC7               (DCC_DCCCLKSRC1_CLKSRC_8)

#define SDL_DCC_CLK1_SRC_FICLK                   (DCC_DCCCLKSRC1_CLKSRC_OTHER)



typedef uint32_t SDL_DCC_intrType;

#define SDL_DCC_INTERRUPT_ERR              (0x0U)

#define SDL_DCC_INTERRUPT_DONE             (0x1U)


/* ========================================================================== */
/*                         Structures                                         */
/* ========================================================================== */


typedef struct SDL_DCC_config_st
{
    SDL_DCC_mode mode;
    SDL_DCC_clkSrc0 clk0Src;
    uint32_t clk1Src;
    uint32_t clk0Seed;
    uint32_t clk0ValidSeed;
    uint32_t clk1Seed;
}SDL_DCC_config;


typedef struct SDL_DCC_status_st
{
    bool doneIntr;
    /* Indicates if a done interrupt is currently pending */
    bool errIntr;
    /* Indicates if an error interrupt is currently pending */
    SDL_DCC_config config;
    /* DCC config structure */
    uint32_t clk0Cnt;
    /* Current COUNT0 value of clock source 0 */
    uint32_t clk0Valid;
    /* Current VALID0 value */
    uint32_t clk1Cnt;
    /* Current COUNT1 value of clock source 1 */
}SDL_DCC_status;


typedef struct SDL_DCC_staticRegs_st
{
    uint32_t DCC_REV;
    /* DCC revision register */
    uint32_t DCC_CNTSEED0;
    /* COUNT0 SEED register */
    uint32_t DCC_VALIDSEED0;
    /* VALID0 SEED register */
    uint32_t DCC_CNTSEED1;
    /* COUNT1 SEED register */
    uint32_t DCC_CLKSRC1;
    /* CLOCK SOURCE1 register */
    uint32_t DCC_CLKSRC0;
    /* CLOCK SOURCE0 register */
}SDL_DCC_staticRegs;

/* ========================================================================== */
/*                            Global Variables                                */
/* ========================================================================== */

/* None */

/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */

int32_t SDL_DCC_configure(SDL_DCC_Inst instance, const SDL_DCC_config *pConfig);

int32_t SDL_DCC_verifyConfig(SDL_DCC_Inst instance, const SDL_DCC_config *pConfig);
int32_t SDL_DCC_enable(SDL_DCC_Inst instance);
int32_t SDL_DCC_disable(SDL_DCC_Inst instance);
int32_t SDL_DCC_getStatus(SDL_DCC_Inst instance, SDL_DCC_status *pStatus);
int32_t SDL_DCC_enableIntr(SDL_DCC_Inst instance, SDL_DCC_intrType intr);
int32_t SDL_DCC_clearIntr(SDL_DCC_Inst instance, SDL_DCC_intrType intr);
int32_t SDL_DCC_getStaticRegs(SDL_DCC_Inst instance, SDL_DCC_staticRegs *pStaticRegs);

/****************************************************************************************************
* Register Definitions
****************************************************************************************************/

#define DCC_DCCGCTRL                                                (0x0U)
#define DCC_DCCREV                                                  (0x4U)
#define DCC_DCCCNTSEED0                                             (0x8U)
#define DCC_DCCVALIDSEED0                                           (0xcU)
#define DCC_DCCCNTSEED1                                             (0x10U)
#define DCC_DCCSTAT                                                 (0x14U)
#define DCC_DCCCNT0                                                 (0x18U)
#define DCC_DCCVALID0                                               (0x1cU)
#define DCC_DCCCNT1                                                 (0x20U)
#define DCC_DCCCLKSRC1                                              (0x24U)
#define DCC_DCCCLKSRC0                                              (0x28U)

/****************************************************************************************************
* Field Definition Macros
****************************************************************************************************/

#define DCC_DCCGCTRL_DCCENA_SHIFT                                                       (0U)
#define DCC_DCCGCTRL_DCCENA_MASK                                                        (0x0000000fU)
#define DCC_DCCGCTRL_DCCENA_ENABLE                                                      (0xFU)
#define DCC_DCCGCTRL_DCCENA_DISABLE                                                     (0x5U)

#define DCC_DCCGCTRL_ERRENA_SHIFT                                                       (4U)
#define DCC_DCCGCTRL_ERRENA_MASK                                                        (0x000000f0U)
#define DCC_DCCGCTRL_ERRENA_ENABLE                                                      (0xFU)
#define DCC_DCCGCTRL_ERRENA_DISABLE                                                     (0x5U)

#define DCC_DCCGCTRL_SINGLESHOT_SHIFT                                                   (8U)
#define DCC_DCCGCTRL_SINGLESHOT_MASK                                                    (0x00000f00U)
#define DCC_DCCGCTRL_SINGLESHOT_MODE1                                                   (0xAU)
#define DCC_DCCGCTRL_SINGLESHOT_MODE2                                                   (0xBU)
#define DCC_DCCGCTRL_SINGLESHOT_DISABLE                                                 (0x0U)

#define DCC_DCCGCTRL_DONEENA_SHIFT                                                      (12U)
#define DCC_DCCGCTRL_DONEENA_MASK                                                       (0x0000f000U)
#define DCC_DCCGCTRL_DONEENA_ENABLE                                                     (0xFU)
#define DCC_DCCGCTRL_DONEENA_DISABLE                                                    (0x5U)

#define DCC_DCCGCTRL_RES_SHIFT                                                          (16U)
#define DCC_DCCGCTRL_RES_MASK                                                           (0xffff0000U)

#define DCC_DCCREV_MINOR_SHIFT                                                          (0U)
#define DCC_DCCREV_MINOR_MASK                                                           (0x0000003fU)

#define DCC_DCCREV_CUSTOM_SHIFT                                                         (6U)
#define DCC_DCCREV_CUSTOM_MASK                                                          (0x000000c0U)

#define DCC_DCCREV_MAJOR_SHIFT                                                          (8U)
#define DCC_DCCREV_MAJOR_MASK                                                           (0x00000700U)

#define DCC_DCCREV_RTL_SHIFT                                                            (11U)
#define DCC_DCCREV_RTL_MASK                                                             (0x0000f800U)

#define DCC_DCCREV_FUNC_SHIFT                                                           (16U)
#define DCC_DCCREV_FUNC_MASK                                                            (0x0fff0000U)

#define DCC_DCCREV_RES_SHIFT                                                            (28U)
#define DCC_DCCREV_RES_MASK                                                             (0x30000000U)

#define DCC_DCCREV_SCHEME_SHIFT                                                         (30U)
#define DCC_DCCREV_SCHEME_MASK                                                          (0xc0000000U)

#define DCC_DCCCNTSEED0_COUNTSEED0_SHIFT                                                (0U)
#define DCC_DCCCNTSEED0_COUNTSEED0_MASK                                                 (0x000fffffU)

#define DCC_DCCCNTSEED0_RES_SHIFT                                                       (20U)
#define DCC_DCCCNTSEED0_RES_MASK                                                        (0xfff00000U)

#define DCC_DCCVALIDSEED0_VALIDSEED0_SHIFT                                              (0U)
#define DCC_DCCVALIDSEED0_VALIDSEED0_MASK                                               (0x0000ffffU)

#define DCC_DCCVALIDSEED0_RES_SHIFT                                                     (16U)
#define DCC_DCCVALIDSEED0_RES_MASK                                                      (0xffff0000U)

#define DCC_DCCCNTSEED1_COUNTSEED1_SHIFT                                                (0U)
#define DCC_DCCCNTSEED1_COUNTSEED1_MASK                                                 (0x000fffffU)

#define DCC_DCCCNTSEED1_RES_SHIFT                                                       (20U)
#define DCC_DCCCNTSEED1_RES_MASK                                                        (0xfff00000U)

#define DCC_DCCSTAT_ERRFLG_SHIFT                                                        (0U)
#define DCC_DCCSTAT_ERRFLG_MASK                                                         (0x00000001U)

#define DCC_DCCSTAT_DONEFLG_SHIFT                                                       (1U)
#define DCC_DCCSTAT_DONEFLG_MASK                                                        (0x00000002U)

#define DCC_DCCSTAT_RES_SHIFT                                                           (2U)
#define DCC_DCCSTAT_RES_MASK                                                            (0xfffffffcU)

#define DCC_DCCCNT0_COUNT0_SHIFT                                                        (0U)
#define DCC_DCCCNT0_COUNT0_MASK                                                         (0x000fffffU)

#define DCC_DCCCNT0_RES_SHIFT                                                           (20U)
#define DCC_DCCCNT0_RES_MASK                                                            (0xfff00000U)

#define DCC_DCCVALID0_VALID0_SHIFT                                                      (0U)
#define DCC_DCCVALID0_VALID0_MASK                                                       (0x0000ffffU)

#define DCC_DCCVALID0_RES_SHIFT                                                         (16U)
#define DCC_DCCVALID0_RES_MASK                                                          (0xffff0000U)

#define DCC_DCCCNT1_COUNT1_SHIFT                                                        (0U)
#define DCC_DCCCNT1_COUNT1_MASK                                                         (0x000fffffU)

#define DCC_DCCCNT1_RES_SHIFT                                                           (20U)
#define DCC_DCCCNT1_RES_MASK                                                            (0xfff00000U)

#define DCC_DCCCLKSRC1_CLKSRC_SHIFT                                                     (0U)
#define DCC_DCCCLKSRC1_CLKSRC_MASK                                                      (0x0000000fU)
#define DCC_DCCCLKSRC1_CLKSRC_0                                                         (0x0U)
#define DCC_DCCCLKSRC1_CLKSRC_1                                                         (0x1U)
#define DCC_DCCCLKSRC1_CLKSRC_2                                                         (0x2U)
#define DCC_DCCCLKSRC1_CLKSRC_3                                                         (0x3U)
#define DCC_DCCCLKSRC1_CLKSRC_4                                                         (0x4U)
#define DCC_DCCCLKSRC1_CLKSRC_5                                                         (0x5U)
#define DCC_DCCCLKSRC1_CLKSRC_6                                                         (0x6U)
#define DCC_DCCCLKSRC1_CLKSRC_7                                                         (0x7U)
#define DCC_DCCCLKSRC1_CLKSRC_8                                                         (0x8U)
#define DCC_DCCCLKSRC1_CLKSRC_OTHER                                                     (0xFU)

#define DCC_DCCCLKSRC1_RES1_SHIFT                                                       (4U)
#define DCC_DCCCLKSRC1_RES1_MASK                                                        (0x00000ff0U)

#define DCC_DCCCLKSRC1_KEY_SHIFT                                                        (12U)
#define DCC_DCCCLKSRC1_KEY_MASK                                                         (0x0000f000U)
#define DCC_DCCCLKSRC1_KEY_ENABLE                                                       (0xAU)
#define DCC_DCCCLKSRC1_KEY_DISABLE                                                      (0x0U)

#define DCC_DCCCLKSRC1_RES0_SHIFT                                                       (16U)
#define DCC_DCCCLKSRC1_RES0_MASK                                                        (0xffff0000U)

#define DCC_DCCCLKSRC0_CLKSRC0_SHIFT                                                    (0U)
#define DCC_DCCCLKSRC0_CLKSRC0_MASK                                                     (0x0000000fU)
#define DCC_DCCCLKSRC0_CLKSRC0_0                                                        (0x0U)
#define DCC_DCCCLKSRC0_CLKSRC0_1                                                        (0x1U)
#define DCC_DCCCLKSRC0_CLKSRC0_2                                                        (0x2U)

#define DCC_DCCCLKSRC0_RES1_SHIFT                                                       (4U)
#define DCC_DCCCLKSRC0_RES1_MASK                                                        (0x00000ff0U)

#define DCC_DCCCLKSRC0_KEY_SHIFT                                                        (12U)
#define DCC_DCCCLKSRC0_KEY_MASK                                                         (0x0000f000U)
#define DCC_DCCCLKSRC0_KEY_ENABLE                                                       (0xAU)
#define DCC_DCCCLKSRC0_KEY_DISABLE                                                      (0x0U)

#define DCC_DCCCLKSRC0_RES0_SHIFT                                                       (16U)
#define DCC_DCCCLKSRC0_RES0_MASK                                                        (0xffff0000U)

#ifdef __cplusplus
}

#endif /*extern "C" */

#endif